TS472 Very low noise microphone preamplifier with 2.0 V bias output and active low standby mode Features Flip-chip - 12 bumps Low noise: 10 nV/Hz typ. equivalent input noise at F = 1 kHz Fully-differential input/output 2.2 to 5.5 V single supply operation Low power consumption at 20 dB: 1.8 mA Fast start up time at 0 dB: 5 ms typ. Low distortion: 0.1% typ. 40 kHz bandwidth regardless of the gain Active low standby mode function (1 A max) Low noise 2.0 V microphone bias output Available in flip-chip lead-free package and in QFN24 4 x 4 mm package ESD protection (2 kV) Pin connections (top view) Applications QFN24 Video and photo cameras with sound input Sound acquisition and voice recognition Video conference systems Notebook computers and PDAs Pin connections (top view) Description The TS472 is a differential-input microphone preamplifier optimized for high-performance PDA and notebook audio systems. This device features an adjustable gain from 0 to 40 dB with excellent power-supply and commonmode rejection ratios. In addition, the TS472 has a very low noise microphone bias generator of 2 V. NC 24 23 GND STBY VCC 22 21 20 NC 19 NC 1 18 NC BYP 2 17 OUT+ NC 3 16 OUT- GND 4 15 C2 IN- 5 14 C1 NC 6 13 NC It also includes a complete shutdown function, with active low standby mode. August 2009 NC Doc ID 11015 Rev 6 7 8 9 10 11 12 NC IN+ GS BIAS NC NC 1/25 www.st.com 25 Contents TS472 Contents 1 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 4.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4 Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.6 Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.7 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.8 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.10 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1 Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2 QFN24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 Doc ID 11015 Rev 6 TS472 Typical application schematic Figure 1 shows a typical application schematic for the TS472. Figure 1. Application schematic (flip-chip) Optional C1 VCC Cs 1uF Rpos TS472_FC Vcc Cin+ + Electret Mic C2 U1 C1 C3 1uF C2 Cout+ IN+ OUT+ IN- OUT- Positive Output Cout- G BIAS 2.0V Rout- GAIN SELECT BYPASS Cb 1uF STDBY Bias Rout+ Negative Output CinRneg GND 1 Typical application schematic Standby Control Table 1. Description of external components Components Functional description Cin+, Cin- Input coupling capacitors that block the DC voltage at the amplifier input terminal. Cout+, Cout- Output coupling capacitors that block the DC voltage coming from the amplifier output terminal (pins C2 and D2) and determine the lower cut-off frequency (see Section 4.3: Lower cut-off frequency). Rout+, Rout- Output load resistors used to charge the output coupling capacitors Cout. These output resistors can be represented by an input impedance of a following stage. Rpos, Rneg Polarizing resistors for biasing of a microphone. Cs Supply bypass capacitor that provides power supply filtering. Cb Bypass pin capacitor that provides half-supply filtering. C1, C2 C3 Low pass filter capacitors allowing to cut the high frequency. Bias output filtering capacitor. Doc ID 11015 Rev 6 3/25 Typical application schematic Table 2. 4/25 TS472 Pin descriptions Pin name Flip-chip designator QFN designator IN+ A1 8 Positive differential input IN- B1 5 Negative differential input BIAS A2 10 2 V bias output GND C1 4, 22 Ground STBY C3 21 Standby BYP D1 2 Bypass GS B2 9 Gain select OUT- D2 16 Negative differential output OUT+ C2 17 Positive differential output C1 A3 14 Low-pass filter capacitor C2 B3 15 Low-pass filter capacitor Vcc D3 20 Power supply NC --- 3, 6, 7, 11, 12, 13, 18, 19, 23, 24 Pin description Not connected, floating pins Doc ID 11015 Rev 6 TS472 2 Absolute maximum ratings Absolute maximum ratings Table 3. Absolute maximum ratings Symbol VCC Vi Parameter Supply voltage (1) Input voltage Value Unit 6 V -0.3 to VCC+0.3 V Toper Operating free air temperature range -40 to + 85 C Tstg Storage temperature -65 to +150 C Maximum junction temperature 150 C Rthja Thermal resistance junction to ambient: Flip-chip QFN24 180 110 C/W ESD Human body model 2 kV ESD Machine model 200 V Lead temperature (soldering, 10sec) 250 C Tj 1. All voltage values are measured with respect to the ground pin. Table 4. Operating conditions Symbol VCC A VSTBY Parameter Supply voltage Typical differential gain (GS connected to 4.7 k or bias) Standby voltage input: Device ON Device OFF Value Unit 2.2 to 5.5 V 20 dB 1.5 VSTBY VCC GND VSTBY 0.4 V Top Operational free air temperature range -40 to +85 C Rthja Thermal resistance junction to ambient: Flip-chip QFN24 150 60 C/W Doc ID 11015 Rev 6 5/25 Electrical characteristics 3 Electrical characteristics Table 5. Electrical characteristics at VCC = 3 V with GND = 0 V, Tamb = 25 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Equivalent input noise voltage density REQ = 100 at 1 kHz 10 nV -----------Hz Total harmonic distortion + noise 20 Hz F 20 kHz, gain = 20 dB, Vin = 50 mVRMS 0.1 % Vin Input voltage, gain = 20 dB 10 BW Bandwidth at -3 dB Bandwidth at -1 dB pin A3, B3 floating 40 20 en THD+N G Overall output voltage gain (Rgs variable): Minimum gain, Rgs infinite Maximum gain, Rgs = 0 Zin 70 mVRMS kHz -3 39.5 -1.5 41 0 42.5 dB Input impedance referred to GND 80 100 120 k RLOAD Resistive load 10 CLOAD Capacitive load ICC Supply current, gain = 20 dB ISTBY Standby current PSRR Power supply rejection ratio, gain = 20 dB, F = 217 Hz, Vripple = 200 mVpp, inputs grounded Differential output Single-ended outputs, Table 6. k 1.8 100 pF 2.4 mA 1 A dB -70 -46 Bias output: VCC = 3 V, GND = 0 V, Tamb = 25 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Vout No load condition 1.9 2 2.1 V Rout Output resistance 80 100 120 W Iout Output bias current PSRR 6/25 TS472 Power supply rejection ratio, F = 217 Hz, Vripple = 200 mVpp Doc ID 11015 Rev 6 70 2 mA 80 dB TS472 Electrical characteristics Table 7. Differential RMS noise voltage Input referred noise voltage (VRMS) Gain (dB) Output noise voltage (VRMS) Unweighted filter A-weighted filter Unweighted filter A-weighted filter 0 15 10 15 10 20 3.4 2.3 34 23 40 1.4 0.9 141 91 Table 8. Bias output RMS noise voltage C3(1) (F) Unweighted filter (VRMS) A-weighted filter (VRMS) 1 5 4.4 10 2.2 1.2 1. Bias output filtering capacitor. Table 9. Gain (dB) SNR (signal to noise ratio), THD+N < 0.5% Unweighted filter 20 Hz - 20 kHz (dB) A-weighted filter (dB) VCC = 2.2 V VCC = 3 V VCC = 5.5 V VCC = 2.2 V VCC = 3 V VCC = 5.5 V 0 75 76 76 79 80 80 20 82 83 83 89 90 90 40 70 72 74 80 82 84 Doc ID 11015 Rev 6 7/25 Electrical characteristics 2.5 2.5 Current Consumption (mA) Current Consumption (mA) 3.0 Tamb=85C 2.0 1.5 Tamb=25C 1.0 Tamb=-40C 0.5 No Loads GS floating 0 Figure 4. 1 2 3 4 Power Supply Voltage (V) 5 Current consumption vs. standby voltage Tamb=85C 1.0 2.0 Vcc=5V 1.0 0.5 No Loads GS floating Tamb = 25C 0 Figure 6. 1 2 3 Standby Voltage (V) 4 0 1 Current consumption vs. standby voltage Vcc=5V 0.5 30 0.8 20 PSRR (dB) 6 1.0 1.0 0.4 5 Vcc=3V No Loads GS grounded Tamb = 25C 0 1 Figure 7. 0.6 2 3 4 Power Supply Voltage (V) 1.5 0.0 5 Standby threshold voltage vs. power supply voltage No Loads GS grounded Figure 5. 2.0 Vcc=3V Tamb=-40C 0.5 2.5 1.5 Tamb=25C 1.5 0.0 6 Current consumption vs. power supply voltage 2.0 2.5 0.0 Standby Treshold Voltage (V) Figure 3. 3.0 0.0 2 3 Standby Voltage (V) 4 5 Frequency response Cb=1 F, T AMB =25 C, Gain=20dB, Rout=100k 10 no C1,C2 C1,C2=100pF 0 Cin,Cout=100nF 0.2 0.0 8/25 Current consumption vs. power supply voltage Current Consumption (mA) Current Consumption (mA) Figure 2. TS472 C1,C2=220pF -10 Cin,Cout=10nF No Loads Tamb = 25C 2.2 3 4 Power Supply Voltage (V) 5 5.5 -20 10 Doc ID 11015 Rev 6 100 1000 Frequency (Hz) 10000 100000 TS472 Electrical characteristics Figure 8. Bias output voltage vs. bias output Figure 9. current 2.2 2.2 Vcc=2.5-6V Tamb=25C 2.0 Bias Output Voltage (V) Bias Output Voltage (V) Bias output voltage vs. power supply voltage Tamb=85C 1.8 1.6 Tamb=-40C Ibias=0mA 2.0 Ibias=2mA 1.8 Ibias=4mA 1.6 Tamb=25C 1.4 0 1 2 3 Bias Output Current (mA) 1.4 4 Figure 10. Bias PSRR vs. frequency 4 Power Supply Voltage (V) 5 5.5 Figure 11. Bias PSRR vs. frequency 0 0 Vripple=200mVpp Vcc=3V Cb=1 F Tamb =25 C -40 Vripple=200mVpp Vcc=5V Cb=1 F Tamb=25 C -20 PSRR (dB) -20 PSRR (dB) 3 2.2 Bias floating or 1k to GND -60 Bias = 1k to GND -40 -60 -80 -80 -100 -100 Bias floating 50 100 1000 50 10000 20k 100 1000 Frequency (Hz) Frequency (Hz) Figure 12. Differential output PSRR vs. frequency Figure 13. Differential output PSRR vs. frequency 0 PSRR (dB) -20 -30 0 Vripple=200mVpp Inputs grounded Vcc=3V Cb=1 F Cin=100nF Tamb=25 C -10 -20 GS grounded -40 GS=bias GS floating -50 PSRR (dB) -10 -30 -70 -70 100 1000 Frequency (Hz) 10000 20k GS grounded -50 -60 50 Vripple=200mVpp Inputs grounded Vcc=5V Cb=1 F Cin=100nF Tamb=25 C -40 -60 -80 10000 20k -80 50 Doc ID 11015 Rev 6 GS=bias GS floating 100 1000 Frequency (Hz) 10000 20k 9/25 Electrical characteristics TS472 Figure 14. Differential output PSRR vs. frequency Figure 15. Differential output PSRR vs. frequency 0 0 V RIPPLE =200mV PP , Inputs grounded -40 Cb=1 F No Cb V CC =3V, Gain=20dB, Cin=1 F, T AMB =25 C -20 PSRR (dB) -20 PSRR (dB) V RIPPLE =200mV PP, Inputs grounded V CC =3V, Minimum Gain, Cin=1 F, T AMB =25 C Cb=100nF -60 -40 Cb=1 F No Cb -60 -80 -80 -100 50 -100 50 Cb=100nF 100 1k Frequency (Hz) 10k 20k Figure 16. Single-ended output PSRR vs. frequency 1k Frequency (Hz) 10k 20k Figure 17. Equivalent input noise voltage density 0 1000 -20 -30 Cin=100nF R EQ=100 Vcc=3V T AMB =25 C en (nV/ Hz) Vripple=200mVpp Inputs grounded Cb=1 F Cin=100nF Tamb=25 C -10 PSRR (dB) 100 -40 -50 100 10 -60 -70 Vcc=2.2V -80 100 50 Vcc=5V 1000 Frequency (Hz) 1 10 10000 20k Figure 18. gain vs. power supply voltage 0.25 Maximum Gain 100k F=1kHz V IN =5mV 0.00 Gain (dB) Gain (dB) 10k 0.50 F=1kHz Vin=5mV Tamb=25C 0.6 0.4 0.2 -0.25 Maximum Gain -0.50 0.0 Gain=20dB Minimum Gain -0.2 -0.75 Gain=20dB -0.4 2.2 10/25 1k Frequency (Hz) Figure 19. gain vs. ambient temperature 1.0 0.8 100 3 4 Power Supply Voltage (V) 5 5.5 -1.00 -40 Doc ID 11015 Rev 6 Minimum Gain -20 0 20 40 Ambient Temperature (C) 60 80 TS472 Electrical characteristics Figure 20. Maximum input voltage vs. gain, THD+N<1% Figure 21. Maximum input voltage vs. power supply voltage, THD+N<1% F=1kHz THD+N<1% 100 50 V CC =3V V CC =2.2V 0 T AMB =25C, F=1kHz, THD+N<1% 140 T AMB =25C V CC=5.5V Maximum Input Voltage (mVRMS) Maximum Input Voltage (mVRMS) 150 120 100 80 60 10 20 Gain (dB) 30 2.2 4 Power Supply Voltage (V) 5.5 GS floating GS=bias 1 THD+N (%) 1 0.1 GS=bias 0.1 GS grounded GS grounded Tamb=25C, Vcc=3V, F=100Hz, Cb=1 F, RL=10k , BW=100Hz-120kHz 0.01 1E-3 0.01 0.01 0.3 0.1 Tamb=25C, Vcc=5V, F=100Hz, Cb=1 F, RL=10k , BW=100Hz-120kHz 1E-3 0.01 Input Voltage (V) 0.1 0.3 Input Voltage (V) Figure 24. THD+N vs. input voltage Figure 25. THD+N vs. input voltage 10 10 GS floating GS floating GS=bias GS=bias 1 THD+N (%) 1 THD+N (%) 5 10 GS floating THD+N (%) 3 Figure 23. THD+N vs. input voltage 10 0.1 0.1 GS grounded GS grounded 0.01 Gain=20dB 20 40 Figure 22. THD+N vs. input voltage Gain=30dB Gain=40dB 40 0 0 Gain=0dB Tamb=25C, Vcc=3V, F=1kHz, Cb=1 F, RL=10k , BW=100Hz-120kHz 1E-3 0.01 0.01 0.1 0.3 1E-3 Input Voltage (V) Tamb=25C, Vcc=5V, F=1kHz, Cb=1 F, RL=10k , BW=100Hz-120kHz 0.01 0.1 0.3 Input Voltage (V) Doc ID 11015 Rev 6 11/25 Electrical characteristics TS472 Figure 26. THD+N vs. input voltage Figure 27. THD+N vs. input voltage 10 10 GS floating GS floating GS=bias GS grounded 1 THD+N (%) THD+N (%) 1 0.1 GS=bias 0.1 GS grounded 0.01 Tamb=25C, Vcc=3V, F=20kHz, Cb=1 F, RL=10k , BW=100Hz-120kHz 1E-3 0.01 Tamb=25C, Vcc=5V, F=20kHz, Cb=1 F, RL=10k , BW=100Hz-120kHz 0.01 0.3 0.1 1E-3 0.01 Input Voltage (V) Figure 28. THD+N vs. frequency Figure 29. THD+N vs. frequency 10 10 GS grounded, Vin=20mV 1 Tamb=25 C Vcc=5V RL=10k Cb=1 F BW=100Hz-120kHz GS=bias, Vin=100mV THD + N (%) THD + N (%) Tamb=25C Vcc=3V RL=10k Cb=1 F BW=100Hz-120kHz 1 50 100 1000 Frequency (Hz) Figure 30. Transient response GS=bias, Vin=100mV GS grounded, Vin=20mV GS floating, Vin=100mV GS floating, Vin=100mV 0.1 0.3 0.1 Input Voltage (V) 10000 0.1 20k 50 100 1000 Frequency (Hz) 10000 20k Figure 31. Common mode rejection ratio (CMRR) vs frequency 0 Vicm=200mVpp, V CC=3V CMRR (dB) -20 C IN =1 F, T AMB=25C Maximum Gain -40 Gain=20dB Minimum Gain -60 -80 -100 20 12/25 Doc ID 11015 Rev 6 100 1k Frequency (Hz) 10k 20k TS472 Application information 4 Application information 4.1 Differential configuration principle The TS472 is a fully-differential input/output microphone preamplifier. The TS472 also includes a common-mode feedback loop that controls the output bias value to average it at VCC/2. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the input dynamic voltage range. The advantages of a fully-differential amplifier are: Very high PSRR (power supply rejection ratio). High common mode noise rejection. In theory, the filtering of the internal bias by an external bypass capacitor is not necessary. However, to reach maximum performance in all tolerance situations, it is better to keep this option. Higher cut-off frequency The higher cut-off frequency FCH of the microphone preamplifier depends on the external capacitors C1, C2. TS472 has an internal first order low-pass filter (R = 40 k, C = 100 pF) to limit the highest cut-off frequency on 40 kHz (with a 3 dB attenuation). By connecting C1, C2 you can decrease FCH by applying the following formula. 1 F CH = --------------------------------------------------------------------------------------------3 - 12 2 40 x 10 ( C 1, 2 + 100 x 10 ) Figure 32 represents the higher cut-off frequency in Hz versus the value of the output capacitors C1, C2 in nF. Figure 32. Higher cut-off frequency vs. output capacitors 40 Higher Cut-off Frequency (kHz) 4.2 10 1 200 400 600 C1, C2 (pF) 800 1000 For example, FCH is almost 20 kHz with C1,2 = 100 pF. Doc ID 11015 Rev 6 13/25 Application information 4.3 TS472 Lower cut-off frequency The lower cut-off frequency FCL of the microphone preamplifier depends on the input capacitors Cin and output capacitors Cout. These input and output capacitors are mandatory in an application because of DC voltage blocking. The input capacitors Cin in series with the input impedance of the TS472 (100 k) are equivalent to a first order high-pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3 dB attenuation), the minimum value of Cin is: 1 C in = -----------------------------------------------------3 2 F CL 100 x 10 The capacitors Cout in series with the output resistors Rout (or an input impedance of the next stage) are also equivalent to a first order high-pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3 dB attenuation), the minimum value of Cout is: 1 C out = -----------------------------------------2 F CL R out Figure 33. Lower cut-off frequency vs. input capacitors Figure 34. Lower cut-off frequency vs. output capacitors 1000 1000 Rout=10k Lower Cut-off frequency (Hz) Lower Cut-off frequency (Hz) ZinMAX Typical Zin 100 ZinMIN 10 1 10 Cin (nF) 100 100 Rout=100k 10 1 10 100 1000 Cout (nF) Figure 33 and Figure 34 give directly the lower cut-off frequency (with 3 dB attenuation) versus the value of the input or output capacitors. Note: If FCL is kept the same for calculation purposes, take into account that the 1st order highpass filter on the input and the 1st order high-pass filter on the output create a 2nd order high-pass filter in the audio signal path with an attenuation of 6 dB on FCL and a roll-off of 40 dB/decade. 4.4 Low-noise microphone bias source The TS472 provides a very low noise voltage and power supply rejection BIAS source designed for biasing an electret condenser microphone cartridge. The BIAS output is typically set at 2.0 VDC (no load conditions), and can typically source 2 mA with respect to drop-out, determined by the internal 100 resistance (for detailed load regulation curves see Figure 8). 14/25 Doc ID 11015 Rev 6 TS472 Application information 4.5 Gain settings The gain in the application depends mainly on: the sensitivity of the microphone, the distance to the microphone, the audio level of the sound, the desired output level. The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1 V/Pa. For example, the microphone used in testing had an output voltage of 6.3 mV for a sound pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is: 20Log(0.0063) = -44 dB/Pa To facilitate the first approach, Table 10 gives voltages and gains used with a low-cost omnidirectional electret condenser microphone of -44 dB/Pa. Table 10. Typical TS472 gain vs. distance to the microphone (sensitivity -44 dB/Pa) Distance to microphone Microphone output voltage TS472 gain 1 cm 30 mVRMS 20 20 cm 3 mVRMS 100 The gain of the TS472 microphone preamplifier can be set as follows. 1. From -1.5 dB to 41 dB by connecting an external grounded resistor RGS to the GS pin. This enables the gain to be adapted more precisely to each application. Table 11. Selected gain vs. gain select resistor Gain (dB) 0 10 20 30 40 RGS () 470k 27k 4k7 1k 68 Figure 35. Gain in dB vs. gain select resistor Figure 36. Gain in V/V vs. gain select resistor 50 Tamb=25 C Tamb=25 C 100 40 Gain (V/V) Gain (dB) 30 20 10 10 0 1 -10 10 100 2. 1k 10k R GS ( ) 100k 1M 10 100 1k 10k R GS ( ) 100k 1M To 20 dB by applying VGS > 1VDC on the gain select (GS) pin. This setting can help to reduce a number of external components in an application, because 2.0 VDC is provided by the TS472 itself on the BIAS pin. Doc ID 11015 Rev 6 15/25 Application information TS472 Figure 37 gives other values of the gain vs. voltage applied on the GS pin. Figure 37. Gain vs. gain select voltage Tamb=25 C 40 Gain (dB) 20 0 -20 -40 -60 -80 0 0.2 0.4 0.6 0.8 V GS (V ) 4 5 Note: In the case of a single-ended output configuration (either positive or negative output is used for the following signal processing) the overall gain is half. One must also take into account that all advantages of the differential configuration principles are lost (see the difference in PSRR in Table 5). 4.6 Wake-up time When the standby mode is released to switch the device to ON, a signal appears on the output a few microseconds later, and the bypass capacitor Cb is charged within a few milliseconds. As Cb is directly linked to the bias of the amplifier, the bias will not work properly until the Cb voltage is correct. In a typical application, when a biased microphone is connected to the differential input via the input capacitors (Cin), (and the output signal is in line with the specification), the wake-up time will depend upon the values of the input capacitors Cin and the gain. When the gain is lower than 0 dB, the wake-up time is determined only by the bypass capacitor Cb, as described above. For a gain superior to 0 dB, refer to Figure 38. Figure 38. Wake-up time in a typical application vs. input capacitors 60 Wake-up Time (ms) 50 Tamb = 25C Vcc=3V Cb=1 F 40 Maximum Gain Gain=20dB 30 20 10 0 16/25 20 40 60 Input capacitors C IN (nF) Doc ID 11015 Rev 6 80 100 TS472 4.7 Application information Standby mode When the standby command is set, it takes a few microseconds to set the output stages (differential outputs and 2.0 V bias output) to high impedance and the internal circuitry to shutdown mode. 4.8 Layout considerations The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply rejection and low noise performance, it is mandatory that the layout track to these components be as short as possible. Decoupling capacitors on VCC and bypass pin are needed to eliminate power supply drops. In addition, the capacitor location for the dedicated pin should be as close to the device as possible. Single-ended input configuration It is possible to use the TS472 in a single-ended input configuration. The schematic in Figure 39 provides an example of this type of configuration. Figure 39. Typical single-ended input application Optional C1 VCC Cs 1uF Cin+ + A3 B3 C2 TS472 Cout+ A1 IN+ OUT+ C2 B1 IN- OUT- D2 Positive Output Cout- G BIAS 2.0V Bias STDBY A2 GAIN SELECT B2 BYPASS D1 Rout+ Negative Output Cin- C3 Electret Mic Vcc C1 U1 D3 Rpos GND C3 1uF C2 C1 4.9 Rout- Cb 1uF Standby Control Doc ID 11015 Rev 6 17/25 Application information 4.10 TS472 Demonstration board A demonstration board for the TS472 is available. For more information about this demonstration board, refer to application note AN2240 on www.st.com. Figure 40. PCB top layer Figure 41. PCB bottom layer Figure 42. Component location 18/25 Doc ID 11015 Rev 6 TS472 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Flip-chip package information Figure 43. TS472 footprint recommendation 75m min. 100m max. 500m 500m 500m =250m Track =400m typ. 150m min. =340m min. 500m 5.1 Non Solder mask opening Pad in Cu 18m with Flash NiAu (2-6m, 0.2m max.) Figure 44. Pinout (top view) 3 C1 2 OUTPUT BIAS 1 C2 STDBY VCC GS OUT+ OUT- IN+ IN- GND BYPASS A B C D Balls are underneath Doc ID 11015 Rev 6 19/25 Package information TS472 Figure 45. Marking (top view) ST logo Part number: 472 E Lead free bumps Three digits datecode: YWW The dot indicates pin A1 E 472 YWW Figure 46. Flip-chip - 12 bumps 2.1 mm 1.6 mm Die size: 2.1 mm x 1.6 mm 30 m Die height (including bumps): 600 m Bumps diameter: 315 m 50 m 0.5mm 0.5mm 0.315mm 600m Bump diameter before reflow: 300 m 10 m Bump height: 250 m 40 m Die height: 350 m 20 m Pitch: 500 m 50 m Coplanarity: 50 m max Figure 47. Tape & reel specification (top view) 1.5 4 1 1 A Die size Y + 70m A 8 Die size X + 70m 4 All dimensions are in mm User direction of feed 20/25 Doc ID 11015 Rev 6 TS472 5.2 Package information QFN24 package information Figure 48. QFN24 package mechanical drawing D A A1 D1 A2 Nd 0.50 DIA. 1 2 3 E1 E Ne 0 P b D2 R Q SEATING 1 PLANE 2 3 E2 L e Doc ID 11015 Rev 6 21/25 Package information Table 12. TS472 QFN24 package mechanical data Dimensions Ref. Millimeters Min. A Typ. 0.80 A1 Max. Min. 1.00 0.031 Typ. Max. 0.040 0.05 0.002 A2 0.65 D 4.00 0.158 D1 3.75 0.148 E 4.00 0.158 E1 3.75 0.148 0.80 0.026 0.031 P 0.24 0.42 0.60 0.009 0.017 0.024 R 0.13 0.17 0.23 0.005 0.007 0.009 e 0.50 0.020 N 24.00 0.945 Nd 6.00 0.236 Ne 6.00 0.236 L 0.30 b 0.18 Q 0.40 0.50 0.012 0.30 0.007 0.20 0.45 0.016 0.020 0.012 0.008 0.018 D2 1.95 2.10 2.25 0.077 0.083 0.089 E2 1.95 2.10 2.25 0.077 0.083 0.089 O 22/25 Inches 12 Doc ID 11015 Rev 6 TS472 6 Ordering information Ordering information Table 13. Order codes Temperature range Package Packing Marking TS472EIJT -40C, +85C Flip-chip Tape & reel 472 TS472IQT -40C, +85C QFN24 4x4mm Tape & reel K472 Order code Doc ID 11015 Rev 6 23/25 Revision history 7 TS472 Revision history Table 14. 24/25 Document revision history Date Revision Changes 01-Jul-05 1 Initial release corresponding to product preview version. 01-Oct-05 2 First release of fully mature product datasheet. 01-Dec-05 3 Added single-ended input operation in Section 4: Application information. 12-Sep-2006 4 Added QFN package information. Updated curves, added new ones in Section 3: Electrical characteristics. 02-Mar-2009 5 Corrected error on C1 and C2 caps. Added Table 2: Pin descriptions. Updated QFN24 package information in Section 5.2. 25-Aug-2009 6 Corrected QFN package pinout on cover page. Doc ID 11015 Rev 6 TS472 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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