2N7002E TrenchMOSTM Logic Level FET Rev. 01 -- 11 February 2002 Product data M3D088 1. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM1 technology. Product availability: 2N7002E in SOT23. 2. Features TrenchMOSTM technology Very fast switching Logic level compatible Subminiature surface mount package. 3. Applications Relay driver High speed line driver Logic level translator. 4. Pinning information Table 1: Pinning - SOT23, simplified outline and symbol Pin Description 1 gate (g) 2 source (s) 3 drain (d) Simplified outline Symbol 3 d g 03ab44 1 2 SOT23 1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V. s 03ab30 N-channel MOSFET 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit VDS drain-source voltage (DC) Tj = 25 to 150 C - 60 V ID drain current (DC) Tsp = 25 C; VGS = 10 V - 385 mA Ptot total power dissipation Tsp = 25 C - 0.83 W Tj junction temperature - 150 C RDSon drain-source on-state resistance VGS = 10 V; ID = 500 mA; Tj = 25 C 2.3 3 VGS = 4.5 V; ID = 75 mA; Tj = 25 C 3.1 4 Min Max Unit 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDS drain-source voltage (DC) Tj = 25 to 150 C - 60 V VDGR drain-gate voltage (DC) Tj = 25 to 150 C; RGS = 20 k - 60 V VGS gate-source voltage (DC) - 30 V VGSM peak gate-source voltage - 40 V ID drain current (DC) tp 50 s; pulsed; duty cycle = 25% Tsp = 25 C; VGS = 10 V; Figure 2 and 3 - 385 mA Tsp = 100 C; VGS = 10 V; Figure 2 - 245 mA IDM peak drain current Tsp = 25 C; pulsed; tp 10 s; Figure 3 - 1.5 A Ptot total power dissipation Tsp = 25 C; Figure 1 - 0.83 W Tstg storage temperature -65 +150 C Tj operating junction temperature -65 +150 C Source-drain diode IS source (diode forward) current (DC) Tsp = 25 C - 385 mA ISM peak source (diode forward) current Tsp = 25 C; pulsed; tp 10 s - 1.5 A (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 2 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 03aa17 03aa25 120 120 Pder Ider (%) (%) 80 80 40 40 0 0 0 50 100 150 o 0 200 50 100 150 o 200 Tsp ( C) Tsp ( C) VGS 4.5 V P tot P der = ----------------------- x 100% P ID I der = ------------------- x 100% I tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. 03ai10 10 ID (A) RDSon = VDS / ID tp = 10 s 1 100 s 1 ms 10-1 10 ms DC 100 ms 10-2 1 102 10 VDS (V) Tsp = 25 C; IDM is single pulse; VGS = 10 V. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 3 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-sp) thermal resistance from junction to solder point mounted on a metal clad board; Figure 4 - - 150 K/W Rth(j-a) thermal resistance from junction to ambient - 350 K/W mounted on a printed circuit board; minimum footprint - 7.1 Transient thermal impedance 03ai09 103 Zth(j-sp) K/W 102 = 0.5 0.2 0.1 10 0.05 0.02 = P 1 tp T single pulse t tp T 10-1 10-5 10-4 10-3 10-2 10-1 1 10 tp (s) Mounted on metal clad substrate. Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 4 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 8. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) IDSS gate-source threshold voltage drain-source leakage current ID = 10 A; VGS = 0 V Tj = 25 C 60 75 - V Tj = -55 C 55 - - V Tj = 25 C 1 2 - V Tj = 150 C 0.6 - - V Tj = -55 C - - 3.5 V - 0.01 1.0 A ID = 1 mA; VDS = VGS; Figure 9 VDS = 48 V; VGS = 0 V Tj = 25 C Tj = 150 C - - 10 A - 10 100 nA Tj = 25 C - 2.3 3 Tj = 150 C - 4.2 5.55 - 3.1 4 IGSS gate-source leakage current VGS = 15 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 10 V; ID = 500 mA; Figure 7 and 8 VGS = 4.5 V; ID = 75 mA; Figure 7 and 8 Tj = 25 C Dynamic characteristics gfs forward transconductance VDS = 10 V; ID = 200 mA 100 300 - mS Ciss input capacitance VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 11 - 25 40 pF Coss output capacitance - 18 30 pF Crss reverse transfer capacitance - 7.5 10 pF ton turn-on time - 3 10 ns toff turn-off time - 12 15 ns - 0.85 1.5 V - 30 - ns - 30 - nC VDD = 50 V; RD = 250 ; VGS = 10 V; RG = 50 ; RGS = 50 Source-drain diode VSD source-drain (diode forward) voltage IS = 300 mA; VGS = 0 V; Figure 12 trr reverse recovery time Qr recovered charge IS = 300 mA; dIS/dt = -100 A/s; VGS = 0 V; VDS = 25 V (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 5 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 03ai12 1 ID Tj = 25 C (A) ID (A) 5V 0.8 03ai16 0.8 10 V 7 V 6 V o VDS > ID X RDSon 0.6 4.5 V o Tj = 25 C o 150 C 0.6 4V 0.4 0.4 3.5 V 0.2 0.2 3V VGS = 2.5 V 0 0 0 0.8 1.6 2.4 3.2 0 VDS (V) Tj = 25 C. 2 4 VGS (V) 6 Tj = 25 C and 150 C; VDS > ID x RDSon. Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. 03ai14 6 VGS = 3.5 V 4V Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values. 03aa28 2.4 o Tj = 25 C a RDSon 4.5 V () 1.8 5V 4 6V 1.2 7V 10 V 2 0.6 0 0 0 0.2 0.4 0.6 0.8 1 -60 0 ID (A) Tj = 25 C. 120 o Tj ( C) 180 R DSon a = ---------------------------R DSon ( 25 C ) Fig 7. Drain-source on-state resistance as a function of drain current; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data 60 Rev. 01 -- 11 February 2002 6 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 03aa34 2.4 03aa37 10-1 ID VGS(th) (V) (A) 10-2 typ 1.8 10-3 min typ 1.2 min 10-4 0.6 10-5 10-6 0 -60 0 60 120 o Tj ( C) 180 0 0.6 1.2 1.8 2.4 VGS (V) Tj = 25 C; VDS = 5 V. ID = 1 mA; VDS = VGS. Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03ai18 102 03ai17 0.8 IS (A) C (pF) VGS = 0 V 0.6 Ciss 10 0.4 Coss 0.2 o Crss 150 C 1 0 10-1 1 10 VDS (V) 102 0 0.4 0.8 VSD (V) 1.2 Tj = 25 C and 150 C; VGS = 0 V. VGS = 0 V; f = 1 MHz. Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data o Tj = 25 C Rev. 01 -- 11 February 2002 7 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 9. Package outline Plastic surface mounted package; 3 leads SOT23 D E B A X HE v M A 3 Q A A1 1 2 e1 bp c w M B Lp e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max. bp c D E e e1 HE Lp Q v w mm 1.1 0.9 0.1 0.48 0.38 0.15 0.09 3.0 2.8 1.4 1.2 1.9 0.95 2.5 2.1 0.45 0.15 0.55 0.45 0.2 0.1 OUTLINE VERSION SOT23 REFERENCES IEC JEDEC EIAJ TO-236AB EUROPEAN PROJECTION ISSUE DATE 97-02-28 99-09-13 Fig 13. SOT23. (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 8 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 10. Revision history Table 6: Revision history Rev Date 01 20020211 CPCN Description - Product spec; initial version (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Product data Rev. 01 -- 11 February 2002 9 of 11 2N7002E Philips Semiconductors TrenchMOSTM Logic Level FET 11. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 12. Definitions 13. Disclaimers Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Product data Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09095 Rev. 01 -- 11 February 2002 10 of 11 Philips Semiconductors 2N7002E TrenchMOSTM Logic Level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 (c) Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 11 February 2002 Document order number: 9397 750 09095