2N7002E
TrenchMOS™ Logic Level FET
Rev. 01 — 11 February 2002 Product data
M3D088
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
2N7002E in SOT23.
2. Features
■TrenchMOS™ technology
■Very fast switching
■Logic level compatible
■Subminiature surface mount package.
3. Applications
■Relay driver
■High speed line driver
■Logic level translator.
4. Pinning information
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Table 1: Pinning - SOT23, simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
SOT23 N-channel MOSFET
2 source (s)
3 drain (d)
12
3
03ab44
d
g
s
03ab30
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 2 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
5. Quick reference data
6. Limiting values
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
VDS drain-source voltage (DC) Tj=25to150°C - 60 V
IDdrain current (DC) Tsp =25°C; VGS = 10 V - 385 mA
Ptot total power dissipation Tsp =25°C - 0.83 W
Tjjunction temperature - 150 °C
RDSon drain-source on-state resistance VGS = 10 V; ID= 500 mA; Tj=25°C 2.3 3 Ω
VGS = 4.5 V; ID= 75 mA; Tj=25°C 3.1 4 Ω
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage (DC) Tj=25to150°C - 60 V
VDGR drain-gate voltage (DC) Tj=25to150°C; RGS =20kΩ-60V
VGS gate-source voltage (DC) - ±30 V
VGSM peak gate-source voltage tp≤50 µs; pulsed; duty cycle = 25% - ±40 V
IDdrain current (DC) Tsp =25°C; VGS =10V;Figure 2 and 3- 385 mA
Tsp = 100 °C; VGS =10V;Figure 2 - 245 mA
IDM peak drain current Tsp =25°C; pulsed; tp≤10 µs; Figure 3 - 1.5 A
Ptot total power dissipation Tsp =25°C; Figure 1 - 0.83 W
Tstg storage temperature −65 +150 °C
Tjoperating junction temperature −65 +150 °C
Source-drain diode
ISsource (diode forward) current (DC) Tsp =25°C - 385 mA
ISM peak source (diode forward) current Tsp =25°C; pulsed; tp≤10 µs - 1.5 A
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 3 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
VGS ≥4.5 V
Fig 1. Normalized total power dissipation as a
function of solder point temperature. Fig 2. Normalized continuous drain current as a
function of solder point temperature.
Tsp =25°C; IDM is single pulse; VGS = 10 V.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
03aa17
0
40
80
120
0 50 100 150 200
T
sp
(oC)
P
der
(%)
03aa25
0
40
80
120
0 50 100 150 200
T
sp
(oC)
I
der
(%)
Pder Ptot
Ptot 25 C
°
()
----------------------- 100%×=Ider ID
ID25C
°
()
------------------- 100%×=
03ai10
10-2
10-1
1
10
1 10 102
V
DS
(V)
I
D
(A)
DC
100 ms
10 ms
R
DSon
= V
DS
/ I
D
1 ms
t
p
= 10 µs
100 µs
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 4 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
7. Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance from junction to solder point mounted on a metal clad board; Figure 4 - - 150 K/W
Rth(j-a) thermal resistance from junction to ambient mounted on a printed circuit board;
minimum footprint - - 350 K/W
Mounted on metal clad substrate.
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
03ai09
10-1
1
10
102
103
10-5 10-4 10-3 10-2 10-1 1 10
t
p
(s)
Z
th(j-sp)
K/W
single pulse
0.2
0.1
0.05
0.02
δ = 0.5
tp
tp
T
P
t
T
δ =
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 5 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
8. Characteristics
Table 5: Characteristics
T
j
=25
°
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage ID=10µA; VGS =0V
Tj=25°C6075-V
Tj=−55 °C55--V
VGS(th) gate-source threshold voltage ID= 1 mA; VDS =V
GS;Figure 9
Tj=25°C12-V
Tj= 150 °C 0.6 - - V
Tj=−55 °C - - 3.5 V
IDSS drain-source leakage current VDS =48V; V
GS =0V
Tj=25°C - 0.01 1.0 µA
Tj= 150 °C--10µA
IGSS gate-source leakage current VGS =±15 V; VDS = 0 V - 10 100 nA
RDSon drain-source on-state resistance VGS =10V; I
D= 500 mA; Figure 7 and 8
Tj=25°C - 2.3 3 Ω
Tj= 150 °C - 4.2 5.55 Ω
VGS = 4.5 V; ID= 75 mA; Figure 7 and 8
Tj=25°C - 3.1 4 Ω
Dynamic characteristics
gfs forward transconductance VDS =10V; I
D= 200 mA 100 300 - mS
Ciss input capacitance VGS =0V; V
DS = 10 V; f = 1 MHz; Figure 11 -2540pF
Coss output capacitance - 18 30 pF
Crss reverse transfer capacitance - 7.5 10 pF
ton turn-on time VDD = 50 V; RD= 250 Ω; VGS =10V;
RG=50Ω; RGS =50Ω- 3 10 ns
toff turn-off time -1215ns
Source-drain diode
VSD source-drain (diode forward) voltage IS= 300 mA; VGS =0V;Figure 12 - 0.85 1.5 V
trr reverse recovery time IS= 300 mA; dIS/dt = −100 A/µs; VGS =0V;
VDS =25V -30-ns
Qrrecovered charge - 30 - nC
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 6 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Tj=25°C. Tj=25°C and 150 °C; VDS >ID×RDSon.
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values. Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Tj=25°C.
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values. Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03ai12
0
0.2
0.4
0.6
0.8
1
0 0.8 1.6 2.4 3.2
V
DS
(V)
I
D
(A)
3 V
T
j
= 25oC
V
GS
= 2.5 V
3.5 V
4 V
10 V
4.5 V
5 V
6 V7 V
03ai16
0
0.2
0.4
0.6
0.8
0246
V
GS
(V)
I
D
(A) V
DS
> I
D
X R
DSon
T
j
= 25
o
C150
o
C
03ai14
0
2
4
6
0 0.2 0.4 0.6 0.8 1
I
D
(A)
R
DSon
(Ω)
V
GS
= 3.5 V T
j
= 25oC
4.5 V
4 V
7 V
6 V
5 V
10 V
03aa28
0
0.6
1.2
1.8
2.4
-60 0 60 120 180
T
j
(oC)
a
aRDSon
RDSon 25 C
°
()
-----------------------------
=
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 7 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
ID= 1 mA; VDS =V
GS.T
j=25°C; VDS =5V.
Fig 9. Gate-source threshold voltage as a function of
junction temperature. Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
VGS = 0 V; f = 1 MHz. Tj=25°C and 150 °C; VGS =0V.
Fig 11. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
03aa34
0
0.6
1.2
1.8
2.4
-60 0 60 120 180
T
j
(
o
C)
V
GS(th)
(V) typ
min
03aa37
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
0 0.6 1.2 1.8 2.4
V
GS
(V)
I
D
(A)
typmin
03ai18
1
10
102
10-1 1 10 102
V
DS
(V)
C
(pF) C
iss
C
oss
C
rss
03ai17
0
0.2
0.4
0.6
0.8
0 0.4 0.8 1.2
V
SD
(V)
I
S
(A)
T
j
= 25
o
C
150
o
C
V
GS
= 0 V
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 8 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9. Package outline
Fig 13. SOT23.
UNIT A1
max. bpcDE e1HELpQwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
97-02-28
99-09-13
IEC JEDEC EIAJ
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23 TO-236AB
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
wM
vMA
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface mounted package; 3 leads SOT23
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
Product data Rev. 01 — 11 February 2002 9 of 11
9397 750 09095 © Koninklijke Philips Electronics N.V. 2002. All rights reserved.
10. Revision history
Table 6: Revision history
Rev Date CPCN Description
01 20020211 - Product spec; initial version
9397 750 09095
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 10 of 11
9397 750 09095
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 10 of 11
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.Fax: +31 40 27 24825
11. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
12. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
13. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Data sheet status[1] Product status[2] Definition
Objective data Development This data sheet contains data from the objective specification forproductdevelopment.PhilipsSemiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
© Koninklijke Philips Electronics N.V. 2002.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 11 February 2002 Document order number: 9397 750 09095
Contents
Philips Semiconductors 2N7002E
TrenchMOS™ Logic Level FET
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7.1 Transient thermal impedance . . . . . . . . . . . . . . 4
8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 10
12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
