November 2011 Doc ID 15732 Rev 2 1/13
13
STF10N65K3
N-channel 650 V, 0.9 Ω, 10 A, TO-220FP
SuperMESH3™ Power MOSFET
Features
■100% avalanche tested
■Extremely high dv/dt capability
■Gate charge minimized
■Very low intrinsic capacitances
■Improved diode reverse recovery
characteristics
■Zener-protected
Application
■Switching applications
Description
This SuperMESH3™ Power MOSFET is the
result of improvements applied to
STMicroelectronics’ SuperMESH™ technology,
combined with a new optimized vertical structure.
This device boasts an extremely low on-
resistance, superior dynamic performance and
high avalanche capability, rendering it suitable for
the most demanding applications.
Figure 1. Internal schematic diagram
Type VDSS
RDS(on)
max IDPw
STF10N65K3 650 V < 1 Ω10 A 35 W
TO-220FP
12
3
D(2)
G(1)
S(3)
AM01476v1
Table 1. Device summary
Order codes Marking Package Packaging
STF10N65K3 10N65K3 TO-220FP Tube
www.st.com
Contents STF10N65K3
2/13 Doc ID 15732 Rev 2
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STF10N65K3 Electrical ratings
Doc ID 15732 Rev 2 3/13
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain source voltage 650 V
VGS Gate-source voltage ± 30 V
IDDrain current (continuous) at TC = 25 °C 10 A
IDDrain current (continuous) at TC = 100 °C 6.3 A
IDM (1)
1. Pulse width limited by safe operating area.
Drain current (pulsed) 40 A
PTOT Total dissipation at TC = 25 °C 35 W
IAR
Max current during repetitive or single pulse
avalanche (pulse width limited by TJMAX)7.2 A
EAS Single pulse avalanche energy (2)
2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V
212 mJ
Derating factor 0.28 W/°C
dv/dt (3)
3. ISD ≤ 10 A, di/dt = 100 A/µs, VPeak < V(BR)DSS
Peak diode recovery voltage slope 12 V/ns
VESD(G-S) G-S ESD (HBM C=100 pF, R=1.5 kΩ) 2500 V
VISO
Insulation withstand voltage (RMS) from all three
leads to external heat sink (t=1 s;TC=25 °C) 2500 V
Tj
Tstg
Operating junction temperature
Storage temperature -55 to 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case max 3.57 °C/W
Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W
TlMaximum lead temperature for soldering purpose 300 °C
Electrical characteristics STF10N65K3
4/13 Doc ID 15732 Rev 2
2 Electrical characteristics
(Tcase = 25 °C unless otherwise specified)
Table 4. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS
Drain-source
breakdown voltage ID = 1 mA, VGS = 0 650 V
IDSS
Zero gate voltage
drain current (VGS = 0)
VDS = 650 V
VDS = 650 V, TC=125 °C
1
50
µA
µA
IGSS
Gate-body leakage
current (VDS = 0) VGS = ± 20 V ±10 µA
VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4.5 V
RDS(on)
Static drain-source on
resistance VGS = 10 V, ID = 3.6 A 1 Ω
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0 -
1180
125
14
-
pF
pF
pF
Coss eq.
Equivalent output
capacitance VDS = 0 to 520 V, VGS = 0 - 77 - pF
RGIntrinsic gate resistnce f=1 MHz open drain - 3 - Ω
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 520 V, ID = 7.2 A,
VGS = 10 V
(see Figure 16)
-
42
7.4
23
-
nC
nC
nC
STF10N65K3 Electrical characteristics
Doc ID 15732 Rev 2 5/13
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
VDD = 310 V, ID = 3.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 15)
-
14.5
14
44
35
-
ns
ns
ns
ns
Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD
ISDM (1)
1. Pulse width limited by safe operating area.
Source-drain current
Source-drain current (pulsed) -7.2
28.8
A
A
VSD (2)
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage ISD = 7 A, VGS = 0 - 1.5 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7 A, di/dt = 100A/µs
VDD = 60 V (see Figure 20)-
320
2
13
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 20)
-
410
2.9
14
ns
µC
A
Table 8. Gate-source Zener diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
BVGSO
Gate-source breakdown
voltage Igs=± 1 mA (open drain) 30 - - V
Electrical characteristics STF10N65K3
6/13 Doc ID 15732 Rev 2
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance
I
D
100
10
1
0.1
0.1 1100 V
DS
(V)
10
(A)
Operation in this area is
Limited by max RDS(on)
10µs
100µs
1ms
10ms
Tj=150°C
Tc=25°C
Sinlge
pulse
AM03922v1
I
D
6
4
2
0010 V
DS
(V)
20
(A)
8
10
5V
6V
7V
V
GS
=10V
12
14
16
18
AM03923v1
I
D
3
2
1
014V
GS
(V)
8
(A)
26
4
5
3579
6
7
8
9
10
11
12 V
DS =
15 V
AM03924v1
BV
DSS
-75 -25 T
J
(°C)
(norm)
-50 75
25 50 100
0.90
0.95
1.00
1.05
1.10
125 150
0
ID= 1 mA
AM03925v1
R
DS(on)
0.75
0.70
0.65
0.60
02I
D
(A)
(Ω)
13
0.80
0.85
0.90
0.95
4567
V
GS
= 10 V
AM03926v1
STF10N65K3 Electrical characteristics
Doc ID 15732 Rev 2 7/13
Figure 8. Output capacitance stored energy Figure 9. Capacitance variations
Figure 10. Gate charge vs gate-source voltage Figure 11. Normalized on resistance vs
temperature
Figure 12. Normalized gate threshold voltage
vs temperature
Figure 13. Maximum avalanche energy vs
temperature
E
oss
3
2
1
0
0100 V
DS
(V)
(µJ)
400
4
200 300
5
6
500 600
7
8
AM03929v1
C
1000
100
10
1
0.1 10 V
DS
(V)
(pF)
1100
Ciss
Coss
Crss
AM03928v1
V
GS
6
4
2
0010 Q
g
(nC)
(V)
40
8
20 30
10
V
DD
=520V
I
D
=7A
50
12
300
200
100
0
400
500
V
DS
(V)
AM03927v1
R
DS(on)
2.0
1.5
1.0
0.5
-50 0T
J
(°C)
(norm)
-25 75
25 50 100 125 150
2.5
0.0
I
D
= 1.2 A
AM03931v1
V
GS(th)
1.00
0.90
0.80
0.70
-50 0T
J
(°C)
(norm)
-25
1.10
75
25 50 100 125 150
I
D
= 100 µA
AM03930v1
E
AS
040 T
J
(°C)
(mJ)
20 100
60 80
0
20
40
60
80
120 140
100
120
140
160
180
200
220
I
D
=7.2 A
V
DD
=50 V
AM03933v1
Electrical characteristics STF10N65K3
8/13 Doc ID 15732 Rev 2
Figure 14. Source-drain diode forward
characteristics
V
SD
02I
SD
(A)
(V)
15
34
0.4
0.5
0.6
0.7
0.8
0.9
T
J
=-50°C
T
J
=150°C
T
J
=25°C
8
67
0.3
AM03932v1
STF10N65K3 Test circuits
Doc ID 15732 Rev 2 9/13
3 Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
Figure 17. Test circuit for inductive load
switching and diode recovery times
Figure 18. Unclamped inductive load test
circuit
Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
µF
3.3
µFVDD
AM01469v1
VDD
47kΩ1kΩ
47kΩ
2.7kΩ
1kΩ
12V
Vi=20V=VGMAX
2200
µF
PW
IG=CONST
100Ω
100nF
D.U.T.
VG
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
AA
BB
RG
G
FAST
DIODE
D
S
L=100µH
µF
3.31000
µFVDD
AM01471v1
Vi
Pw
VD
ID
D.U.T.
L
2200
µF
3.3
µFVDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
VGS
Package mechanical data STF10N65K3
10/13 Doc ID 15732 Rev 2
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
STF10N65K3 Package mechanical data
Doc ID 15732 Rev 2 11/13
Figure 21. TO-220FP drawing
Table 9. TO-220FP mechanical data
Dim.
mm
Min. Typ. Max.
A4.4 4.6
B2.5 2.7
D 2.5 2.75
E0.45 0.7
F0.75 1
F1 1.15 1.70
F2 1.15 1.70
G4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
7012510_Rev_K
A
B
H
Dia
L7
D
E
L6 L5
L2
L3
L4
F1 F2
F
G
G1
STF10N65K3
Doc ID 15732 Rev 2 13/13
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