The RF Power MOS Line
   
N–Channel Enhancement Mode
Designed primarily for linear large–signal output stages to 80 MHz.
Specified 50 Volts, 30 MHz Characteristics
Output Power = 600 Watts
Power Gain = 21 dB (Typ)
Efficiency = 45% (Typ)
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 125 Vdc
Drain–Gate Voltage VDGO 125 Vdc
Gate–Source Voltage VGS ±40 Vdc
Drain Current — Continuous ID60 Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD1350
7.7 Watts
W/°C
Storage Temperature Range Tstg –65 to +150 °C
Operating Junction Temperature TJ200 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 0.13 °C/W
NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.

600 W, to 80 MHz
MOS LINEAR
RF POWER FET
CASE 368–03, STYLE 2
Order this document
by MRF157/D
SEMICONDUCTOR TECHNICAL DATA
1
REV 1
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) V(BR)DSS 125 Vdc
Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS 20 mAdc
Gate–Body Leakage Current (VGS = 20 V, VDS = 0) IGSS 5.0 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) VGS(th) 1.0 3.0 5.0 Vdc
Drain–Source On–Voltage (VGS = 10 V, ID = 40 A) VDS(on) 1.0 3.0 5.0 Vdc
Forward Transconductance (VDS = 10 V, ID = 20 A) gfs 16 24 mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 50 V, VGS = 0 V, f = 1.0 MHz) Ciss 1800 pF
Output Capacitance
(VDS = 50 V, VGS = 0, f = 1.0 MHz) Coss 750 pF
Reverse Transfer Capacitance
(VDS = 50 V, VGS = 0, f = 1.0 MHz) Crss 75 pF
FUNCTIONAL TESTS
Common Source Amplifier Power Gain
(VDD = 50 V, Pout = 600 W, IDQ = 800 mA, f = 30 MHz) Gps 15 21 dB
Drain Efficiency
(VDD = 50 V, Pout = 600 W, f = 30 MHz, IDQ = 800 mA) h 40 45 %
Intermodulation Distortion
(VDD = 50 V, Pout = 600 W(PEP), f1 = 30 MHz,
f2 = 30.001 MHz, IDQ = 800 mA)
IMD(d3) –25 dB
Figure 1. 30 MHz Test Circuit
C1, C3, C8 — Arco 469
C2 — 330 pF
C4 — 680 pF
C5, C19, C20 — 0.47 µF, RMC Type 2225C
C6, C7, C14, C15, C16 — 0.1 µF
C9, C10, C11 — 470 pF
C12 — 1000 pF
C13 — Two Unencapsulated 1000 pF Mica, in Series
C17, C18 — 0.039 µF
C21 — 10 µF/100 V Electrolytic
L1 — 2 Turns #16 AWG, 1/2 ID, 3/8 Long
L2, L3 — Ferrite Beads, Fair–Rite Products Corp. #2673000801
R1, R2 — 10 Ohms/2W Carbon
T1 — RF Transformer, 1:25 Impedance Ratio. See M/A-COM
T1 — Application Note AN749, Figure 4 for details.
T1 — Ferrite Material: 2 Each, Fair–Rite Products
T1 — Corp. #2667540001
All capacitors ATC type 100/200 chips or equivalent unless otherwise noted.
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2
REV 1
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Figure 2. Power Gain versus Frequency Figure 3. Output Power versus Input Power
Figure 4. DC Safe Operating Area Figure 5. Capacitance versus Drain Voltage
Figure 6. Gate Voltage versus Drain Current Figure 7. Gate–Source Voltage versus
Case Temperature
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3
REV 1
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Figure 8. Output Power versus Input Power
Under Pulse Conditions (2 x MRF157) Figure 9. Thermal Response versus
Pulse Width
Figure 10. Series Equivalent Impedance
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Note: Pulse data for this graph was taken in a push–pull circuit similar
Note: to the one shown. However, the output matching network was
Note: modified for the higher level of peak power.
Note: To determine Z OL*, use formula = ZOL*
(VCC
Vsat)2
2P
o
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4
REV 1
C1 — 1000 pF Ceramic Disc Capacitor
C2, C3, C4 — 0.1 µF Ceramic Disc Capacitor
C5 — 0.01 µF Ceramic Chip Capacitor
C6, C12 — 0.1 µF Ceramic Chip Capacitor
C7, C8 — Two 2200 pF Ceramic Chip Capacitors in Parallel
C7, C8 — Each
C9 — 820 pF Ceramic Chip Capacitor
C10, C11 — 1000 pF Ceramic Chip Capacitor
C13 — 0.47 µF Ceramic Chip Capacitor or Two Smaller
C13 —Values in Parallel
C14 — Unencapsulated Mica, 500 V. Two 1000 pF Units
C14 — in Series, Mounted Under T2
D1 — 1N5357A or Equivalent
D2, D3 — 1N4148 or Equivalent.
IC1 — MC1723 (723) Voltage Regulator
L1, L2 — 15 ηH, Connecting Wires to R14 and R15,
L1, L2 — 2.5 cm Each #20 AWG
Figure 11. 2.0 to 50 MHz, 1.0 kW Wideband Amplifier
L3 — 10 µH, 10 Turns #12 AWG Enameled Wire on
L3 — Fair–Rite Products Corp. Ferrite Toroid #5961000401 or Equivalent
R1, R2 — 1.0K Single Turn Trimpots
R3 — 10K Single Turn Trimpot
R4 — 470 Ohms, 2.0 Watts
R5 — 10 Ohms
R6, R12, R13 — 2.0K Ohms
R7 — 10K Ohms
R8 — Exact Value Depends on Thermistor R9 used
R8 — (Typically 5.0–10K)
R9 — Thermistor, Keystone RL1009–5820–97–D1 or
R9 — Equivalent
R10, R11 — 100 Ohms, 1.0W Carbon
R14, R15 — EMC Technology Model 5308 or KDI
R14, R15 — Pyrofilm PPR 870–150–3 Power Resistors,
R14, R15 — 25 Ohms
T1, T2 — 9:1 and 1:9 Impedance Ratio RF Transformers
Unless otherwise noted, all resistors are 1/2 watt metal film type. All chip capacitors except C13 are ATC type 100/200B or Dielectric Laboratories type C17.
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RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between the terminals. The metal oxide gate structure deter-
mines the capacitors from gate–to–drain (Cgd), and gate–to–
source (Cgs). The PN junction formed during the fabrication
of the TMOS FET results in a junction capacitance from
drain–to–source (Cds).
These capacitances are characterized as input (Ciss), out-
put (Coss) and reverse transfer (Crss) capacitances on data
sheets. The relationships between the interterminal capaci-
tances and those given on data sheets are shown below. The
Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operat-
ing conditions in RF applications.
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LINEARITY AND GAIN CHARACTERISTICS
In addition to the typical IMD and power gain data pres-
ented, Figure 5 may give the designer additional information
on the capabilities of this device. The graph represents the
small signal unity current gain frequency at a given drain cur-
rent level. This is equivalent to fT for bipolar transistors.
Since this test is performed at a fast sweep speed, heating of
the device does not occur. Thus, in normal use, the higher
temperatures may degrade these characteristics to some ex-
tent.
DRAIN CHARACTERISTICS
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, VDS(on), occurs in the
linear region of the output characteristic and is specified un-
der specific test conditions for gate–source voltage and drain
current. For MOSFETs, VDS(on) has a positive temperature
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
GATE CHARACTERISTICS
The gate of the TMOS FET is a polysilicon material, and is
electrically isolated from the source by a layer of oxide. The
input resistance is very high — on the order of 109 ohms —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
VGS(th).
5
REV 1
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are es-
sentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. The addition of
an internal zener diode may result in detrimental effects on
the reliability of a power MOSFET. If gate protection is re-
quired, an external zener diode is recommended.
IMPEDANCE CHARACTERISTICS
Device input and output impedances are normally obtained
by measuring their conjugates in an optimized narrow band test
circuit. These test circuits are designed and constructed for a
number of frequency points depending on the frequency cover-
age of characterization. For low frequencies the circuits consist
of standard LC matching networks including variable capacitors
for peak tuning. At increasing power levels the output imped-
ance decreases, resulting in higher RF currents in the matching
network. This makes the practicality of output impedance mea-
surements in the manner described questionable at power lev-
els higher than 200–300 W for devices operated at 50 V and
150–200 W for devices operated at 28 V. The physical sizes
and values required for the components to withstand the RF
currents increase to a point where phys ical construction of the
output matc hing network gets difficult if not impossible. For this
reason the output impedances are not given for high power de-
vices such as the MRF154 and MRF157. However, formulas
like (VDS – Vsat)2
2Pout
for a single ended design
or
2((VDS – Vsat)2)
Pout for a push–pull design can be used to
obtain reasonably close approximations to actual values.
MOUNTING OF HIGH POWER RF
POWER TRANSISTORS
The package of this device is designed for conduction
cooling. It is extremely important to minimize the thermal re-
sistance between the device flange and the heat dissipator.
If a copper heatsink is not used, a copper head spreader is
strongly recommended between the device mounting sur-
faces and the main heatsink. It should be at least 1/4 thick
and extend at least one inch from the flange edges. A thin
layer of thermal compound in all interfaces is, of course, es-
sential. The recommended torque on the 4–40 mounting
screws should be in the area of 4–5 lbs.–inch, and spring
type lock washers along with flat washers are recommended.
For die temperature calculations, the temperature from a
corner mounting screw area to the bottom center of the
flange is approximately 5°C and 10°C under normal operat-
ing conditions (dissipation 150 W and 300 W respectively).
The main heat dissipator must be sufficiently large and
have low Rθ for moderate air velocity, unless liquid cooling is
employed.
CIRCUIT CONSIDERATIONS
At high power levels (500 W and up), the circuit layout be-
comes critical due to the low impedance levels and high RF
currents associated with the output matching. Some of the
components, such as capacitors and inductors must also
withstand these currents. The component losses are directly
proportional to the operating frequency. The manufacturers
specifications on capacitor ratings should be consulted on
these aspects prior to design.
Push–pull circuits are less critical in general, since the
ground referenced RF loops are practically eliminated, and
the impedance levels are higher for a given power output.
High power broadband transformers are also easier to de-
sign than comparable LC matching networks.
EQUIVALENT TRANSISTOR PARAMETER TERMINOLOGY
Collector Drain. . . . . . . . . . . . . . . . .
Emitter Source. . . . . . . . . . . . . . . . .
Base Gate. . . . . . . . . . . . . . . . .
V(BR)CES V(BR)DSS
. . . . . . . . . . . . . . . . .
VCBO VDGO
. . . . . . . . . . . . . . . . .
ICID
. . . . . . . . . . . . . . . . . . . . . .
ICES IDSS
. . . . . . . . . . . . . . . . .
IEBO IGSS
. . . . . . . . . . . . . . . . .
VBE(on) VGS(th)
. . . . . . . . . . . . . . . . .
VCE(sat) VDS(on)
. . . . . . . . . . . . . . . . .
Cib Ciss
. . . . . . . . . . . . . . . . .
Cob Coss
. . . . . . . . . . . . . . . . .
hfe gfs
. . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
RCE(sat) = VCE(sat)
ICRDS(on) = VDS(on)
ID
6
REV 1
PACKAGE DIMENSIONS
CASE 368–03
ISSUE C

     
 
   
 
  
 
 
U
V
K
N
D
Q4 PL
–A–
–B–

N
CEJ
H


–T–
    

   
   
   
   
   
   
   
   
   
   
 
 
7
Specifications subject to change without notice.
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Visit www.macom.com for additional data sheets and product information.
REV 1