Semiconductor Components Industries, LLC, 2012
February, 2012 Rev. 13
1Publication Order Number:
1SMB10CAT3/D
1SMB10CAT3G Series,
SZ1SMB10CAT3G Series
600 Watt Peak Power Zener
Transient Voltage
Suppressors
Bidirectional
The SMB series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. The SMB series is supplied in
ON Semiconductors exclusive, cost-effective, highly reliable
SURMETIC package and is ideally suited for use in
communication systems, automotive, numerical controls, process
controls, medical equipment, business machines, power supplies and
many other industrial/consumer applications.
Features
Working Peak Reverse Voltage Range 10 V to 75 V
Standard Zener Breakdown Voltage Range 11.7 V to 91.7 V
Peak Power 600 Watts @ 1 ms
ESD Rating of Class 3 (> 16 kV) per Human Body Model
Maximum Clamp Voltage @ Peak Pulse Current
Low Leakage < 5 mA Above 10 V
UL 497B for Isolated Loop Circuit Protection
Response Time is Typically < 1 ns
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AECQ101 Qualified and
PPAP Capable
PbFree Packages are Available*
Mechanical Characteristics
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260C for 10 Seconds
LEADS: Modified LBend providing more contact area to bond pads
POLARITY: Polarity band will not be indicated
MOUNTING POSITION: Any
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
PLASTIC SURFACE MOUNT
ZENER OVERVOLTAGE
TRANSIENT SUPPRESSORS
1078 V, 600 W PEAK POWER
Device** Package Shipping
ORDERING INFORMATION
SMB
CASE 403C
PLASTIC
A = Assembly Location
Y = Year
WW = Work Week
xxC = Specific Device Code
= (See Table on Page 3)
G= PbFree Package
MARKING DIAGRAM
**The “T3” suffix refers to a 13 inch reel.
1SMBxxCAT3G SMB
(PbFree)
2,500 /
Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Individual devices are listed on page 3 of this data sheet.
http://onsemi.com
ALYW
xxCG
G
(Note: Microdot may be in either location)
SZ1SMBxxCAT3G SMB
(PbFree)
2,500 /
Tape & Reel
BiDirectional TVS
IPP
IPP
V
I
IR
IT
IT
IR
VRWM
VCVBR
VRWM VC
VBR
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
2
MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation (Note 1) @ TL = 25C, Pulse Width = 1 ms PPK 600 W
DC Power Dissipation @ TL = 75C Measured Zero Lead Length (Note 2)
Derate Above 75C
Thermal Resistance from JunctiontoLead
PD
RqJL
3.0
40
25
W
mW/C
C/W
DC Power Dissipation (Note 3) @ TA = 25C
Derate Above 25C
Thermal Resistance from JunctiontoAmbient
PD
RqJA
0.55
4.4
226
W
mW/C
C/W
Operating and Storage Temperature Range TJ, Tstg 65 to +150 C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 X 1000 ms, nonrepetitive
2. 1 square copper pad, FR4 board
3. FR4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec
*Please see 1SMB5.0AT3 to 1SMB170AT3 for Unidirectional devices
ELECTRICAL CHARACTERISTICS
(TA = 25C unless otherwise noted)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS
Device*
Device
Marking
VRWM
(Note 4) IR @ VRWM
Breakdown Voltage VC @ IPP (Note 6) Ctyp
(Note 7)
VBR (Note 5) Volts @ ITVCIPP
Volts mAMin Nom Max mA Volts Amps pF
1SMB10CAT3G
1SMB11CAT3G
1SMB12CAT3G
1SMB13CAT3G
KXC
KZC
LEC
LGC
10
11
12
13
5.0
5.0
5.0
5.0
11.1
12.2
13.3
14.4
11.69
12.84
14.00
15.16
12.27
13.5
14.7
15.9
1.0
1.0
1.0
1.0
17.0
18.2
19.9
21.5
35.3
33.0
30.2
27.9
805
740
680
630
1SMB14CAT3G
1SMB15CAT3G
1SMB16CAT3G
1SMB17CAT3G
LKC
LMC
LPC
LRC
14
15
16
17
5.0
5.0
5.0
5.0
15.6
16.7
17.8
18.9
16.42
17.58
18.74
19.90
17.2
18.5
19.7
20.9
1.0
1.0
1.0
1.0
23.2
24.4
26.0
27.6
25.8
24.0
23.1
21.7
590
555
520
490
1SMB18CAT3G
1SMB20CAT3G
1SMB22CAT3G
1SMB24CAT3G
LTC
LVC
LXC
LZC
18
20
22
24
5.0
5.0
5.0
5.0
20.0
22.2
24.4
26.7
21.06
23.37
25.69
28.11
22.1
24.5
27.0
29.5
1.0
1.0
1.0
1.0
29.2
32.4
35.5
38.9
20.5
18.5
16.9
15.4
465
425
390
366
1SMB26CAT3G
1SMB28CAT3G
1SMB30CAT3G
1SMB33CAT3G
MEC
MGC
MKC
MMC
26
28
30
33
5.0
5.0
5.0
5.0
28.9
31.1
33.3
36.7
30.42
32.74
35.06
38.63
31.9
34.4
36.8
40.6
1.0
1.0
1.0
1.0
42.1
45.4
48.4
53.3
14.2
13.2
12.4
11.3
330
310
290
265
1SMB36CAT3G
1SMB40CAT3G
1SMB43CAT3G
1SMB45CAT3G
MPC
MRC
MTC
MVC
36
40
43
45
5.0
5.0
5.0
5.0
40.0
44.4
47.8
50.0
42.11
46.74
50.32
52.63
44.2
49.1
52.8
55.3
1.0
1.0
1.0
1.0
58.1
64.5
69.4
72.2
10.3
9.3
8.6
8.3
245
220
210
200
1SMB48CAT3G
1SMB51CAT3G
1SMB54CAT3G
1SMB58CAT3G
MXC
MZC
NEC
NGC
48
51
54
58
5.0
5.0
5.0
5.0
53.3
56.7
60.0
64.4
56.11
59.69
63.16
67.79
58.9
62.7
66.32
71.18
1.0
1.0
1.0
1.0
77.4
82.4
87.1
93.6
7.7
7.3
6.9
6.4
190
175
170
155
1SMB60CAT3G
1SMB64CAT3G
1SMB75CAT3G
NKC
NMC
NRC
60
64
75
5.0
5.0
5.0
66.7
71.1
83.3
70.21
74.84
91.65
73.72
78.58
92.07
1.0
1.0
1.0
96.8
103
121
6.2
5.8
4.9
150
145
125
4. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than
the DC or continuous peak operating voltage level.
5. VBR measured at pulse test current IT at an ambient temperature of 25C.
6. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data 600 Watt at the beginning of this group.
7. Bias Voltage = 0 V, F = 1 MHz, TJ = 25C
*Include SZ-prefix devices where applicable.
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
4
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
tP
, PULSE WIDTH
1
10
100
0.1 ms1 ms10 ms 100 ms1 ms 10 ms
0.1
Figure 1. Pulse Rating Curve
01234
0
50
100
t, TIME (ms)
VALUE (%)
HALF VALUE - IPP
2
PEAK VALUE - IPP
tr 10 ms
Figure 2. Pulse Waveform
TYPICAL PROTECTION CIRCUIT
Vin VL
Zin
LOAD
Figure 3. Pulse Derating Curve
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ T
A= 25 C
100
80
60
40
20
00 25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (C)
120
140
160
tP
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAYS TO 50%
OF IPP
.
PPK, PEAK POWER (kW)
Figure 4. Typical Junction Capacitance vs. Bias
Voltage
BIAS VOLTAGE (V)
1000
100
10
1
100101
C, CAPACITANCE (pF)
TJ = 25C
f = 1 MHz
1SMB10CAT3G
1SMB18CAT3G
1SMB48CAT3G
1SMB75CAT3G
5
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
5
APPLICATION NOTES
Response Time
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is to clamp voltage spikes. The SMB series have
a very good response time, typically < 1 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
Duty Cycle Derating
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 ms pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
VL
V
Vin
Vin (TRANSIENT)
VL
td
V
Vin (TRANSIENT)
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t t
Figure 5. Figure 6.
Figure 7. Typical Derating Factor for Duty Cycle
DERATING FACTOR
1 ms
10 ms
1
0.7
0.5
0.3
0.05
0.1
0.2
0.01
0.02
0.03
0.07
100 ms
0.1 0.2 0.5 2 5 10 501 20 100
D, DUTY CYCLE (%)
PULSE WIDTH
10 ms
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
6
UL RECOGNITION
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGQ2)
under the UL standard for safety 497B and File #E210057.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
including Strike Voltage Breakdown test, Endurance
Conditioning, Temperature test, Dielectric
Voltage-Withstand test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
1SMB10CAT3G Series, SZ1SMB10CAT3G Series
http://onsemi.com
7
PACKAGE DIMENSIONS
SMB
CASE 403C01
ISSUE A
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ǒmm
inchesǓ
SCALE 8:1
2.743
0.108
2.159
0.085
2.261
0.089
A
S
DB
J
P
K
C
H
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN
DIMENSION P.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.160 0.180 4.06 4.57
B0.130 0.150 3.30 3.81
C0.075 0.095 1.90 2.41
D0.077 0.083 1.96 2.11
H0.0020 0.0060 0.051 0.152
J0.006 0.012 0.15 0.30
K0.030 0.050 0.76 1.27
P0.020 REF 0.51 REF
S0.205 0.220 5.21 5.59
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
1SMB10CAT3/D
SURMETIC is a registered trademark of Semiconductor Components Industries, LLC.
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative