N1611 SY 20111019-S00003 No.A1998-1/23
http://onsemi.com
Semiconductor Components Industries, LLC, 2013
June, 2013
LV8727
Overview
The LV8727 is a PWM current-controlled micro step bipolar stepping motor driver. This driver can do eight ways of
micro step resolution of Half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 Step, and can drive simply by the step input.
Features
• Single-channel PWM current control stepping motor driver.
• Output on-resistance (upper side : 0.25Ω ; lower side : 0.15Ω ; total of upper and lower : 0.4Ω ; Ta = 25°C, IO = 4.0A)
• Half, 1/8, 1/16, 1/32, 1/64, 1/128, 1/10, 1/20 Step are selectable.
• Advance the excitation step with the only step signal input.
• BiCDMOS process IC. • Available forward reverse control.
• IO max=4.0A • Thermal shutdown circuit.
• Input pull down resistance • With reset pin and enable pin.
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Supply voltage VM max 50 V
Output current IO max 4A
Output peak current IO peak tw≤10ms, duty 20% 4.6 A
Logic input voltage VIN max 6V
VREF input voltage VREF max 6V
MO / DOWN pin input voltage VMO /VDOWN max 6V
Allowable power dissipation Pd max Indipendent IC 2.45 W
Operating temperature Topr -30 to +85 °C
Storage temperature Tstg -55 to +150 °C
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Bi-CMOS LSI
PWM Current Control
Stepping Motor Driver
Orderin
g
numbe
r
: ENA1998
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
LV8727
No.A1998-2/23
Recommendation Operating Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Supply voltage range VM 9 to 45 V
Logic input voltage VIN 0 to 5 V
VREF input voltage range VREF 0 to 3 V
Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V
Ratings
Parameter Symbol Conditions min typ max
Unit
Standby mode current drain IMst ST = “L” 70 100 μA
Current drain IM ST = “H”, OE = “H”, no load 3.5 4.9 mA
Thermal shutdown temperature TSD Design guarantee 150 180 200 °C
Thermal hysteresis width ΔTSD Design guarantee 40 °C
IINL VIN = 0.8V 3 8 15 μA Logic pin input current
IINH VIN = 5V 30 50 70 μA
Logic high-level input voltage VINH 2.0 V
Logic low-level input voltage VINL 0.8 V
FDT pin high-level voltage Vfdth 3.5 V
FDT pin middle-level voltage Vfdtm 1.1 3.1 V
FDT pin low-level voltage Vfdtl 0.8 V
Chopping frequency Fch Cosc1 = 100pF 70 100 130 kHz
OSC1 pin charge/discharge current Iosc1 7 10 13 μA
Vtup1 0.8 1 1.2 V Chopping oscillation circuit
threshold voltage Vtdown1 0.3 0.5 0.7 V
VREF pin input voltage Iref VREF = 1.5V -0.5 μA
DOWN output residual voltagr VO1DOWN Idown = 1mA 50 200 mV
MO pin residual voltage VO1MO Imo = 1mA 50 200 mV
Hold current switching frequency Fdown Cosc2 = 1500pF 1.12 1.6 2.08 Hz
OSC2 pin charge/discharge current Iosc2 7 10 13 μA
Vtup2 0.8 1 1.2 V Hold current switching frequency
threshold voltage Vtdown2 0.3 0.5 0.7 V
Ronu IO = 4.0A, high-side ON resistance 0.25 0.325 Output on-resistance
Rond IO = 4.0A, low-side ON resistance 0.15 0.195
Output leakage current IOleak VM = 50V 50 μA
Diode forward voltage VD ID = -4.0A 1 1.3 V
Current setting reference voltage VRF VREF = 1.5V, Current ratio 100% 0.485 0.5 0.515 V
LV8727
No.A1998-3/23
Package Dimensions
unit : mm (typ)
3236A
SANYO : HZIP25
2.0
29.2
25.6
(22.8)
(2.6)
(5.0)
(12.3)
(1.0) 0.52
(R1.7)
0.4
18.6 max
(14.4)
4.5
(11.0)
3.5
21.7
14.5
4.2
4.0
(8.5) ( 2.5)
125
2.0
Pd max - Ta
0
1.0
2.0
3.0
2.45
—
30 60 90300 120
1.27
Allowable power dissipation, Pd max - W
Ambient temperature, Ta - C
LV8727
No.A1998-4/23
Block Diagram
OSC1
OE
MO
RSTSTEPFRMD3MD2MD1
OSC2
ST
TSD
VREF
SGND
PGND1
RF1 OUT1A
OUT1B OUT2A
OUT2B RF2
VM2
VM1
+
-
+
-
+
-+
-
DOWN
PGND2
FDT
Decay Mode
setting circuit
Current
select
circuit
Output pre stage
Output control logic
Current
select
circuit
Oscllator
Regulator 1
Regulator 2
Output pre stage
Output pre stage
Output pre stage
LV8727
No.A1998-5/23
Pin Assignment
Pin Functions
Pin No. Pin Name Pin Functtion Equivalent Circuit
7
8
9
10
11
12
13
MD1
MD2
MD3
OE
RST
FR
STEP
Excitation mode switching pin
Excitation mode switching pin
Excitation mode switching pin
Output enable signal input pin
Reset signal input pin
Forward / Reverse signal input pin
Clock pulse signal input pin
GND
Internal 5V
regulator
6 ST Chip enable input pin.
GND
Internal 5V
regulator
1
2
3
4
5
21
22
23
24
25
OUT1B
RF1
PGND1
OUT1A
VM1
VM2
OUT2B
PGND2
RF2
OUT2A
Channel 1 OUTB output pin.
Channel 1 current-sense resistor connection pin.
Channel 1 power GND
Channel 1 OUTA output pin.
Channel 1 motor supply connect pin
Channel 2 motor supply connect pin
Channel 2 OUTB output pin.
Channel 2 power GND
Channel 2 current-sense resistor connection pin.
Channel 2 OUTA output pin.
GND
1 22
521
254
224
233
Continued on next page.
OUT1B
RF1
PGND1
OUT1A
VM1
ST
MD1
MD2
MD3
OE
RST
OUT2A
FR
STEP
RF2
OSC1
OSC2
VM2
FDT
DOWN
PGND2
MO
OUT2B
VREF
SGND
Top view
LV8727
1210
3456789 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
LV8727
No.A1998-6/23
Continued from preceding page.
Pin No. Pin Name Pin Functtion Equivalent Circuit
19 VREF Constant-current control reference voltage input pin.
GND
Internal 5V
regulator
17
18
DOWN
MO
Holding current output pin.
Position detecting monitor pin.
GND
Internal 5V
regulator
14
15
OSC1
OSC2
Chopping frequency setting capacitor connection pin.
Holding current detection time setting capacitor
connection pin.
GND
Internal 5V
regulator
16 FDT Decay mode select voltage input
GND
Internal 5V
regulator
LV8727
No.A1998-7/23
Reference describing operation
(1) Stand-by function
When ST pin is at low levels, the IC enters stand-by mode, all logic is reset and output is turned OFF.
When ST pin is at high levels, the stand-by mode is released.
(2) STEP pin function
STEP input advances electrical angle at every nising edge (advances step by step).
Input
ST STEP
Operating mode
Low * Standby mode
High
Excitation step proceeds
High
Excitation step is kept
(3) Excitation setting method
Set the excitation setting as shown in the following table by setting MD1 pin, MD2 pin and MD3 pin.
Input Initial position
MD3 MD2 MD1
Mode
(Excitation) 1ch current 2ch current
Low Low Low Half 100% 0%
Low Low High 1/8 100% 0%
Low High Low 1/16 100% 0%
Low High High 1/32 100% 0%
High Low Low 1/64 100% 0%
High Low High 1/128 100% 0%
High High Low 1/10 100% 0%
High High High 1/20 100% 0%
The initial position is also the default state at start-up and excitation position at counter-reset in each Micro step
resolution.
(4) MO output pin
MO output pin serves as open-drain connection.
If MO pin will be in the state of an initial position, it is turned on, and it outputs a Low level.
Excitation position MO
Initial position Low
Other initial position OPEN
(5) Output current setting
Output current is set shown below by the VREF pin (applied voltage) and a resistance value between RF1(2) pin and
GND.
IOUT = ( VREF / 3 ) / RF1 (2) resistance
* The setting value above is a 100% output current in each excitation mode.
(Example) When VREF = 0.9V and RF1 (2) resistance is 0.1, the setting is shown below.
IOUT = ( 0.9V / 3 ) / 0.1 = 3A
LV8727
No.A1998-8/23
(6) Output enable function
When the OE pin is set Low, the output is forced OFF and goes to high impedance. However, the internal logic circuits
are operating, so the excitation position proceeds when the STP is input. Therefore, when OE pin is returned to High,
the output level conforms to the excitation position proceeded by the STEP input.
OE Operation mode
L Output: OFF
H Output: ON
(7) Reset function
When the RST pin is set Low, the output goes to initial mode and excitation position is fixed in the initial position for
STEP pin and FR pin input. MO pin outputs at low levels at the initial position. (Open drain connection)
RST Operation mode
H Normal operation
L Reset state
OE Power save mode
0%
STEP
MO
1ch output
2ch output
Output is high-impedance
RST RESET
0%
STEP
MO
1ch output
2ch output
Initial state
LV8727
No.A1998-9/23
(8) Forward / reverse switching function
FR Operating mode
Low Clockwise (CW)
High Counter-clockwise (CCW)
The internal D/A converter proceeds by a bit on the rising edge of the step signal input to the STEP pin. In addition,
CW and CCW mode are switched by FR pin setting.
In CW mode, the channel 2 current phase is delayed by 90° relative to the channel 1 current.
In CCW mode, the channel 2 current phase is advanced by 90° relative to the channel 1 current.
(9) DECAY mode setting
Current DECAY method is selectable as shown below by applied voltage to the FDT pin.
FDT voltage DECAY method
3.5V to SLOW DECAY
1.1V to 3.1V or OPEN MIXED DECAY
To 0.8V FAST DECAY
(10) Chopping frequency setting function
Chopping frequency is set as shown below by a capacitor between OSC1 pin and GND.
Fcp = 1 / ( Cosc1 / 10 х 10-6 ) (Hz)
(Example) When Cosc1 = 180pF, the chopping frequency is shown below.
Fcp = 1 / ( 180 х 10-12 / 10 х 10-6 ) = 55.6(kHz)
FR CW mode CW modeCCW mode
STEP
Excitation position
1ch output
2ch output
(1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5)
LV8727
No.A1998-10/23
(11) Output current in each micro step resolution
Output current vector locus (one step is normalized to 90 degrees)
Half, 1/8, 1/16, 1/32, 1/64, 1/128 Step
Current setting ratio in each micro step resolution
1/128
(
%
)
1/64
(
%
)
1/32
(
%
)
1/16
(
%
)
1/8
(
%
)
Half
(
%
)
STEP 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch
0 100 0 100 0 100 0 100 0 100 0 100 0
1 100 1
2 100 2 100 2
3 100 4
4 100 5 100 5 100 5
5 100 6
6 100 7 100 7
7 100 9
8 100 10 100 10 100 10 100 10
9 99 11
10 99 12 99 12
11 99 13
12 99 15 99 15 99 15
13 99 16
14 99 17 99 17
15 98 18
16 98 20 98 20 98 20 98 20 98 20
17 98 21
18 98 22 98 22
19 97 23
20 97 24 97 24 97 24
21 97 25
22 96 27 96 27
23 96 28
24 96 29 96 29 96 29 96 29
25 95 30
Continued on next page.
0.0
33.3
66.7
100.0
0.0 33.3 66.7 100.0
Channel 1 current ratio (%)
Channel 2 current ratio (%)
LV8727
No.A1998-11/23
Continued from preceding page.
1/128
(
%
)
1/64
(
%
)
1/32
(
%
)
1/16
(
%
)
1/8
(
%
)
Halfe
(
%
)
STEP 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch
26 95 31 95 31
27 95 33
28 94 34 94 34 94 34
29 94 35
30 93 36 93 36
31 93 37
32 92 38 92 38 92 38 92 38 92 38
33 92 39
34 91 41 91 41
35 91 42
36 90 43 90 43 90 43
37 90 44
38 89 45 89 45
39 89 46
40 88 47 88 47 88 47 88 47
41 88 48
42 87 49 87 49
43 86 50
44 86 51 86 51 86 51
45 85 52
46 84 53 84 53
47 84 55
48 83 56 83 56 83 56 83 56 83 56
49 82 57
50 82 58 82 58
51 81 59
52 80 60 80 60 80 60
53 80 61
54 79 62 79 62
55 78 62
56 77 63 77 63 77 63 77 63
57 77 64
58 76 65 76 65
59 75 66
60 74 67 74 67 74 67
61 73 68
62 72 69 72 69
63 72 70
64 71 71 71 71 71 71 71 71 71 71 71 71
65 70 72
66 69 72 69 72
67 68 73
68 67 74 67 74 67 74
69 66 75
70 65 76 65 76
71 64 77
72 63 77 63 77 63 77 63 77
73 62 78
74 62 79 62 79
75 61 80
76 60 80 60 80 60 80
77 59 81
78 58 82 58 82
79 57 82
80 56 83 56 83 56 83 56 83 56 83
81 55 84
82 53 84 53 84
83 52 85
84 51 86 51 86 51 86
85 50 86
86 49 87 49 87
87 48 88
88 47 88 47 88 47 88 47 88
89 46 89
90 45 89 45 89
Continued on next page.
LV8727
No.A1998-12/23
Continued from preceding page.
1/128
(
%
)
1/64
(
%
)
1/32
(
%
)
1/16
(
%
)
1/8
(
%
)
Half
(
%
)
STEP 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch 1ch 2ch
91 44 90
92 43 90 43 90 43 90
93 42 91
94 41 91 41 91
95 39 92
96 38 92 38 92 38 92 38 92 38 92
97 37 93
98 36 93 36 93
99 35 94
100 34 94 34 94 34 94
101 33 95
102 31 95 31 95
103 30 95
104 29 96 29 96 29 96 29 96
105 28 96
106 27 96 27 96
107 25 97
108 24 97 24 97 24 97
109 23 97
110 22 98 22 98
111 21 98
112 20 98 20 98 20 98 20 98 20 98
113 18 98
114 17 99 17 99
115 16 99
116 15 99 15 99 15 99
117 13 99
118 12 99 12 99
119 11 99
120 10 100 10 100 10 100 10 100
121 9 100
122 7 100 7 100
123 6 100
124 5 100 5 100 5 100
125 4 100
126 2 100 2 100
127 1 100
128 0 100 0 100 0 100 0 100 0 100 0 100
LV8727
No.A1998-13/23
Output current vector locus (one step is normalized to 90 degrees)
1/10, 1/20 STEP
Current setting ratio in each micro step resolution
1/10, 1/20 STEP
1/20
(
%
)
1/10
(
%
)
STEP 1ch 2ch 1ch 2ch
0 100 0 100 0
1 100 8
2 99 16 99 16
3 97 23
4 95 31 95 31
5 92 38
6 89 45 89 45
7 85 52
8 81 59 81 59
9 76 65
10 71 71 71 71
11 65 76
12 59 81 59 81
13 52 85
14 45 89 45 89
15 38 92
16 31 95 31 95
17 23 97
18 16 99 16 99
19 8 100
20 0 100 0 100
0.0
33.3
66.7
100.0
0.0 33.3 66.7 100.0
Channel 1 current ratio (%)
Channel 2 current ratio (%)
LV8727
No.A1998-14/23
(12) Current wave example in each micro step resolution (Half, 1/16, 1/128, 1/20 STEP)
Half STEP (CW mode)
1/16 STEP (CW mode)
STEP
MO
I1
(%)
-100
-100
100
(%)
100
0
0
I2
STEP
MO
I1
-100
(%)
100
50
-50
0
I2
-100
(%)
100
50
-50
0
LV8727
No.A1998-15/23
1/128 STEP ( CW mode )
1/20 STEP ( CW mode )
STEP
MO
I1
-100
(%)
100
50
-50
0
I2
-100
(%)
100
50
-50
0
STEP
MO
I1
-100
(%)
100
50
-50
0
I2
-100
(%)
100
50
-50
0
LV8727
No.A1998-16/23
(13) Current control operation
SLOW DECAY current control operation
When FDT pin voltage is a voltage over 3.5V, the constant-current control is operated in SLOW DECAY mode.
( Sine-wave increasing direction )
( Sine-wave decreasing direction )
Each of current modes operates with the follow sequence.
The IC enters CHARGE mode at a rising edge of the chopping oscillation. ( A period of CHARGE mode (Blanking
Time) is forcibly present in approximately 1s, regardless of the current value of the coil current (ICOIL) and set
current (IREF)).
After the period of the blanking time, the IC operates in CHARGE mode until ICOIL IREF. After that, the mode
switches to the SLOW DECAY mode and the coil current is attenuated until the end of a chopping period.
At the constand-current in SLOW DECAY mode, following to the setting current from the coil current may take time
(or not follow) for the current delay attenuation.
SLOWCHARGESLOWCHARGE
STEP
SLOWSLOWCHARGE
STEP
Blanking T ime
Blanking T ime
Blanking T ime Blanking T ime
Setting current
Coil current
Current mode
Setting current
Setting current
Setting current
Coil current
Current mode
Chopping period
Chopping period Chopping period
SLOW
LV8727
No.A1998-17/23
FAST DECAY current control operation
When FDT pin voltage is a voltage under 0.8V, the constant-current control is operated in FAST DECAY mode.
(Sine-wave inxreasing direction)
(Sine-wave decreasing direction)
Each of current modes operates with the follow sequence.
The IC enters CHARGE mode at a rising edge of the chopping oscillation. ( A period of CHARGE mode (Blanking
Time) is forcibly present in approximately 1s, regardless of the current value of the coil current (ICOIL) and set
current (IREF)).
After the period of the blanking time, the IC operates in CHARGE mode until ICOIL IREF. After that, the mode
switches to the FAST DECAY mode and the coil current is attenuated until the end of a chopping period.
At the constand-current control in FAST DECAY mode, following to the setting current from the coil current take
short-time for the current fast attenuation, but, the current ripple value may be higher.
FASTCHARGEFASTCHARGE
STEP
FAST
STEP
CHARGE
Blanking T ime
Blanking T ime
FASTCHARGE
Blanking T ime
FAST
Setting current
Coil current
Current mode
Chopping period
Setting current
Setting current
Setting current
Chopping period
Coil current
Current mode
LV8727
No.A1998-18/23
MIXED DECAY current control operation
When FDT pin voltage is a voltage between 1.1V to 3.1V or OPEN, the constant-current control is operated in MIXED
DECAY mode.
(Sine-wave increasing direction)
(Sine-wave decreasing direction)
Each of current modes operates with the follow sequence.
The IC enters CHARGE mode at a rising edge of the chopping oscillation. ( A period of CHARGE mode (Blanking
Time) is forcibly present in approximately 1s, regardless of the current value of the coil current (ICOIL) and set
current (IREF)).
In a period of Blanking Time, the coil current (ICOIL) and the setting current (IREF) are compared.
If an ICOIL < IREF state exists during the charge period:
The IC operates in CHARGE mode until ICOIL IREF. After that, it switches to SLOW DECAY mode and
then switches to FAST DECAY mode in the last approximately 1s of the period.
If no ICOIL < IREF state exists during the charge period:
The IC switches to FAST DECAY mode and the coil current is attenuated with the FAST DECAY operation
until the end of a chopping period.
The above operation is repeated. Normally, in the sine wave increasing direction the IC operates in SLOW (+ FAST)
DECAY mode, and in the sine wave decresing direction the IC operates in FAST DECAY mode until the current is
attenuated and reaches the set value and the IC operates in SLOW (+ FAST) DECAY mode.
FASTSLOWCHARGEFASTSLOWCHARGE
STEP
FAST SLOWFASTSLOWCHARGE
STEP
CHARGE
Blanking T ime
Blanking T ime
Blanking T ime
Setting current
Coil current
Current mode
Chopping period
Setting current
Setting current
Setting current
Chopping period
Coil current
Current mode
LV8727
No.A1998-19/23
(13) Output short-circuit protection circuit
Built-in output short-circuit protection circuit makes output to enter in stand-by mode. This function prevents the IC
from damaging when the output shorts circuit by a voltage short or a ground short, etc. When output short state is
detected, short-circuit detection circuit state the operating and output is once turned OFF. Subsequently, the output is
turned ON again after the timer latch period ( typ. 256s ). If the output remains in the short-circuit state, turn OFF the
output, fix the output to the wait mode, and turn ON the EMO output.
When output is fixed in stand-by mode by output short protection circuit, output is released the latch by setting ST =
“L”.
Short-circuitShort-
circuit
Short-circuit
detection state
H-bridge
output state
Internal counter
1st counter
start 1st counter
stop 1st counter
start 1st counter
end 2nd counter
start 2nd counter
end
Release
Output OFF
Output ON
Output ON Standby state
LV8727
No.A1998-20/23
(15) DOWN output pin
The DOWN output pin is an open-drain connection.
This pin is turned ON when no rising edge of STEP between the input signals while a period determined by a
capacitor between OSC2 and GND, and outputs at low levels.
The open-drain output in once turned ON, is turned OFF at the next rising edge of STEP.
Holding current switching time ( Tdown ) is set as shown below by a capacitor between OSC2 pin and GND.
Tdown = Cosc2 х 0.4 х 109 (s)
(Example) When Cosc2 = 1500pF, the STEP signal detection time is shown below.
Tdown = 1500pF х 0.4 х 109 = 0.6 (s)
By connecting circumference parts like the example of the following circuit diagram using a DOWN pin, that is a STEP
signal is not inputted more than detection time, it is a DOWN output's turning on in the state of holding turning on
electricity the position of a stepping motor, and setting current's falling because VREF input voltage's falls, and
stopping power consumption -- it can do.
(Example) When V1=5V, R1=27k, R2=4.7k, R3=1k, the VREF input voltage is shown below.
DOWN output OFF: VREF=V1×R2/(R1+R2)=0.741V
DOWN output ON: VREF=V1×(R2R3)/ (R1+(R2R3))=0.126V
Tdown
OFF OFFLow
STEP input
DOWN output
Motor keepRotation Rotation
DOWN
VREF
R3
R1
R2
LV8727
No.A1998-21/23
Application Circuit Example
The above sample application circuit is set to the following conditions:
Constant-current setting
IOUT=VREF/3/RF
(Example) When is VREF=0.9V
IOUT=0.9V/3/0.1=3A
Chopping frequency setting
Fchop=Ichop/(Cchop×Vt×2)
=10µA/(180pF×0.5V×2)=55.6kHz
+-
M
RF1
PGND1
OUT1A
VM1
ST
MD1
MD2
MD3
OE
RST
OUT2A
FR
STEP
RF2
OSC1
OSC2
VM2
FDT
DOWN
PGND2
MO
OUT2B
VREF
SGND
LV8727
1210
3456789 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
OUT1B
180pF
+
-
+-
Logic
supply
Motor connect pin
Logic input
LV8727
No.A1998-22/23
HZIP25 Heat sink attachment
Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to
the outer environment and dissipating that heat.
a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be
applied to the heat sink or tabs.
b. Heat sink attachment
· Use flat-head screws to attach heat sinks.
· Use also washer to protect the package.
· Use tightening torques in the ranges 39-59Ncm(4-6kgcm) .
· If tapping screws are used, do not use screws with a diameter larger
than the holes in the semiconductor device itself.
· Do not make gap, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Take care a position of via hole .
· Do not allow dirt, dust, or other contaminants to get between the
semiconductor device and the tab or heat sink.
· Verify that there are no press burrs or screw-hole burrs on the heat sink.
· Warping in heat sinks and printed circuit boards must be no more than
0.05 mm between screw holes, for either concave or convex warping.
· Twisting must be limited to under 0.05 mm.
· Heat sink and semiconductor device are mounted in parallel.
Take care of electric or compressed air drivers
· The speed of these torque wrenches should never exceed 700 rpm, and
should typically be about 400 rpm.
c. Silicone grease
· Spread the silicone grease evenly when mounting heat sinks.
· Recommends YG-6260 (Momentive Performance Materials Japan LLC)
d. Mount
· First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board.
· When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening
up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin
doesn't hang.
e. When mounting the semiconductor device to the heat sink using jigs, etc.,
· Take care not to allow the device to ride onto the jig or positioning dowel.
· Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device.
f. Heat sink screw holes
· Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used.
· When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used.
A hole diameter about 15% larger than the diameter of the screw is desirable.
· When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about
15% smaller than the diameter of the screw is desirable.
g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not
recommended because of possible displacement due to fluctuation of the spring force with time or vibration.
Binding head
machine screw Countersunk head
mashine screw
Heat sink
gap
Via hole
LV8727
PS No.A1998-23/23
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