Ultralow Noise, High Accuracy
Voltage References
Data Sheet
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
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Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
FEATURES
Maximum temperature coefficient (TCVOUT): 2 ppm/°C
Output noise (0.1 Hz to 10 Hz)
Less than 1 μV p-p at VOUT of 2.048 V typical
Initial output voltage error: ±0.02% (maximum)
Input voltage range: 3 V to 15 V
Operating temperature:40°C to +125°C
Output current: +10 mA source/−10 mA sink
Low quiescent current: 950 μA (maximum)
Low dropout voltage: 300 mV at 2 mA (VOUT ≥ 3 V)
8-lead SOIC package
APPLICATIONS
Precision data acquisition systems
High resolution data converters
High precision measurement devices
Industrial instrumentation
Medical devices
Automotive battery monitoring
PIN CONFIGURATION
Figure 1. 8-Lead SOIC
GENERAL DESCRIPTION
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 devices are high precision, low power, low noise
voltage references featuring ±0.02% maximum initial error,
excellent temperature stability, and low output noise.
This family of voltage references uses an innovative core
topology to achieve high accuracy while offering industry-leading
temperature stability and noise performance. The low, thermally
induced output voltage hysteresis and low long-term output
voltage drift of the devices also improve system accuracy over
time and temperature variations.
A maximum operating current of 950 μA and a maximum low
dropout voltage of 300 mV allow the devices to function very
well in portable equipment.
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 series of references is provided in an 8-lead SOIC
package and is available in a wide range of output voltages, all of
which are specified over the extended industrial temperature
range of 40°C to +125°C.
Table 1. Selection Guide
Model Output Voltage (V)
ADR4520 2.048
ADR4525 2.5
ADR4530 3.0
ADR4533 3.3
ADR4540 4.096
ADR4550 5.0
Table 2. Voltage Reference Choices from Analog Devices
VOUT (V)
Low Cost/
Low Power Micropower
Ultralow
Noise
High Voltage,
High Performance
2.048 ADR360 REF191 ADR430
ADR3420 ADR440
2.5 ADR3425 ADR291 ADR431 ADR03
AD1582 REF192 ADR441 AD780
ADR361
5.0 ADR3450 ADR293 ADR435 ADR02
AD1585 REF195 ADR445 AD586
ADR365
NC
1
V
IN 2
NC
3
GND
4
TP
8
NC
7
V
OUT
6
NC
5
NOTES
1. NC = NO CONNE CT.
2. TP = TEST PIN. DO NOT CONNECT.
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
TOP VI EW
(No t t o Scale)
10203-001
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 2 of 32
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
ADR4520 Electrical Characteristics........................................... 3
ADR4525 Electrical Characteristics........................................... 4
ADR4530 Electrical Characteristics........................................... 5
ADR4533 Electrical Characteristics........................................... 6
ADR4540 Electrical Characteristics........................................... 7
ADR4550 Electrical Characteristics........................................... 8
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 11
ADR4520 ..................................................................................... 11
ADR4525 ..................................................................................... 14
ADR4530 ..................................................................................... 17
ADR4533 ..................................................................................... 20
ADR4540 ..................................................................................... 23
ADR4550 ..................................................................................... 26
Terminology .................................................................................... 29
Theory of Operation ...................................................................... 30
Long-Term Drift ......................................................................... 30
Power Dissipation....................................................................... 30
Applications Information .............................................................. 31
Basic Voltage Reference Connection ....................................... 31
Input and Output Capacitors .................................................... 31
Location of Reference in System .............................................. 31
Sample Applications ................................................................... 31
Outline Dimensions ....................................................................... 32
Ordering Guide ............................................................................... 32
REVISION HISTORY
4/12—Revision 0: Initial Version
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 3 of 32
SPECIFICATIONS
ADR4520 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3 V to 15 V, I L = 0 mA, TA = 25°C.
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 2.048 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
410 μV
A grade ±0.04 %
820 μV
SOLDER HEAT SHIFT ±0.02 %
TEMPERATURE COEFFICIENT TCVOUT B grade, −40°C TA ≤ +125°C 2 ppm/°C
A grade, −40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 100 120 ppm/mA
QUIESCENT CURRENT IQ 40°C TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C TA ≤ +125°C, no load 1 V
40°C TA ≤ +125°C, IL = 2 mA 1 V
RIPPLE REJECTION RATIO
RRR
f
IN
= 1 kHz
90
dB
OUTPUT CURRENT CAPACITY IL
Sinking −8 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.0 μV p-p
OUTPUT VOLTAGE NOISE DENSITY eN 1 kHz 35.8 nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT
ΔV
OUT_LTD
1000 hours at 60°C
25
ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 1 µF, CIN = 0.1 µF, RL = 1 kΩ 90 µs
LOAD CAPACITANCE 1 100 µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 4 of 32
ADR4525 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3 V to 15 V, I L = 0 mA, TA = 25°C.
Table 4.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 2.500 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
500 μV
A grade ±0.04 %
1 mV
SOLDER HEAT SHIFT
±0.02
%
TEMPERATURE COEFFICIENT TCVOUT B grade, 40°C ≤ TA ≤ +125°C 2 ppm/°C
A grade, 40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA ≤ +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
QUIESCENT CURRENT IQ 40°C TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C TA ≤ +125°C, no load 500 mV
40°C ≤ T
A
≤ +125°C, I
L
= 2 mA
500
mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking 10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.25 μV p-p
OUTPUT VOLTAGE NOISE DENSITY
e
N
1 kHz
41.3
nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT ΔVOUT_LTD 1000 hours at 60°C 25 ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 1 µF, CIN = 0.1 µF, RL = 1 kΩ 125 µs
LOAD CAPACITANCE 1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 5 of 32
ADR4530 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3.1 V to 15 V, I L = 0 mA, TA = 25°C.
Table 5.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 3.000 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
600 μV
A grade ±0.04 %
1.2 mV
SOLDER HEAT SHIFT
±0.02
%
TEMPERATURE COEFFICIENT TCVOUT B grade, 40°C ≤ TA ≤ +125°C 2 ppm/°C
A grade, 40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
QUIESCENT CURRENT IQ 40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C ≤ TA ≤ +125°C, no load 100 mV
40°C ≤ T
A
≤ +125°C, I
L
= 2 mA
300
mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking 10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 1.6 μV p-p
OUTPUT VOLTAGE NOISE DENSITY
e
N
1 kHz
60
nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT ΔVOUT_LTD 1000 hours at 60°C 25 ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 0.1 µF, CIN = 0.1 µF, RL = 1 kΩ 130 µs
LOAD CAPACITANCE 0.1 100 µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 6 of 32
ADR4533 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 3.4 V to 15 V, I L = 0 mA, TA = 25°C.
Table 6.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 3.300 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
660 µV
A grade ±0.04 %
1.32 mV
SOLDER HEAT SHIFT
±0.02
%
TEMPERATURE COEFFICIENT TCVOUT B grade, 40°C ≤ TA ≤ +125°C 2 ppm/°C
A grade, 40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA +125°C 30 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 60 120 ppm/mA
QUIESCENT CURRENT IQ 40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C ≤ TA ≤ +125°C, no load 100 mV
40°C ≤ T
A
≤ +125°C, I
L
= 2 mA
300
mV
RIPPLE REJECTION RATIO RRR fIN =1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking 10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.1 μV p-p
OUTPUT VOLTAGE NOISE DENSITY
e
N
1 kHz
64.2
nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT ΔVOUT_LTD 1000 hours at 60°C 25 ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 0.1 µF, CIN = 0.1 µF, RL = 1 kΩ 135 µs
LOAD CAPACITANCE 0.1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 7 of 32
ADR4540 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 4.2 V to 15 V, I L = 0 mA, TA = 25°C.
Table 7.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 4.096 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
820 μV
A grade ±0.04 %
1.64 mV
SOLDER HEAT SHIFT
±0.02
%
TEMPERATURE COEFFICIENT TCVOUT B grade, 40°C ≤ TA ≤ +125°C 2 ppm/°C
A grade, 40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA +125°C 25 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 50 120 ppm/mA
QUIESCENT CURRENT IQ 40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C ≤ TA ≤ +125°C, no load 100 mV
40°C ≤ T
A
≤ +125°C, I
L
= 2 mA
300
mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking 10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.7 μV p-p
OUTPUT VOLTAGE NOISE DENSITY
e
N
1 kHz
83.5
nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT ΔVOUT_LTD 1000 hours at 60°C 25 ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 0.1 µF, CIN = 0.1 µF, RL = 1 kΩ 155 µs
LOAD CAPACITANCE 0.1 100 µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 8 of 32
ADR4550 ELECTRICAL CHARACTERISTICS
Unless otherwise noted, VIN = 5.1 V to 15 V, I L = 0 mA, TA = 25°C.
Table 8.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
OUTPUT VOLTAGE VOUT 5.000 V
INITIAL OUTPUT VOLTAGE ERROR VOUT_ERR B grade ±0.02 %
1 mV
A grade ±0.04 %
2 mV
SOLDER HEAT SHIFT
±0.02
%
TEMPERATURE COEFFICIENT TCVOUT B grade, 40°C ≤ TA ≤ +125°C 2 ppm/°C
A grade, 40°C ≤ TA ≤ +125°C 4 ppm/°C
LINE REGULATION ΔVOUT/ΔVIN 40°C ≤ TA ≤ +125°C 1 10 ppm/V
LOAD REGULATION ΔVOUT/ΔIL IL = 0 mA to +10 mA source, −40°C ≤ TA +125°C 25 80 ppm/mA
IL = 0 mA to −10 mA sink, −40°C ≤ TA ≤ +125°C 35 120 ppm/mA
QUIESCENT CURRENT IQ 40°C ≤ TA ≤ +125°C, no load 700 950 μA
DROPOUT VOLTAGE VDO 40°C ≤ TA ≤ +125°C, no load 100 mV
40°C ≤ T
A
≤ +125°C, I
L
= 2 mA
300
mV
RIPPLE REJECTION RATIO RRR fIN = 1 kHz 90 dB
OUTPUT CURRENT CAPACITY IL
Sinking 10 mA
Sourcing 10 mA
OUTPUT VOLTAGE NOISE eNp-p 0.1 Hz to 10.0 Hz 2.8 μV p-p
OUTPUT VOLTAGE NOISE DENSITY
e
N
1 kHz
95.3
nV/√Hz
OUTPUT VOLTAGE HYSTERESIS ΔVOUT_HYS TA = temperature cycled from +25°C to −40°C to
+125°C and back to +25°C
50 ppm
LONG-TERM DRIFT ΔVOUT_LTD 1000 hours at 60°C 25 ppm
TURN-ON SETTLING TIME tR IL = 0 mA, CL = 0.1 µF, CIN = 0.1 µF, RL = 1 kΩ 160 µs
LOAD CAPACITANCE 0.1 100 µF
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 9 of 32
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 9.
Parameter Rating
Supply Voltage 16 V
Operating Temperature Range 40°C to +125°C
Storage Temperature Range 65°C to +150°C
Junction Temperature Range 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions; that is, a device
soldered in a circuit board for surface-mount packages.
Table 10. Thermal Resistance
Package Type θJA θJC Unit
8-Lead SOIC 120 42 °C/W
ESD CAUTION
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 10 of 32
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 11. Pin Function Descriptions
Pin No. Mnemonic Description
1 NC No Connect. This pin is not connected internally.
2 VIN Input Voltage Connection.
3 NC No Connect. This pin is not connected internally.
4 GND Ground.
5 NC No Connect. This pin is not connected internally.
6
V
OUT
Output Voltage.
7 NC No Connect. This pin is not connected internally.
8 TP Test Pin. Do not connect.
NC
1
V
IN 2
NC
3
GND
4
TP
8
NC
7
V
OUT
6
NC
5
NOTES
1. NC = NO CONNE CT.
2. TP = TEST PIN. DO NOT CONNECT.
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
TOP VI EW
(No t t o Scale)
10203-002
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 11 of 32
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
ADR4520
Figure 3. ADR4520 Output Voltage vs. Temperature
Figure 4. ADR4520 Thermally Induced Output Voltage Hysteresis Distribution
Figure 5. ADR4520 Output Voltage Start-Up Response
Figure 6. ADR4520 Dropout Voltage vs. Load Current
Figure 7. ADR4520 Load Regulation vs. Temperature (Sourcing)
Figure 8. ADR4520 Load Regulation vs. Temperature (Sinking)
V
OUT
(V)
TEMPERATURE (°C)
2.0475
2.0476
2.0477
2.0478
2.0479
2.0480
2.0481
2.0482
2.0483
2.0484
2.0485 ADR4520
–50 –30 –10 10 30 50 70 90 110 130
10203-101
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-103
CH1 5.00V CH2 1.00V M40.0µs A CH1 9. 10V
1
2
ADR4520
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-104
DROPOUT VOLTAGE (V)
ILOAD (mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
–10 –8 –6 –4 –2 0246810
–40°C
+25°C
+125°C
ADR4520
10203-106
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4520
10203-107
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4520
10203-108
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 12 of 32
Figure 9. ADR4520 Line Regulation vs. Temperature
Figure 10. ADR4520 Supply Current vs. Supply Voltage
Figure 11. ADR4520 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 12. ADR4520 Output Noise Spectral Density
Figure 13. ADR4520 Ripple Rejection Ratio vs. Frequency
Figure 14. ADR4520 Line Transient Response
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4520
10203-109
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
I
SY
(µA)
V
IN
(V)
0
1000
800
600
400
200
0246810 12 14 161357911 13 15
–40°C
+25°C
+125°C
ADR4520
10203-110
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
120
100
80
60
40
20
2.82.52.21.91.61.31.00.70.4
ADR4520
10203-111
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4520
10203-112
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (Hz )
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
ADR4520
C
LOAD
= 1µF
100M10 100 1k 10k 100k 1M 10M
10203-113
CH1 1.00V CH2 1.00mV
BW
M40.0µs A CH1 7.02V
2
1
ADR4520
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-114
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 13 of 32
Figure 15. ADR4520 Output Impedance vs. Frequency
Figure 16. ADR4520 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 17. ADR4520 Typical Long-Term Output Voltage Drift
(1000 Hours)
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
60
50
40
30
20
10
1M10 100 1k 10k 100k
ADR4520
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF
RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10203-115
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
10203-116
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-117
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 14 of 32
ADR4525
Figure 18. ADR4525 Output Voltage vs. Temperature
Figure 19. ADR4525 Thermally Induced Output Voltage Hysteresis Distribution
Figure 20. ADR4525 Output Voltage Start-Up Response
Figure 21. ADR4525 Dropout Voltage vs. Load Current
Figure 22. ADR4525 Load Regulation vs. Temperature (Sourcing)
Figure 23. ADR4525 Load Regulation vs. Temperature (Sinking)
V
OUT
(V)
TEMPERATURE (°C)
2.4995
2.4996
2.4997
2.4998
2.4999
2.5000
2.5001
2.5002
2.5003
2.5004
2.5005
–50 –30 –10 10 30 50 70 90 110 130
ADR4525
10203-201
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-203
CH1 5.00V CH2 1.00V M40.0µs A CH1 9. 10V
1
2
ADR4525
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
10203-204
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4525
10203-206
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4525
10203-207
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4525
10203-208
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 15 of 32
Figure 24. ADR4525 Line Regulation vs. Temperature
Figure 25. ADR4525 Supply Current vs. Supply Voltage
Figure 26. ADR4525 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 27. ADR4525 Output Noise Spectral Density
Figure 28. ADR4525 Ripple Rejection Ratio vs. Frequency
Figure 29. ADR4525 Line Transient Response
10203-209
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4525
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 14 161357911 13 15
–40°C
+25°C
+125°C ADR4525
10203-210
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
160
140
120
100
80
60
40
20
3.02.72.42.11.81.51.20.90.6
ADR4525
10203-211
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4525
10203-212
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (Hz )
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
ADR4525
100M10 100 1k 10k 100k 1M 10M
10203-213
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 4.08V
2
1
ADR4525
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 10.0%
10203-214
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 16 of 32
Figure 30. ADR4525 Output Impedance vs. Frequency
Figure 31. ADR4525 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 32. ADR4525 Typical Long-Term Output Voltage Drift
(1000 Hours)
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
80
70
60
50
40
30
20
10
1M10 100 1k 10k 100k
ADR4525
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF
RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10203-215
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
10203-216
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-217
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 17 of 32
ADR4530
Figure 33. ADR4530 Output Voltage vs. Temperature
Figure 34. ADR4530 Thermally Induced Output Voltage Hysteresis Distribution
Figure 35. ADR4530 Output Voltage Start-Up Response
Figure 36. ADR4530 Supply Current vs. Supply Voltage
Figure 37. ADR4530 Dropout Voltage vs. Load Current
Figure 38. ADR4530 Load Regulation vs. Temperature (Sourcing)
VOUT (V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4530
10203-301
2.9995
2.9996
2.9997
2.9998
2.9999
3.0000
3.0001
3.0002
3.0003
3.0004
3.0005
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-303
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4530
VIN (5V/DIV)
VOUT (1V/DIV)
10203-304
CIN = 0.1µF
COUT = 0.1µ F
RL = 1kΩ
I
SY
(µA)
V
IN
(V)
013121110987654321
ADR4530
0
0.0001
0.0002
0.0003
0.0004
0.0005
0.0006
0.0007
0.0008
0.0009
–40°C
+25°C
+125°C
10203-305
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4530
10203-306
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4530
10203-307
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 18 of 32
Figure 39. ADR4530 Load Regulation vs. Temperature (Sinking)
Figure 40. ADR4530 Line Regulation vs. Temperature
Figure 41. ADR4530 Supply Current vs. Supply Voltage
Figure 42. ADR4530 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 43. ADR4530 Output Noise Spectral Density
Figure 44. ADR4530 Ripple Rejection Ratio vs. Frequency
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4530
10203-308
10203-309
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4530
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
–60 –40 –20 020 40 60 80 100 120 140
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 131357911
–40°C
+25°C
+125°C
ADR4530
10203-310
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
100
90
80
70
60
50
40
30
20
10
ADR4530
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
10203-311
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4530
10203-312
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (Hz )
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100M10 100 1k 10k 100k 1M 10M
ADR4530
10203-313
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 19 of 32
Figure 45. ADR4530 Line Transient Response
Figure 46. ADR4530 Output Impedance vs. Frequency
Figure 47. ADR4530 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 48. ADR4530 Typical Long-Term Output Voltage Drift
(1000 Hours)
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4530
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 10.0%
10203-314
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
60
50
40
30
20
10
ADR4530
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10M1M110 100 1k 10k 100k
10203-315
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
10203-316
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-317
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 20 of 32
ADR4533
Figure 49. ADR4533 Output Voltage vs. Temperature
Figure 50. ADR4533 Thermally Induced Output Voltage Hysteresis Distribution
Figure 51. ADR4533 Output Voltage Start-Up Response
Figure 52. ADR4533 Dropout Voltage vs. Load Current
Figure 53. ADR4533 Load Regulation vs. Temperature (Sourcing)
Figure 54. ADR4533 Load Regulation vs. Temperature (Sinking)
VOUT (V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4533
10203-401
3.2990
3.2992
3.2994
3.2996
3.2998
3.3000
3.3002
3.3004
3.3006
3.3008
3.3010
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-403
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4533
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-404
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.2
0.4
0.6
0.8
1.0
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4533
10203-406
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4533
10203-407
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4533
10203-408
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 21 of 32
Figure 55. ADR4533 Line Regulation vs. Temperature
Figure 56. ADR4533 Supply Current vs. Supply Voltage
Figure 57. ADR4533 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 58. ADR4533 Output Noise Spectral Density
Figure 59. ADR4533 Ripple Rejection Ratio vs. Frequency
Figure 60. ADR4533 Line Transient Response
10203-409
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4533
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
–60 –40 –20 020 40 60 80 100 120 140
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 161514131357911
–40°C
+25°C
+125°C
ADR4533
10203-410
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
60
50
40
30
20
10
ADR4533
BIN
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
10203-411
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4533
10203-412
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (kHz )
–130
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100k0.01 0.1 110 100 1k 10k
ADR4533
10203-413
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4533
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-414
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 22 of 32
Figure 61. ADR4533 Output Impedance vs. Frequency
Figure 62. ADR4533 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 63. ADR4533 Typical Long-Term Output Voltage Drift
(1000 Hours)
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
60
50
40
30
20
10
ADR4533
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF
RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10M1M110 100 1k 10k 100k
10203-415
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
10203-416
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-417
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 23 of 32
ADR4540
Figure 64. ADR4540 Output Voltage vs. Temperature
Figure 65. ADR4540 Thermally Induced Output Voltage Hysteresis Distribution
Figure 66. ADR4540 Output Voltage Start-Up Response
Figure 67. ADR4540 Dropout Voltage vs. Load Current
Figure 68. ADR4540 Load Regulation vs. Temperature (Sourcing)
Figure 69. ADR4540 Load Regulation vs. Temperature (Sinking)
VOUT (V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4540
10203-501
4.0950
4.0955
4.0960
4.0965
4.0970
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-503
CH1 5.00V CH2 1.00V M40.0µs A CH1 3.10V
1
2
ADR4540
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
C
IN
= 0.1µF
C
OUT
= 0.1µF
R
L
= 1kΩ
10203-504
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4540
10203-506
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4540
10203-507
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4540
10203-508
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 24 of 32
Figure 70. ADR4540 Line Regulation vs. Temperature
Figure 71. ADR4540 Supply Current vs. Supply Voltage
Figure 72. ADR4540 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 73. ADR4540 Output Noise Spectral Density
Figure 74. ADR4540 Ripple Rejection Ratio vs. Frequency
Figure 75. ADR4540 Line Transient Response
10203-509
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4540
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
–60 –40 –20 020 40 60 80 100 120 140
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 161514131357911
–40°C
+25°C
+125°C
ADR4540
10203-510
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
70
60
50
40
30
20
10
ADR4540
BIN
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
3.7
3.9
10203-511
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
ADR4540
10203-512
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (Hz )
–120
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
100M10 100 1k 10k 100k 1M 10M
ADR4540
10203-513
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4540
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-514
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 25 of 32
Figure 76. ADR4540 Output Impedance vs. Frequency
Figure 77. ADR4540 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 78. ADR4540 Typical Long-Term Output Voltage Drift
(1000 Hours)
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
60
50
40
30
20
10
10M1M110 100 1k 10k 100k
ADR4540
RL = 100kΩ
CL = 10µF
RL = 1kΩ
CL = 10µF RL = 1kΩ
CL = 1µF
RL = 100kΩ
CL = 1µF
10203-515
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
10203-516
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-517
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 26 of 32
ADR4550
Figure 79. ADR4550 Output Voltage vs. Temperature
Figure 80. ADR4550 Thermally Induced Output Voltage Hysteresis Distribution
Figure 81. ADR4550 Output Voltage Start-Up Response
Figure 82. ADR4550 Dropout Voltage vs. Load Current
Figure 83. ADR4550 Load Regulation vs. Temperature (Sourcing)
Figure 84. ADR4550 Load Regulation vs. Temperature (Sinking)
VOUT (V)
TEMPERATURE (°C)
–50 –30 –10 10 30 50 70 90 110 130
ADR4550
10203-601
4.9990
4.9995
5.0000
5.0005
5.0010
NUMBER OF UNI TS
ΔV
OUT_HYS
(ppm)
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
–190
–200
0
10203-603
CH1 5.00V CH2 1.00V M40.0µs A CH1 9. 10V
1
2
ADR4550
V
IN
(5V/DIV)
V
OUT
(1V/DIV)
10203-604
DROPOUT VOLTAGE (V)
I
LOAD
(mA)
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
–15 151050–5–10
–40°C
+25°C
+125°C
ADR4550
10203-606
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
35
30
25
20
15
10
5
–60 –40 –20 020 40 60 80 100 120 140
ADR4550
10203-607
LOAD REGULATION (ppm/mA)
TEMPERATURE (°C)
0
100
90
80
70
60
50
40
30
20
10
–60 –40 –20 020 40 60 80 100 120 140
ADR4550
10203-608
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 27 of 32
Figure 85. ADR4550 Line Regulation vs. Temperature
Figure 86. ADR4550 Supply Current vs. Supply Voltage
Figure 87. ADR4550 Output Voltage Noise
(Maximum Amplitude from 0.1 Hz to 10 Hz)
Figure 88. ADR4550 Output Noise Spectral Density
Figure 89. ADR4550 Ripple Rejection Ratio vs. Frequency
Figure 90. ADR4550 Line Transient Response
10203-609
LINE REGULATION (ppm/V)
TEMPERATURE (°C)
ADR4550
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
–50 050 100 150
I
SY
(µA)
V
IN
(V)
0
900
800
700
600
500
400
300
200
100
0246810 12 161514131357911
–40°C
+25°C
+125°C
ADR4550
10203-610
OCCURRENCE
OUTPUT VOLTAGE NOISE DISTRIBUTION (µV p-p)
0
9
8
7
6
5
4
3
2
1
3.73.53.33.12.92.72.52.32.11.9
10203-611
ADR4550
NOISE DENSITY (nV rms/ Hz)
FRE QUENCY (Hz )
1
1k
100
10
100k0.01 0.1 110 100 1k 10k
10203-612
ADR4550
RIPPLE REJECTION RATIO (dB)
FRE QUENCY (Hz )
–120
0
–20
–40
–60
–80
–100
100k0.01 0.1 110 100 1k 10k
10203-613
ADR4550
CH1 1.00V CH2 1.00mV
BW
M200µs A CH1 7.02V
2
1
ADR4550
INPUT
OUTPUT AC
C
IN
= 0.1µF
C
OUT
= 1µF
T
T 12.0%
10203-614
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 28 of 32
Figure 91. ADR4550 Output Impedance vs. Frequency
Figure 92. ADR4550 Output Voltage Drift Distribution After Reflow (SHR Drift)
Figure 93. ADR4550 Typical Long-Term Output Voltage Drift
(1000 Hours)
OUTPUT IMPEDANCE (Ω)
FRE QUENCY (Hz )
0
140
100
120
80
60
40
20
1M10 100 1k 10k 100k
ADR4550
RL = 100kΩ
CL = 1µF
RL = 1kΩ
CL = 1µF
RL = 1kΩ
CL = 0.1µF
RL = 100kΩ
CL = 0.1µF
10203-615
OCCURRENCE
OUTPUT VOLTAGE (%)
0
12
10
8
6
4
2
10203-616
–0.060
–0.055
–0.050
–0.045
–0.040
–0.035
–0.030
–0.025
–0.020
–0.015
–0.010
–0.005
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
0.055
0.060
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
VOUT DRIFT (ppm)
DURATION (Hours)
–80
80
60
40
20
0
–20
–40
–60
10000200 400 600 800100 300 500 700 900
10203-617
ADR4520
ADR4525
ADR4530
ADR4533
ADR4540
ADR4550
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 29 of 32
TERMINOLOGY
Dropout Voltage (VDO)
Dropout voltage, sometimes referred to as supply voltage
headroom or supply output voltage differential, is defined as the
minimum voltage differential between the input and output such
that the output voltage is maintained to within 0.1% accuracy.
VDO = (VIN − VOUT)min|IL = constant
Because the dropout voltage depends on the current passing
through the device, it is always specified for a given load current.
In series mode devices, the dropout voltage typically increases
proportionally to the load current (see Figure 6, Figure 21,
Figure 37, Figure 52, Figure 67, and Figure 82).
Temperature Coefficient (TCVOUT)
The temperature coefficient relates the change in the output
voltage to the change in the ambient temperature of the device, as
normalized by the output voltage at 25°C. This parameter is
determined by the box method, which is represented by the
following equation:
6
10
)()(
)},,({)},,({ ×
×
=
132
OUT
321
OUT
321
OUT
OUT
TTTV
TTTVminTTTVmax
TCV
where:
TCVOUT is expressed in ppm/°C.
VOUT(Tx) is the output voltage at Temperature Tx.
T1 = −40°C.
T2 = +25°C.
T3 = +125°C.
This three-point method ensures that TCVOUT accurately portrays
the maximum difference between any of the three temperatures
at which the output voltage of the part is measured.
The TCVOUT for the ADR4520/ADR4525/ADR4530/ADR4533/
ADR4540/ADR4550 is fully tested over three temperatures:
40°C, +25°C, and +125°C.
Thermally Induced Output Voltage Hysteresis (ΔVOUT_HYS)
Thermally induced output voltage hysteresis represents the
change in the output voltage after the device is exposed to a
specified temperature cycle. This is expressed as either a shift in
voltage or a difference in ppm from the nominal output.
6
25_
_25_
_10×
=
°
°
COUT
TCOUTCOUT
HYSOUT V
VV
V
[ppm]
where:
VOUT_25°C is the output voltage at 25°C.
VOUT_TC is the output voltage after temperature cycling.
Long-Term Stability (ΔVOUT_LTD)
Long-term stability refers to the shift in the output voltage at 60°C
after 1000 hours of operation in a 60°C environment. The ambient
temperature is kept at 60°C to ensure that the temperature chamber
does not switch randomly between heating and cooling, which
can cause instability over the 1000 hour measurement. This is
also expressed as either a shift in voltage or a difference in ppm
from the nominal output.
6
_10
)(
)()( ×
=
0
OUT
0
OUT
1
OUT
LTDOUT tV
tVtV
V
[ppm]
where:
VOUT(t0) is the VOUT at 60°C at Time 0.
VOUT(t1) is the VOUT at 60°C after 1000 hours of operation at 60°C.
Line Regulation
Line regulation refers to the change in output voltage in response
to a given change in input voltage and is expressed in percent
per volt, ppm per volt, or μV per volt change in input voltage.
This parameter accounts for the effects of self-heating.
Load Regulation
Load regulation refers to the change in output voltage in response
to a given change in load current and is expressed in μV per mA,
ppm per mA, or ohms of dc output resistance. This parameter
accounts for the effects of self-heating.
Solder Heat Resistance (SHR) Shift
SHR shift refers to the permanent shift in output voltage that is
induced by exposure to reflow soldering and is expressed in units
of ppm. This shift is caused by changes in the stress exhibited
on the die by the package materials when these materials are
exposed to high temperatures. This effect is more pronounced
in lead-free soldering processes due to higher reflow temperatures.
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 30 of 32
THEORY OF OPERATION
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 series of references uses a unique core topology for
extremely high accuracy, stability, and noise performance.
Three parameters contribute to the accuracy of the dc output of
a voltage reference: initial accuracy, temperature coefficient, and
long-term drift. With an outstanding guaranteed initial error of
0.02% and a low temperature coefficient of 2 ppm/°C maximum,
this series of voltage references is perfect for high precision
applications. The industry-leading long-term stability of the
devices means that systems need less frequent field calibration
and that there is a reduction in the costly preshipment system
burn-in time.
LONG-TERM DRIFT
One of the key parameters of the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550 references is long-term
stabilitythe output drift over time that the device is powered
up. Regardless of output voltage, internal testing during
development showed a typical drift of approximately 25 ppm
after 1000 hours of continuous, nonloaded operation in a 6C
extremely stable temperature controlled environment.
Note that the majority of the long-term drift typically occurs in
the first 200 hours to 300 hours of operation. For systems that
require highly stable output voltages over long periods of time,
the designer should consider burning in the devices prior to use
to minimize the amount of output drift exhibited by the
reference over time. See the AN-713 Application Note, The
Effect of Long-Term Drift on Voltage References, at www.analog.com
for more information regarding the effects of long-term drift
and how it can be minimized.
POWER DISSIPATION
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 voltage references are capable of sourcing and sinking
up to 10 mA of load current at room temperature across the rated
input voltage range. However, when used in applications subject
to high ambient temperatures, the input voltage and load current
should be carefully monitored to ensure that the device does not
exceeded its maximum power dissipation rating. The maximum
power dissipation of the device can be calculated via the
following equation:
JA
A
J
D
TT
Pθ
=
where:
PD is the device power dissipation.
TJ is the device junction temperature.
TA is the ambient temperature.
θJA is the package (junction-to-air) thermal resistance.
Due to this relationship, acceptable load current in high
temperature conditions may be less than the maximum current
sourcing capability of the device. In no case should the part be
operated outside of its maximum power rating because doing so
may result in premature failure or permanent damage to the device.
Data Sheet ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Rev. 0 | Page 31 of 32
APPLICATIONS INFORMATION
BASIC VOLTAGE REFERENCE CONNECTION
The circuit shown in Figure 94 illustrates the basic configuration
for the ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 family of voltage references.
Figure 94. ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550
Simplified Schematic
INPUT AND OUTPUT CAPACITORS
Input Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor can be connected
to the input to improve transient response in applications where
the supply voltage may fluctuate. An additional 0.1 μF ceramic
capacitor should be connected in parallel to reduce supply noise.
Output Capacitors
An output capacitor is required for stability and to filter out low
level voltage noise. The minimum value of the output capacitor
is shown in Table 12.
Table 12. Minimum COUT Value
Part Number Minimum COUT Value
ADR4520, ADR4525 1.0 µF
ADR4530, ADR4533,
ADR4540, ADR4550
0.1 µF
An additional 1 μF to 10 μF electrolytic or ceramic capacitor can be
added in parallel to improve transient performance in response to
sudden changes in load current; however, the designer should keep
in mind that doing so will increase the turn-on time of the device.
LOCATION OF REFERENCE IN SYSTEM
The ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/
ADR4550 reference should be placed as close to the load as possible
to minimize the length of the output traces and, therefore, the error
introduced by the voltage drop. Current flowing through a PCB
trace produces an IR voltage drop; with longer traces, this drop
can reach several millivolts or more, introducing considerable
error into the output voltage of the reference. A 1 inch long, 5 mm
wide trace of 1 ounce copper has a resistance of approximately
100 mΩ at room temperature; at a load current of 10 mA, this
can introduce a full millivolt of error.
SAMPLE APPLICATIONS
Bipolar Output Reference
Figure 95 shows a bipolar reference configuration. By connecting
the output of the ADR4550 to the inverting terminal of an
operational amplifier, it is possible to obtain both positive and
negative reference voltages. R1 and R2 must be matched as closely
as possible to ensure minimal difference between the negative
and positive outputs. Resistors with low temperature coefficients
must also be used if the circuit is used in environments with large
temperature swings; otherwise, a voltage difference develops
between the two outputs as the ambient temperature changes.
Figure 95. ADR4550 Bipolar Output Reference
Boosted Output Current Reference
Figure 96 shows a configuration for obtaining higher current
drive capability from the ADR4520/ADR4525/ADR4530/
ADR4533/ADR4540/ADR4550 references without sacrificing
accuracy. The op amp regulates the current flow through the
MOSFET until VOUT equals the output voltage of the reference;
current is then drawn directly from VIN instead of from the
reference itself, allowing increased current drive capability.
Figure 96. Boosted Output Current Reference
Because the current-sourcing capability of this circuit depends only
on the ID rating of the MOSFET, the output drive capability can
be adjusted to the application simply by choosing an appropriate
MOSFET. In all cases, the VOUT pin should be tied directly to the
load device to maintain maximum output voltage accuracy.
10203-054
VIN
GND
VREF
BAND GAP
V
IN
+15V
–15V
–5V
+5V
ADA4000-1
0.1µF1µF 0.1µF
R1
10kΩ
R2
10kΩ
R3
5kΩ
ADR4550
V
IN
V
OUT
GND
26
4
10203-055
10203-056
C
L
C
L
0.1µF
2N7002
AD8663
V
IN
U6
V
OUT
+16V
0.1µFF
R1
100Ω
R
L
200Ω
ADR4520/ADR4525/
ADR4530/ADR4533/
ADR4540/ADR4550
V
IN
V
OUT
GND
2 6
4
PART
NUMBER MINIMUM
C
L
ADR4520,
ADR4525 1.0µF
ADR4530,
ADR4533,
ADR4540,
ADR4550
0.1µF
ADR4520/ADR4525/ADR4530/ADR4533/ADR4540/ADR4550 Data Sheet
Rev. 0 | Page 32 of 32
OUTLINE DIMENSIONS
Figure 97. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Ordering Quantity
ADR4520ARZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4520ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4520BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4520BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4525ARZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4525ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4525BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4525BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4530ARZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4530ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4530BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4530BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4533ARZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4533ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4533BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4533BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4540ARZ
40°C to +125°C
8-Lead SOIC_N
R-8
98
ADR4540ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4540BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4540BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4550ARZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4550ARZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR4550BRZ 40°C to +125°C 8-Lead SOIC_N R-8 98
ADR4550BRZ-R7 40°C to +125°C 8-Lead SOIC_N R-8 1,000
1 Z = RoHS Compliant Part.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10203-0-4/12(0)
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ADR4520ARZ ADR4550ARZ ADR4530BRZ ADR4550BRZ-R7 ADR4550ARZ-R7 ADR4525BRZ-R7
ADR4525ARZ-R7 ADR4540ARZ ADR4540BRZ-R7 ADR4533ARZ ADR4550BRZ ADR4530ARZ ADR4540BRZ
ADR4533ARZ-R7 ADR4520BRZ-R7 ADR4520ARZ-R7 ADR4533BRZ ADR4530BRZ-R7 ADR4540ARZ-R7
ADR4520BRZ ADR4525ARZ ADR4533BRZ-R7 ADR4530ARZ-R7 ADR4525BRZ