Product Datasheet Jan 4, 2012 9.9 - 12.5 Gb/s Optical Modulator Driver TGA4954-SL Key Features and Performance * * * * * * * Product Description The TriQuint TGA4954-SL is part of a series of surface mount modulator drivers suitable for a variety of driver applications and is compatible with Metro MSA standards. The TGA4954-SL provides Metro and Long Haul designers with system critical features such as: low power dissipation (1.1W at Vo = 6V), low rail ripple, high voltage drive capability at 5V bias (6 V amplitude adjustable to 3 V), low output jitter, and low input drive sensitivity (250mV at Vo = 6V). Primary Applications * Mach-Zehnder Modulator Driver Measured Data Vdd=5V; Id1=65mA; Id2T=115mA; Vctrl1=-0.2V; Vctrl2=+0.2V 36 15 32 10 S21 S11 S22 24 5 0 20 -5 16 -10 12 -15 8 -20 4 -25 0 -30 0 5 10 Frequency (GHz) The TGA4954-SL requires external DC blocks, a low frequency choke, and control circuitry. 15 20 Vout=6Vpp Evaluation boards available upon request. Lead Free finish & RoHS compliant. 1 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com S11,S22 (dB) 28 S21 (dB) The TGA4954-SL consists of two high performance wideband amplifiers combined with off chip circuitry assembled in a surface mount package. A single TGA4954-SL placed between the MUX and Optical Modulator provides OEMs with a board level modulator driver surface mount solution. Wide Drive Range (3V to 10V) Single-Ended Input/Output Low Power Dissipation (1.1W @ 6Vo) Low Rail Ripple 25psec Edge Rates (20/80%) Hot-pluggable Package Dimensions: 11.4 x 8.9 x 2.0 mm (0.450 x 0.350 x 0.080 inches) Product Datasheet Jan 4, 2012 TGA4954-SL TABLE I MAXIMUM RATINGS Symbol Parameter Value Notes 8V 1/ 2/ Gate Voltage Range -3V to 0V 1/ Control Voltage Range -3V to VD 1/ Drain Supply Current (Quiescent) 200 mA 350 mA 1/ 2/ Gate Supply Current 15 mA 1/ VD1 VD2T Drain Voltage VG1 VG2 VCTRL1 VCTRL2 ID1 ID2T | IG1 | | IG2 | | ICTRL1 | | ICTRL2 | Control Supply Current 15 mA 1/ PIN Input Continuous Wave Power 23 dBm 1/ 2/ VIN 12.5Gb/s PRBS Input Voltage 4 VPP 1/ 2/ PD Power Dissipation 4W 1/ 2/ 3/ TCH TM TSTG Operating Channel Temperature Mounting Temperature (10-20 Seconds) Storage Temperature 0 150 C 4/ 0 260 C 0 -65 to 150 C 1/ These ratings represent the maximum operable values for this device 2/ Combinations of supply voltage, supply current, input power, and output power shall not exceed PD at a package base temperature of 80C 3/ When operated at this bias condition with a baseplate temperature of 80C, the MTTF is reduced 4/ Junction operating temperature will directly affect the device median time to failure (MTTF). For maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 2 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL TABLE II THERMAL INFORMATION Parameter Test Conditions RJC Thermal Resistance (Channel to Backside of Package) VDD = 5V IDD = 215mA PDISS = 1.08W TBASE = 70C TCH (C) RJC (C/W) MTTF (hrs) 92 20.4 >1E6 Note: Thermal transfer is conducted through the bottom of the TGA4954-SL package into the motherboard. The motherboard must be designed to assure adequate thermal transfer to the base plate. TABLE III RF CHARACTERIZATION TABLE (TA = 25C, Nominal) Parameter Test Conditions Min Typ Max Units Small Signal Bandwidth 8 GHz Saturated Power Bandwidth 12 GHz Notes Small Signal Gain 0.1, 2, 4 GHz 6 GHz 10 GHz 14 GHz 16 GHz 28 26 24 17 12 34 33 30 25 21 dB 1/ Input Return Loss 0.1, 2, 4, 6, 10, 14, 16 GHz 10 15 dB 1/ Output Return Loss 0.1, 2, 4, 6, 10, 14, 16 GHz 10 15 dB 1/ Noise Figure 3 GHz 2.5 dB Small Signal AGC Range Midband 28 dB 26.5 dBm Saturated Output Power 2, 4, 6, 8 & 10 GHz 24 4/ 5/ 3 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL TABLE III (Continued) RF CHARACTERIZATION TABLE (TA = 25C, Nominal) Parameter Test Conditions Min Eye Amplitude VD2 = 8.0V VD2 = 6.5V VD2 = 5.5V VD2 = 4.5V VD2 = 4.0V 9.0 7.0 6.0 5.5 5.0 Additive Jitter (RMS) VIN = 500mVPP VIN = 800mVPP Q-Factor VIN = 500mVPP VIN = 800mVPP 25 25 42 42 Delta Eye Amplitude 800mVPP -0.50 0.0 Delta Crossing Percentage 500-800 mV in p-p Typ 1.2 1.4 -8 Max 3.0 3.0 Units Notes VPP 2/ psec 3/ V/V 0.50 VPP 8 % Table III Notes: 1/ Typical Package RF Bias Conditions: Vdd = 5V, adjust VG1 to achieve ID1 = 65mA then adjust VG2 to achieve ID2T = 115mA - 155 mA (Idd = 180 - 220 mA), VCTRL1 = -0.2V & VCTRL2 = +0.2 V 2/ VIN = 250mV, Data Rate = 10.7Gb/s, VD1 = VD2T or greater, VCTRL2 and VG2 are adjusted for maximum output. Typical final Idd under drive ~ 220 mA. 3/ Computed using RSS Method where JRMS_DUT = (JRMS_TOTAL2 - JRMS_SOURCE2) 4/ Verified at die level on-wafer probe 5/ Power Bias Die Probe: VTEE = 8V, adjust VG to achieve Idd = 175mA 5%, VCTRL = +1.5V Note: At the die level, drain bias is applied through the RF output port using a bias tee, voltage is at the DC input to the bias tee 4 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Measured Data Vdd=5V; Id1=65mA; Id2=115mA; Vctrl1=-0.2V; Vctrl2=+0.2V 36 32 28 S21 (dB) 24 20 16 12 8 4 0 0 2 4 6 8 10 12 14 16 18 20 14 16 18 20 Frequency (GHz) 0 S11 S22 -5 S11,S22 (dB) -10 -15 -20 -25 -30 -35 -40 0 2 4 6 8 10 12 Frequency (GHz) 5 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL TGA4954-SL Typical Performance Data is measured in a Test Fixture Idd Vdd Id2T Id1 TGA4954-SL Driver RF(in) RF(out) Vctrl1 Vg1 Vctrl2 Vg2 Test Fixture Block Diagram 6 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Measured Data Vdd=5V; Id1=65mA; Vctrl1=-0.2V; Vin=500mVpp; Vo=6Vpp Vg2 & Vctrl2 are varied to achieve 6Vo & 50% crossing 9.953Gbps 10.7Gbps 11.3Gbps 12.5Gbps 7 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Measured Data Vdd=5V; Id1=65mA; Vctrl1=-0.2V; Vo=6Vpp; 10.7Gbps Vg2 & Vctrl2 are varied to achieve 6Vo & 50% crossing Vin=250mVpp Vin=500mVpp Vin=800mVpp 8 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Measured Data Vdd=5V; Id1=65mA; Vctrl1=-0.2V; Vin=500mVpp; 10.7Gbps Vg2 & Vctrl2 are varied to achieve 6Vo & 50% crossing 3Vo 4Vo 5Vo 6Vo Input 9 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Production - Initial Alignment - Bias Procedure Vdd=5V, Vo=6Vamp, CPC=50% (Hot-Pluggable) Bias Network Initial Conditions Vg1=-1.5V Vg2=-1.5V Vctrl1=-0.2V Vctrl2=+.1V Vdd=5V Bias ON Bias OFF 1. Remove Vdd. 1. Disable the output of MUX 2. Remove Vg1, Vg2, Vctrl1 and Vctrl2 2. Apply Vg1, Vg2, Vctrl1 and Vctrl2 in any sequence. in any sequence. 3. Apply Vdd. 4. Make Vg1 more positive until Idd=65mA. - This is Id1 (current into the first stage) - Typical value for Vg1 is -0.65V 5. Make Vg2 more positive until Idd=180 - 220 mA. - This sets Id2T to 115 - 155 mA. - Typical value for Vg2 is -0.55V 6. Enable the output of the MUX. - Set Vin=500mV 7. Output Swing Adjust: Adjust Vctrl2 slightly positive to increase output swing or adjust Vctrl2 slightly negative to decrease the output swing. - Typical value for Vctrl2 is +0.22V for Vo=6V. 8. Crossover Adjust: Adjust Vg2 slightly positive to push the crossover down or adjust Vg2 slightly negative to push the crossover up. - Typical value for Vg2 is -0.57V to center crossover with Vo=6V. General Comments for Production Operation of TGA4954-SL: 1. Due to natural variations in gate voltages observed with GaAs FET amplifiers used internally to the TGA4954-SL, optimal eye performance is obtained when the gate voltages (Vg1 and Vg2) are set to control desired drain currents (Id1 and Id2T) 2. Vc2 feedback circuit recommended for output amplitude correction. 10 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Production - Post Alignment - Bias Procedure Vdd=5V, Vo=6Vamp, CPC=50% (Hot-Pluggable) Bias Network Initial Conditions Vg1= As found during initial alignment Vg2=-As found during initial alignment Vctrl1=-0.2V Vctrl2=As found during initial alignment Vdd=5V Bias ON 1. Mux output can be either Enabled or Disabled 2. Apply Vg1, Vg2, Vctrl1 and Vctrl2 in any sequence. 3. Apply Vdd. 4. Enable the output of the MUX 5. Output Swing Adjust: Adjust Vctrl2 slightly positive to increase output swing or adjust Vctrl2 slightly negative to decrease the output swing. 6. Crossover Adjust: Adjust Vg2 slightly positive to push the crossover down or adjust Vg2 slightly negative to push the crossover up. Bias OFF 1. Remove Vdd. 2. Remove Vg1, Vg2, Vctrl1 and Vctrl2 in any sequence. General Comments for Production Operation of TGA4954-SL: 1. Due to natural variations in gate voltages observed with GaAs FET amplifiers used internally to the TGA4954-SL, optimal eye performance is obtained when the gate voltages (Vg1 and Vg2) are set to control desired drain currents (Id1 and Id2T) 2. Vc2 feedback circuit recommended for output amplitude correction. 11 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL 0.350 0.327 0.207 0.407 0.438 0.327 15 16 17 9 18 19 6 5 4 3 2 0.175 1 0.367 0.412 0.450 7 0.236 8 0.167 0.080 REF. 0.024 0.000 10 11 12 13 14 0.000 0.017 0.087 0.177 0.175 0.127 0.047 Mechanical Drawing LID 0.020 SIDEWALL Bond Pad #1 Bond Pad #2 Bond Pad #3 Bond Pad #4 Bond Pad #5 Bond Pad #6 Bond Pad #7 Bond Pad #8 Bond Pad #9 N/C N/C Vg1 N/C N/C Vg2 N/C N/C RF Out 0.025 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.027 x 0.018 Bond Pad #10 Bond Pad #11 Bond Pad #12 Bond Pad #13 Bond Pad #14 Bond Pad #15 Bond Pad #16 Bond Pad #17 Bond Pad #18 Bond Pad #19 N/C N/C Vd2T N/C Vctrl2 Vd1 N/C Vctrl1 RF In GND 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.020 x 0.018 0.335 x 0.206 Note for Pin 13: Pin 13 can be soldered to the PCB but MUST be left electrically open. 12 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 TGA4954-SL Application Circuit TGA4954-SL Recommended Components: DESIGNATOR DESCRIPTION MANUFACTURER PART NUMBER C1, C2 DC Block, Broadband Presidio BB0502X7R104M16VNT9820 C3, C4, C5 10uF Capacitor MLC Ceramic AVX 0802YC106KAT C6, C7 0.01 uFCapacitor MLC Ceramic AVX 0603YC103KAT C8 10 uF Capacitor Tantalum AVX TAJA106K016R L1 220 uH Inductor Panasonic or Belfuse ELLCTV221M S581-4000-14 L2 330 nH Inductor Panasonic ELJ-FAR33MF2 R1, R2 274 Resistor Panasonic ERJ-2RKF2740X Notes: 1. C3 and C4 extend low frequency performance thru 30 KHz. For applications requiring low frequency performance thru 100 kHz, C3 and C4 may be omitted 2. C6 and C7 are power supply decoupling capacitors and may be omitted when driven directly with an opamp. Impedance looking into VCTRL1 and VCTRL2 is 10k real 13 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 Assembly Notes * * * * Proper ESD precautions must be followed while handling parts. Parts must be in dry condition prior to soldering. See shipping label instructions. TGA4954-SL may be processed using conventional SMT processes. Both, lead-free and leaded solders may be used while maintaining following limits: * Maximum temperature ........ 260C * Total time above 220C ...... 60 seconds * Maximum ramp rate ............ 3C/second * Time within 5 C of Peak Temperature ............10 - 20 sec max * Typical solder reflow profiles are shown in figures below. * Hand soldering is not recommended. Solder paste may be applied using a stencil printer or dot placement. The volume of solder paste depends on PCB and component layout and should be well controlled to ensure consistent mechanical and electrical performance. * TGA4954-SL may be removed from circuit board and re-soldered once. After removal, solder pads must leveled and cleaned. Prior to re-soldering, the part must be dried in accordance with shipping label instructions. Solder reflow profiles for lead-free solders 14 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com Product Datasheet Jan 4, 2012 Solder reflow profiles for Sn63/Pb37 and Sn62/Pb36/Ag2 solders Environmental Ratings Moisture Sensitivity Rating ESD Rating MSL3 1B Ordering Information Part Package Style TGA4954-SL Land Grid Array, Surface Mount (RoHS) GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should be observed during handling, assembly and test. 15 TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 info-networks@tqs.com