© Semiconductor Components Industries, LLC, 2015
September, 2016 − Rev. 2 1Publication Order Number:
NTMFD4C87N/D
NTMFD4C87N
PowerPhase, Dual
N-Channel SO8FL
30 V, High Side 20 A / Low Side 26 A
Features
•Co−Packaged Power Stage Solution to Minimize Board Space
•Minimized Parasitic Inductances
•Optimized Devices to Reduce Power Losses
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
•DC−DC Converters
•System Voltage Rails
•Point of Load
Figure 1. Typical Application Circuit
Figure 2. Typical Efficiency Performance
POWERPHASEGEVB Evaluation Board
LOAD CURRENT (A) 2010 25155
70
80
95
EFFICIENCY (%)
90
VIN = 12 V
VOUT = 1.2 V
VGS = 5 V
FSW = 300 kHz
TA = 25°C
0
75
85
100
DFN8
CASE 506CR
MARKING
DIAGRAM
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V(BR)DSS RDS(ON) MAX ID MAX
Q1 Top FET
30 V 5.4 mW @ 10 V 20 A
8.1 mW @ 4.5 V
Q2 Bottom
FET
30 V
3.1 mW @ 10 V 26 A
4.3 mW @ 4.5 V
4C87N = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
See detailed ordering and shipping information on page 10 o
f
this data sheet.
ORDERING INFORMATION
PIN CONNECTIONS
109
1
2
3
4
8
7
6
5
D1 S2
G1
S1
D1
D1
G2
SW
SW
SW
(Bottom View)
(8) G2
S2 (10)
(1) G1
SW (5, 6, 7)
D1 (3, 4, 9)
(2) S1
1
4C87N
AYWZZ
1
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MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage Q1 VDSS 30 V
Drain−to−Source Voltage Q2
Gate−to−Source Voltage Q1 VGS ±20 V
Gate−to−Source Voltage Q2
Continuous Drain Current RqJA (Note 1)
Steady
State
TA = 25°CQ1 ID15.4
A
TA = 85°C 11.1
TA = 25°CQ2 19.5
TA = 85°C 14.1
Power Dissipation
RqJA (Note 1) TA = 25°CQ1 PD1.89 W
Q2
Continuous Drain Current RqJA ≤ 10 s (Note 1) TA = 25°CQ1 ID21.0
A
TA = 85°C 15.1
TA = 25°CQ2 26.6
TA = 85°C 19.2
Power Dissipation
RqJA ≤ 10 s (Note 1) TA = 25°CQ1 PD3.51 W
Q2
Continuous Drain Current
RqJA (Note 2) TA = 25°CQ1 ID11.7
A
TA = 85°C 8.5
TA = 25°CQ2 14.9
TA = 85°C 10.7
Power Dissipation
RqJA (Note 2) TA = 25 °CQ1 PD1.10 W
Q2
Pulsed Drain Current TA = 25°C
tp = 10 msQ1 IDM 160 A
Q2 260
Operating Junction and Storage Temperature Q1 TJ, TSTG −55 to +150 °C
Q2
Source Current (Body Diode) Q1 IS10 A
Q2 10
Drain to Source DV/DT dV/dt 6 V/ns
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25C,
VDD = 50 V, VGS = 10 V, L = 0.1 mH, RG = 25 W)IL = 20 Apk Q1 EAS 20 mJ
IL = 30 Apk Q2 EAS 45
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm2.
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THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Ambient – Steady State (Note 3) RqJA 66.0
°C/W
Junction−to−Ambient – Steady State (Note 4) RqJA 113.7
Junction−to−Ambient – (t ≤ 10 s) (Note 3) RqJA 35.6
3. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm2.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter FET Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Break-
down Voltage Q1 V(BR)DSS VGS = 0 V, ID = 250 mA30 V
Q2 30
Drain−to−Source Break-
down Voltage Temperature
Coefficient
Q1 V(BR)DSS
/ TJ
15.8 mV /
°C
Q2 15.3
Zero Gate Voltage Drain
Current Q1 IDSS VGS = 0 V,
VDS = 24 V TJ = 25°C 1
mA
TJ = 125°C 10
Q2 VGS = 0 V,
VDS = 24 V TJ = 25°C 1
Gate−to−Source Leakage
Current Q1 IGSS VGS = 0 V, VDS = +20 V 100 nA
Q2 100
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage Q1 VGS(TH) VGS = VDS, ID = 250 mA 1.3 2.2 V
Q2 1.3 2.2
Negative Threshold Temper-
ature Coefficient Q1 VGS(TH) /
TJ5.0 mV /
°C
Q2 5.1
Drain−to−Source On Resist-
ance Q1 RDS(on) VGS = 10 V ID = 30 A 4.3 5.4
mW
VGS = 4.5 V ID = 18 A 6.5 8.1
Q2 VGS = 10 V ID = 30 A 2.5 3.1
VGS = 4.5 V ID = 30 A 3.4 4.3
CAPACITANCES
Input Capacitance Q1 CISS
VGS = 0 V, f = 1 MHz, VDS = 15 V
1252
pF
Q2 1939
Output Capacitance Q1 COSS 610
Q2 1055
Reverse Capacitance Q1 CRSS 129
Q2 49
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter UnitMaxTypMinTest ConditionSymbolFET
CHARGES, CAPACITANCES & GATE RESISTANCE
Total Gate Charge Q1 QG(TOT)
VGS = 4.5 V, VDS = 15 V; ID = 30 A
10.9
nC
Q2 13.8
Threshold Gate Charge Q1 QG(TH) 1.2
Q2 2.0
Gate−to−Source Charge Q1 QGS 3.4
Q2 5.5
Gate−to−Drain Charge Q1 QGD 5.4
Q2 3.6
Total Gate Charge Q1 QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A 22.2 nC
Q2 30.3
Gate Resistance Q1 RGTA = 25°C1.0 W
Q2 1.0
SWITCHING CHARACTERISTICS (Note 6)
T urn−On Delay Time Q1 td(ON)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
8.9
ns
Q2 10.6
Rise Time Q1 tr21.2
Q2 4.6
T urn−Off Delay Time Q1 td(OFF) 15.3
Q2 21
Fall Time Q1 tf4.4
Q2 4.9
SWITCHING CHARACTERISTICS (Note 6)
T urn−On Delay Time Q1 td(ON)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
6.7
ns
Q2 8.1
Rise Time Q1 tr19.5
Q2 15
T urn−Off Delay Time Q1 td(OFF) 20.1
Q2 26.2
Fall Time Q1 tf2.8
Q2 3.1
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Voltage
Q1
VSD
VGS = 0 V,
IS = 10 A TJ = 25°C 0.82
V
TJ = 125°C 1.15
Q2 VGS = 0 V,
IS = 10 A TJ = 25°C 0.8
TJ = 125°C 1.10
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter UnitMaxTypMinTest ConditionSymbolFET
DRAIN−SOURCE DIODE CHARACTERISTICS
Reverse Recovery Time Q1 tRR
VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A
29.1
ns
Q2 40.2
Charge Time Q1 ta 14.2
Q2 19.5
Discharge Time Q1 tb 14.6
Q2 20.6
Reverse Recovery Charge Q1 QRR 21 nC
Q2 39
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
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TYPICAL CHARACTERISTICS − Q1
Figure 3. On−Region Characteristics Figure 4. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
543210
0
10
30
60
70
100
4.03.53.02.01.51.00.50
0
10
20
30
40
60
70
100
Figure 5. On−Resistance vs. Gate−to−Source
Voltage Figure 6. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)
109876543
0.002
0.004
0.006
0.010
0.012
0.014
0.016
0.026
70605040302010
0.003
0.004
0.005
0.007
0.008
0.009
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
2.8 V
3.0 V
3.2 V
3.4 V
3.6 V
VGS = 2.6 V
3.8 V
4.5 V to 10 V TJ = 25°C
20
40
50
80
90 4.0 V
2.5 4.5
50
VDS = 3 V
TJ = 25°CTJ = −55°C
TJ = 125°C
0.008
0.018
ID = 30 A
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = 25°C
VGS = 10 V
VGS = 4.5 V
0.006
5.0 5.5
80
90
0.020
0.022
0.024
Figure 7. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
1251007550250−25−50
0.7
0.8
0.9
1.1
1.3
1.4
1.5
1.7
Figure 8. Capacitance Variation
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
302520151050
0
200
600
800
1200
1400
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
C, CAPACITANCE (pF)
150
1.0
1.2
1.6 VGS = 10 V
ID = 30 A
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
400
1000
1600
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TYPICAL CHARACTERISTICS − Q1
QT
Figure 9. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
QG, TOTAL GATE CHARGE (nC)
1110865210
0
2
4
6
8
10
Figure 10. Diode Forward Voltage vs. Current
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
0.90.80.70.60.50.1
0
2
6
8
12
14
18
20
VGS, GATE−TO−SOURCE VOLTAGE (V)
IS, SOURCE CURRENT (A)
VGS = 4.5 V
VDS = 15 V
ID = 30 A
TJ = 25°C
QGS QGD
34 7 9
TJ = 25°C
4
10
16
0.40.30.2
11
1
3
5
7
9
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
RG, GATE RESISTANCE (W)
101
1
10
100
1000
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
100
VGS = 10 V
VDS = 15 V
ID = 15 A
tf
tr
td(on)
td(off)
1001010.1
0.1
1
100
1000
ID, DRAIN CURRENT (A)
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
100 ms
1 ms
10 ms
dc
Figure 13. Thermal Characteristics
PULSE TIME (sec)
0.010.001 10.0001 0.10.00001 100.000001
0.001
0.1
1
10
100
R(t) (°C/W)
100 1000
50% Duty Cycle
Single Pulse
20%
10%
5%
2%
1%
0.01 PCB Cu Area 650 mm2
PCB Cu thk 1 oz
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TYPICAL CHARACTERISTICS − Q2
10 V
Figure 14. On−Region Characteristics Figure 15. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
53210
0
20
40
60
30
70
4.03.53.02.01.51.0
Figure 16. On−Resistance vs. VGS Figure 17. On−Resistance vs. Drain Current
and Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
9.08.07.0 106.05.04.03.0
0.002
0.006
0.010
705030 604020
1.5
2.5
4.0
5.0
0
Figure 18. On−Resistance Variation with
Temperature Figure 19. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
15012510075250−25−50
0.8
1.0
1.1
1.3
30252015105
10
100
1000
10000
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RES-
ISTANCE (NORMALIZED)
IDSS, LEAKAGE (nA)
90
10
4 V to 6.5 V 3.6 V
3.2 V
3.0 V
2.8 V
2.6 V
3.8 V
TJ = 25°CVDS = 3 V
TJ = 25°C
TJ = 125°C
TJ = −55°C
0.008
3.0
ID = 30 A
TJ = 25°C
VGS = 4.5 V
TJ = 25°C
VGS = 10 V
50
ID = 30 A
VGS = 10 V VGS = 0 V
TJ = 85°C
TJ = 150°C
TJ = 125°C
2.5
0.004
0.014
0.012
1.2
1.4
0.7
1.5
50
0.016
80
10
3.4 V
110
120
140
100
130
40
20
40
60
30
70
90
10
50
80
110
120
140
100
130
4.50.50
0.020
0.024
0.022
0.018
0.028
0.026
0.5
1.6
1.7
0.9
1.0
2.0
3.5
4.5
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TYPICAL CHARACTERISTICS − Q2
Crss
Figure 20. Capacitance Variation
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
25201510 3050
0
1000
C, CAPACITANCE (pF)
VGS = 0 V
TJ = 25°C
f = 1 MHz
Ciss
Coss
2000
500
1500
2500
3000
4000
3500
Figure 21. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Qg, TOTAL GATE CHARGE (nC)
VGS, GATE−TO−SOURCE VOLTAGE (V)
QT
Qgs Qgd
0
2
4
6
8
10
02468101214
TJ = 25°C
VDS = 15 V
VGS = 4.5 V
ID = 30 A
Figure 22. Diode Forward Voltage vs. Current
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
0.90.80.70.60.50
0
2
4
6
8
10
12
IS, SOURCE CURRENT (A)
TJ = 25°C
14
16
18
20
0.40.1 0.30.2
11
1
5
7
9
3
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TYPICAL CHARACTERISTICS − Q2
Figure 23. Resistive Switching Time Variation
vs. Gate Resistance
RG, GATE RESISTANCE (W)
101
1
10
100
1000
Figure 24. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
100
VGS = 10 V
VDS = 15 V
ID = 15 A
tf
tr
td(on)
td(off)
1001010.1
0.1
1
100
1000
ID, DRAIN CURRENT (A)
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
100 ms
1 ms
10 ms
dc
Figure 25. Thermal Characteristics
PULSE TIME (sec)
0.010.001 10.0001 0.10.00001 100.000001
0.001
0.1
1
10
100
R(t) (°C/W)
100 1000
50% Duty Cycle
Single Pulse
20%
10%
5%
2%
1%
0.01 PCB Cu Area 650 mm2
PCB Cu thk 1 oz
ORDERING INFORMATION
Device Package Shipping†
NTMFD4C87NT1G DFN8
(Pb−Free) 1500 / Tape & Reel
NTMFD4C87NT3G DFN8
(Pb−Free) 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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11
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P PowerPhase FET
CASE 506CR
ISSUE C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.27
0.65
0.75
5.50
6X
PITCH
2.67
DIMENSION: MILLIMETERS
6.50
5X
2.31
4.05
0.76
5X
4.10
1.22
1.66
0.98
2.07
0.71
0.54
0.62
0.23
RECOMMENDED
h−−− 12
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS b AND b1 APPLY TO PLATED TERMINAL AND ARE
MEASURED BETWEEN 0.15 AND 0.25 MM FROM THE TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED PADS AS WELL AS THE
TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
1234
56
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1
h
D
E
B
A
0.20 C
0.20 C
2X
2X
DIM MIN
MILLIMETERS
A0.90
A1 0.00
b0.40
c0.20
D5.15 BSC
D1 4.90
D2 3.70
E6.15 BSC
E1 5.80
E2 2.37
G1 1.615 BSC
L0.34
A
0.10 C
0.10 C
1
e/2
L
DETAIL A
A1
c
4X MAX
1.10
0.05
0.60
0.30
5.10
3.90
6.00
2.57
0.59
78
PIN ONE
IDENTIFIER
NOTE 4 CSEATING
PLANE
DET AIL A NOTE 6
b2 0.40 0.60
ÉÉ
ÉÉ
e
D3 2.96 3.16
E3 1.05 1.25
e1.27 BSC
G0.625 BSC
b
8X
A
M
0.10 BC
M
0.05 C NOTE 3
5X
E4 1.36 1.56
L2 1.68 1.93
BOTTOM VIEW
1D2
E2
A
M
0.10 BC
A
M
0.10 BC
D3
G
G1
E3
b2
6X
L2
E4
SUPPLEMENTAL
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