74LV4060
14-stage binary ripple counter with
oscillator
Product specification 1998 Jun 23
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LV406014-stage binary ripple counter with oscillator
2
1998 Jun 23 853-2076 19619
FEATURES
•Wide operating voltage: 1.0 to 5.5 V
•Optimized for Low Voltage applications: 1.0 to 3.6 V
•Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
•Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V,
Tamb = 25C.
•Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb
= 25C.
•All active components on chip
•RC or crystal oscillator configuration
•Output capability: standard (except for RTC and CTC)
•ICC category: MSI
APPLICATIONS
•Control Counters
•Timers
•Frequency Dividers
•T ime-delay circuits
DESCRIPTION
The 74LV4060 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT4060.
The 74LV4060 is a 14-stage ripple-carry counter/divider and
oscillator with three oscillator terminals (RS, RTC and CTC), ten
buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding
asynchronous master reset (MR). The oscillator configuration allows
design of either RC or crystal oscillator circuits. The oscillator may
be replaced by an external clock signal at input RS. In this case,
keep the oscillator pins (RTC and CTC) floating.
The counter advances on the negative-going transition of RS. A
HIGH level on MR resets the counter (Q3 to Q9 and Q11 to
Q13 = LOW), independent of the other input conditions.
QUICK REFERENCE DATA
GND = 0 V ; Tamb = 25C; tr = tf < 2.5 ns
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay CL = 15 pF
RS to Q3VCC = 3.3 V 29
tPHL/tPLH Qn to Qn+1 6 ns
tPHL MR to Qn16
f
Maximum clock frequency
99
MHz
f
max
Ma
x
im
u
m
clock
freq
u
enc
y
99
MH
z
C1Input capacitance 3.5 pF
C
Power dissi
p
ation ca
p
acitance
p
er
p
ackage
Notes 1, 2 and 3
40
p
F
C
PD
Po
w
er
dissipation
capacitance
per
package
40
pF
NOTES:
1. CPD is used to determine the dynamic power
dissipation (PD in W)
PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V ;
(CL x VCC2 x fo) = sum of the outputs.
2. The condition is V1 = GND to VCC
3. For formula on dynamic power dissipation, see the
following pages.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
16-Pin Plastic DIL –40°C to +125°C74LV4060 N 74LV4060 N SOT38-4
16-Pin Plastic SO –40°C to +125°C74LV4060 D 74LV4060 D SOT109-1
16-Pin Plastic SSOP Type II –40°C to +125°C74LV4060 DB 74LV4060 DB SOT338-1
16-Pin Plastic TSSOP Type I –40°C to +125°C74LV4060 PW 74LV4060PW DH SOT403-1
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 3
PIN DESCRIPTION
PIN NO. SYMBOL FUNCTION
1, 2, 3 Q11 to Q13 Counter outputs
7, 5, 4, 6,
15, 13, 15 Q3 to Q9Counter outputs
8 GND Ground (0 V)
9 CTC External capacitor connection
10 RTC External resistor connection
11 RS Clock input/oscillator pin
12 MR Master reset
16 VCC Positive supply voltage
PIN CONFIGURATION
SV00308
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
GND
Q11
Q12
Q13
Q5
Q4
Q6
Q3
CTC
RTC
RS
MR
Q8
Q7
Q9
VCC
LOGIC SYMBOL
1
2
3
4
5
6
7
910
12
11
13
14
15
CTC
RTC
RS
MR
Q11
Q12
Q13
Q5
Q4
Q6
Q3
Q8
Q7
Q9
SV00307
LOGIC SYMBOL (IEEE/IEC)
9
10
11
12
CX !G
RX
RCX
CT = 0
+
+
CTR14
(a)
11
13
CT
3
9
1
2
3
4
5
6
7
13
14
15
11
12
&
CT = 0
CTR14
(b)
11
13
CT
3
9
1
2
3
4
5
6
7
13
14
15
SV00311
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 4
DYNAMIC POWER DISSIPATION
GND = 0 V ; Tamb = 25 C
PARAMETER VCC
(V) TYPICAL FORMULA FOR PD (W)1
Total dynamic power dissipation when
using the on–chip oscillator (PD)
1.2
2.0
3.0
CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 16 x VCC
CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 460 x VCC
CPD x fosc x VCC2 + (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 1000 x VCC
NOTE:
1. Where: fo= output frequency in MHz; fosc = oscillator frequency in MHz;
(CLxV
CC2xf
o) = sum of the outputs; CL= output load capacitance in pF;
Ct= timing capacitance in pF; VCC = supply voltage in V.
FUNCTIONAL DIAGRAM
910
11
12
CTC
RTC
RS
MR
CD
CP
1
Q11
2
Q12
3
Q13
4
Q5
5
Q4
6
Q6
7
Q3
14-stage binary counter
13
Q8
14
Q7
15
Q9
SV00312
LOGIC DIAGRAM
CTC
RTC
RS
MR Q11
Q3Q13
Q9
FF14FF12FF10FF4
CP
FF1
Q
CD
SV00313
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 5
TIMING DIAGRAM
RS
MR
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q11
Q12
Q13
SV00309
4.0962.0481.0245122561286432168421 8.192 16.384
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +7.0 V
±IIK DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
±IOK DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
±IODC output source or sink current
– standard outputs –0.5V < VO < VCC + 0.5V 25 mA
±IGND,
±ICC
DC VCC or GND current for types with
–standard outputs 50 mA
Tstg Storage temperature range –65 to +150 °C
PTOT
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400 mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 6
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
VCC DC supply voltage See Note11.0 3.3 5.5 V
VIInput voltage 0 – VCC V
VOOutput voltage 0 – VCC V
Tamb Operating ambient temperature range in free
air See DC and AC
characteristics –40
–40 +85
+125 °C
tr, tfInput rise and fall times VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V to 5.5V
–
–
–
–
–
–
–
–
500
200
100
50 ns/V
NOTES:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
DC CHARACTERISTICS
Over operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS
SYMBOL PARAMETER TEST CONDITIONS -40°C to +85°C -40°C to +125°CUNIT
MIN TYP1MAX MIN MAX
VCC = 1.2V 0.9 – – 0.9 –
VIH
HIGH level Input
voltage
VCC = 2.0V 1.4 – – 1.4 –
V
V
IH
voltage
MR input VCC = 2.7 to 3.6V 2.0 – – 2.0 –
V
VCC = 4.5 to 5.5V 0.7 * VCC – – 0.7 * VCC –
VCC = 1.2V – – 0.3 – 0.3
VIL
LOW level Input
voltage
VCC = 2.0V – – 0.6 – 0.6
V
V
IL
voltage
MR input VCC = 2.7 to 3.6V – – 0.8 – 0.8
V
VCC = 4.5 to 5.5 – – 0.3 * VCC –0.3 * VCC
VCC = 1.2V 1.0 – – 1.0 –
VIH
HIGH level Input
voltage
VCC = 2.0V 1.6 – – 1.6 –
V
V
IH
voltage
RS input VCC = 2.7 to 3.6V 2.4 – – 2.4 –
V
VCC = 4.5 to 5.5V 0.8 * VCC – – 0.8 * VCC –
VCC = 1.2V – – 0.2 – 0.2
VIL
LOW level Input
voltage
VCC = 2.0V – – 0.4 – 0.4
V
V
IL
voltage
RS input VCC = 2.7 to 3.6V – – 0.5 – 0.5
V
VCC = 4.5 to 5.5 – – 0.2 * VCC –0.2 * VCC
VCC = 1.2V; RS = GND and MR = GND;
–IO = 3.4mA – – – – –
HIGH level output
VCC = 2.0V; RS = GND and MR = GND;
–IO = 3.4mA ––– – –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V; RS = GND and MR = GND;
–IO = 3.4mA – – – – – V
RTC
out ut
VCC = 3.0V; RS = GND and MR = GND;
–IO = 3.4mA 2.40 2.82 – 2.20 –
VCC = 4.5V; RS = GND and MR = GND;
–IO = 3.4mA – – – – –
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 7
SYMBOL UNIT
LIMITS
TEST CONDITIONSPARAMETER
SYMBOL UNIT -40°C to +125°C -40°C to +85°CTEST CONDITIONSPARAMETER VCC = 1.2V ; RS = V CC and MR = VCC;
–IO = 0.8mA – – – – –
HIGH level output
VCC = 2.0V ; RS = V CC and MR = VCC;
–IO = 0.8mA – – – – –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V ; RS = V CC and MR = VCC;
–IO = 0.8mA – – – – – V
RTC
out ut
VCC = 3.0V ; RS = V CC and MR = VCC;
–IO = 0.8mA 2.40 2.82 – 2.20 –
VCC = 4.5V ; RS = V CC and MR = VCC;
–IO = 0.8mA – – – – –
VCC = 1.2V; RS = GND and MR = GND;
–IO = 100µA1.0 1.2 – 1.0 –
HIGH level output
VCC = 2.0V; RS = GND and MR = GND;
–IO = 100µA1.8 2.0 – 1.8 –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V; RS = GND and MR = GND;
–IO = 100µA– – – – – V
RTC
out ut
VCC = 3.0V; RS = GND and MR = GND;
–IO = 100µA2.8 3.0 – 2.8 –
VCC = 4.5V; RS = GND and MR = GND;
–IO = 100µA– – – – –
VCC = 1.2V ; RS = V CC and MR = VCC;
–IO = 100µA1.0 1.2 – 1.0 –
HIGH level output
VCC = 2.0V ; RS = V CC and MR = VCC;
–IO = 100µA1.8 2.0 – 1.8 –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V ; RS = V CC and MR = VCC;
–IO = 100µA– – – – – V
RTC
out ut
VCC = 3.0V ; RS = V CC and MR = VCC;
–IO = 100µA2.8 3.0 – 2.8 –
VCC = 4.5V ; RS = V CC and MR = VCC;
–IO = 100µA– – – – –
VCC = 1.2V ; RS = V IH and MR = VIL;
–IO = 3.8mA 1.2 – – –
HIGH level output
VCC = 2.0V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
CTC out
p
ut
VCC = 2.7V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – – V
CTC
out ut
VCC = 3.0V ; RS = V IH and MR = VIL;
–IO = 3.8mA 2.40 2.82 – 2.20 –
VCC = 4.5V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – –
VCC = 1.2V ; V I = VIH and VI = VIL;
–IO = 100µA1.0 1.2 – 1.0 –
HIGH level output
VCC = 2.0V ; V I = VIH and VI = VIL;
–IO = 100µA1.8 2.0 – 1.8 –
VOH
HIGH
l
eve
l
ou
t
pu
t
voltage;
exce
p
tR
TC out
p
ut
VCC = 2.7V ; V I = VIH and VI = VIL;
–IO = 100µA– – – – – V
exce t
RTC
out ut
VCC = 3.0V ; V I = VIH and VI = VIL;
–IO = 100µA2.8 3.0 – 2.8 –
VCC = 4.5V ; VI = VIH and VI = VIL;
–IO = 100µA– – – – –
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 8
SYMBOL UNIT
LIMITS
TEST CONDITIONSPARAMETER
SYMBOL UNIT -40°C to +125°C -40°C to +85°CTEST CONDITIONSPARAMETER VCC = 1.2V ; V I = VIH and VI = VIL;
–IO = 6mA – – – – –
HIGH level output VCC = 2.0V ; V I = VIH and VI = VIL;
–IO = 6mA ––– – –
VOH
HIGH
level
out ut
voltage;
except RTC and
Ctt
VCC = 2.7V ; V I = VIH and VI = VIL;
–IO = 6mA – – – – – V
C
TC outputs VCC = 3.0V ; VI = VIH and VI = VIL;
–IO = 6mA 2.40 2.82 – 2.20 –
VCC = 4.5V ; VI = VIH and VI = VIL;
–IO = 6mA – – – – –
VCC = 1.2V ; RS = V CC and MR = GND;
–IO = 3.4mA – – – – –
LOW level output
VCC = 2.0V ; RS = V CC and MR = GND;
–IO = 3.4mA ––– – – V
VOL
LOW
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V ; RS = V CC and MR = GND;
–IO = 3.4mA – – – – –
RTC
out ut
VCC = 3.0V ; RS = V CC and MR = GND;
–IO = 3.4mA – 0.25 0.40 – 0.50 V
VCC = 4.5V ; RS = V CC and MR = GND;
–IO = 3.4mA – – – – – V
VCC = 1.2V ; RS = V CC and MR = GND;
–IO = 100µA– 0 0.2 – 0.2
LOW level output
VCC = 2.0V ; RS = V CC and MR = GND;
–IO = 100µA– 0 0.2 – 0.2
VOL
LOW
l
eve
l
ou
t
pu
t
voltage;
RTC out
p
ut
VCC = 2.7V ; RS = V CC and MR = GND;
–IO = 100µA– – – – – V
RTC
out ut
VCC = 3.0V ; RS = V CC and MR = GND;
–IO = 100µA– 0 0.2 – 0.2
VCC = 4.5V ; RS = V CC and MR = GND;
–IO = 100µA– – – – –
VCC = 1.2V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – –
LOW level output
VCC = 2.0V ; RS = V IH and MR = VIL;
–IO = 3.8mA ––– – –
VOL
LOW
l
eve
l
ou
t
pu
t
voltage;
CTC out
p
ut
VCC = 2.7V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – – V
CTC
out ut
VCC = 3.0V ; RS = V IH and MR = VIL;
–IO = 3.8mA – 0.25 0.40 – 0.50
VCC = 4.5V ; RS = V IH and MR = VIL;
–IO = 3.8mA – – – – –
VCC = 1.2V ; V I = VIH and VI = VIL;
–IO = 100µA– 0 0.2 – 0.2
LOW level output
VCC = 2.0V ; V I = VIH and VI = VIL;
–IO = 100µA– 0 0.2 – 0.2
VOL
LOW
l
eve
l
ou
t
pu
t
voltage;
exce
p
tR
TC out
p
ut
VCC = 2.7V ; V I = VIH and VI = VIL;
–IO = 100µA– – – – – V
exce t
RTC
out ut
VCC = 3.0V ; V I = VIH and VI = VIL;
–IO = 100µA– 0 0.2 – 0.2
VCC = 4.5V ; VI = VIH and VI = VIL;
–IO = 100µA– – – – –
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 9
SYMBOL UNIT
LIMITS
TEST CONDITIONSPARAMETER
SYMBOL UNIT -40°C to +125°C -40°C to +85°CTEST CONDITIONSPARAMETER VCC = 1.2V ; V I = VIH and VI = VIL;
–IO = 6mA – – – – –
HIGH level output VCC = 2.0V ; V I = VIH and VI = VIL;
–IO = 6mA ––– – –
VOL
HIGH
level
out ut
voltage;
except RTC and
Ctt
VCC = 2.7V ; V I = VIH and VI = VIL;
–IO = 6mA – 0.25 0.40 – 0.50 V
C
TC outputs VCC = 3.0V ; VI = VIH and VI = VIL;
–IO = 6mA – – – – –
VCC = 4.5V ; VI = VIH and VI = VIL;
–IO = 6mA – – – – –
IIInput leakage
current VCC = 5.5V ; VI = VCC or GND – – 1.0 – 1.0 µA
ICC
Quiescent supply
current VCC = 3.6V ; VI = VCC or GND; IO = 0 – – 20 – 160
µA
I
CC Quiescent supply
current VCC = 5.5V ; VI = VCC or GND; IO = 0 – – – – 80
µA
∆ICC
Additional
quiescent supply
current per input
pin
VCC = 2.7V to 3.6V ; VI = VCC –0.6V;
IO = 0 – – 500 – 850 µA
NOTE:
1. All typical values are measured at Tamb = 25°C.
AC CHARACTERISTICS
GND = 0V ; tr = tf = 2.5ns; CL = 50pF; RL = 500Ω
SYMBOL PARAMETER WAVEFORM CONDITION LIMITS
–40 to +85 °CLIMITS
–40 to +125 °CUNIT
VCC(V) MIN TYP1MAX MIN MAX
1.2 – 180 – – –
Propagation delay
2.0 – 52 84 – 105
tPHL/tPLH
P
ropaga
ti
on
d
e
l
ay
RS to Q3
Figures, 6, 8 2.7 – 42 66 – 83 ns
RS
to
Q3
3.0 to 3.6 – 33253 – 66
4.5 to 5.5 – 24 39 – 49
1.2 – 40 – – –
Propagation delay
2.0 – 14 23 – 29
tPHL/tPLH
P
ropaga
ti
on
d
e
l
ay
Qnto Qn+1
Figures 7, 8 2.7 – 10 16 – 20 ns
Qn
to
Qn+1
3.0 to 3.6 – 8213 – 16
4.5 to 5.5 – 6 9 – 11
1.2 – 100 – – –
Propagation delay
2.0 – 29 46 – 58
tPHL
P
ropaga
ti
on
d
e
l
ay
MR to Qn
Figures 7, 8 2.7 – 24 39 – 49 ns
MR
to
Qn
3.0 to 3.6 – 19231 – 39
4.5 to 5.5 – 14 23 – 29
2.0 34 9 – 38 –
tW
Clock pulse width
Figure 6
2.7 25 6 – 30 –
ns
t
WRS; HIGH or LOW
Figure
6
3.0 to 3.6 20 5 – 24 –
ns
4.5 to 5.5 16 4 – 20 –
2.0 34 10 – 38 –
tW
Master reset pulse
Figure 7
2.7 25 8 – 30 –
ns
t
Wwidth MR; HIGH
Figure
7
3.0 to 3.6 20 6 – 24 –
ns
4.5 to 5.5 16 4 – 20 –
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 10
SYMBOL UNIT
LIMITS
–40 to +125 °C
LIMITS
–40 to +85 °C
CONDITION
WAVEFORMPARAMETER
SYMBOL UNIT
MAXMINMAXTYP1
MINVCC(V)
WAVEFORMPARAMETER
2.0 29 18 – 37 –
t
Removal time
Figure 7
2.7 26 16 – 32 –
ns
t
rem MR to RS
Figure
7
3.0 to 3.6 18 11 – 23 –
ns
4.5 to 5.5 12 7 – 15 –
2.0 14 40 – 9 –
f
Maximum clock
Figure 6
2.7 19 70 – 12 –
MHz
f
max pulse frequency
Figure
6
3.0 to 3.6 24 90 – 15 –
MHz
4.5 to 5.5 30 100 – 19 –
NOTE:
Unless otherwise stated, all typical values are at Tamb = 25°C.
1. Typical value measured at VCC = 3.3V.
2. Typical value measured at VCC = 5.0V.
io ~
A
VCC
Rbias = 560 kW
input output 100 mF0.47 mF
Vi ~
(f = 1 kHz) GND
SV00323
Figure 1.
Test set-up for measuring forward transconductance
gfs = dio/dvi at vo is constant (see also graph Figure 2); MR = LOW.
VCC (V)
01 2 3 4
0
5
10
15
20
gfs
(mA/V)
SV00324
Figure 2.
Typical forward transconductance gfs as a function of the supply
voltage VCC at Tamb = 25C.
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 11
SV00732
Ct
C2 R2
RS11
Rt
RTC CTC
10 9
ÎÎÎÎÎ
ÎÎÎÎÎ
MR (from logic)
Figure 3.
Example of an RC oscillator. Typical formula for oscillator frequency:
fOSC 1
2.5xR
txC
t
SV00328
10–2 Ct (mF) 10–1
Rt (W)
103
10
102
103
105
104
fosc
(Hz)
10–4
104
10–3
105106
Figure 4.
RC oscillator frequency as a function of Rt and Ct at
VCC = 1.2 to 3.6 V ; Tamb = 25°C.
Ct curve at Rt = 100 kW; R2 = 200 kW.
Rt curve at Ct = 1 nF; R2 = 2 x Rt.
TIMING COMPONENTS LIMITATIONS
The oscillator frequency is mainly determined by Rt . Ct, provided R2 2Rt and R2 . C2 Rt . Ct. The function of R2 is to minimize the
influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance C2 should be kept as small as
possible. In consideration of accuracy, Ct must be larger than the inherent stray capacitance. Rt must be larger than the ’ON’ resistance in
series with it, which typically is 280 W at VCC = 1.2 V, 130 W at VCC = 2.0 V and 100 W at VCC 3.0 V. The recommended values for these
components to maintain agreement with the typical oscillation formula are: Ct > 50pF, up to any practical value, 10 kW < Rt < 1 MW. In order to
avoid start-up problems, Rt > 1 kW.
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 12
C3
Rbias
100 k to 1 M
RS11
RTC
10
MR (from logic)
C2 100 pF
22 to
37 pF
R2
2.2 k
SV00326
Figure 5. External components connection for
a typical crystal oscillator
R2 is the power limiting resistor. For starting and maintaining
oscillation, a minimum transconductance is necessary, so R2 should
not be too large. A practical value for R2 is 2.2 k.
VM
CP INPUT
Qn OUTPUT
VOL
VOH
GND
VI
VM
tPLH
tPHL
tW
1/fmax
SV00322
Figure 6.
W aveforms showing the clock (RS) to output (Q3) propagation
delays, the clock pulse width, the output transition times and the
maximum clock frequency.
VM
MR INPUT
RS INPUT
VI
VCC
VI
GND
GND
GND
Qn OUTPUT
VM
trem
tPHL
tW
VM
SV00329
Figure 7.
W aveforms showing the master reset (MR) pulse width, the master
reset to output (Qn) propagation delays and the master reset to
clock (RS) removal time.
VM
Qn OUTPUT
VOH
VOH
VOL
VOL
Qn+1 OUTPUT VM
tPLH tPHL
SV00327
Figure 8.
W aveforms showing the output Qn to output n + 1 propagation
delays.
NOTES:
1. VM = 1.5 V at VCC > 2.7 V and < 3.6 V
VM = 0.5 . VCC at VCC < 2.7 V and > 4.5 V.
2. VOL and VOH are the typical output voltage drop that occur with
the output load.
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 13
TEST CIRCUIT
VMVM
tW
NEGATIVE
PULSE 10% 10%
90% 90%
0V
VMVM
tW
VI
POSITIVE
PULSE
90% 90%
10% 10% 0V
tTHL (tf)
tTLH (tr)t
THL (tf)
tTLH (tr)
VM = 1.5V
Input Pulse Definition
SWITCH POSITION
PULSE
GENERATOR
RT
Vl
D.U.T.
VO
CL
Vcc
RL = 1kΩ
Test Circuit for Outputs
Open
GND
S1
DEFINITIONS
VCC VI
< 2.7V
2.7–3.6V VCC
2.7V
TEST S1
tPLH/tPHL Open
≥4.5 V VCC
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of
pulse generators.
VI
2 <VCC
SV00910
RL = 1kΩ
100pF
Figure 9. Load circuitry for switching times.
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 14
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 15
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 16
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
Philips Semiconductors Product specification
74LV4060
14-stage binary ripple counter with oscillator
1998 Jun 23 17
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
Philips Semiconductors Product specification
74LV4060
14-stage bunary ripple counter with oscillator
yyyy mmm dd 18
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 08-98
Document order number: 9397-750-04658
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
