MIEGE 10.000 LOGIC DIAGRAMS Numbers in parenthesis dencte pin numbers for F package (Case 650). FUNCTIONS AND CHARACTERISTICS (continued) Type 0) Propagation Power Dissipation Delay mW Function -30 to +85C | -55 to +125C ns typ typ/pkg* Case Universal Decade Counter MC10137 MC10537 f= 150 MHz 625 620,650 Bi-Quinary Counter MC10138 _ f= 150 MHz 370 620 64-Bit Random Access Memory (90 2) MCM10140 - taccess = 15 (max) 420 620,690 Four-Bit Universal Shift Register MC10141 MC 10541 # = 200 MHz 425 620,648 650 64 Bit Random Access Memory (50 $2) MCM10142 ~ taAccess = 10 (max) 420 620 8 x 2 Muitiport Register File (RAM} MCM10143 - taccess = 10 610 623 256-Bit Random Access Memory MCM10144 - taccess = 30 (max) 420 620,690 64-Bit Register File (RAM) MCM10145 - taccess = 10 625 620 128-Bit Random Access Memory MCM10147 - taccess = 12 (max) 420 620 64-Bit Random Access Memory (50 92) MCM10148 _ taccess = 15 (max) 420 620 1024-Bit Programmable Read Only Memory MCM10150 _ taccess = 20 = 690 Quad Latch MC10153 _ 4.0 310 620 12-Bit Parity Generator-Checker MC10160 MC10560 5.0 320 620,648 650 Binary to 1-8 Decoder (Low) MC10161 Mc10561 4.0 315 620,648,650 Binary to 1-8 Decoder (High) MC 10162 MC10562 4.0 315 620,648 ,650 Error Detection-Correction Circuit MC10163 _ 5.0 520 620 8-Line Multiplexer MC10164 MC 10564 3.0 310 620,648,650 8-Input Priority Encoder MC10165 _ 7.0 545 620,648 5-Bit Magnitude Comparator MC10166 - 6.0 440 620 Quad Latch MC 10168 - 3.0 310 620 Oual Binary To t-4 Decoder (Low) MC10171 Mc10571 4.0 32S 620,648,650 Dual Binary To 1-4 Decoder (High) MC10172 MC10572 4.0 325 620,648,650 Quad 2-Input Multiplexer/Latch MC10173 - 2.5 278 620,648 Dual 4 To 1 Multiplexer MC10174 McC 10574 3.5 305 620,650 Quint Latch MC10175 MC10575 2.5 400 620 Hex D" Master-Slave Flip-Flop mMC10176 - f = 250 MHz 460 620 Triple MECL to NMOS Translator MC10177 _ - 1.0W 620 Binary Counter MC 10178 _ f = 150 MHz 370 620 Look-Ahead Carry Block MC10179 Mc 10579 3,0 (Cn,P} 4.0 (G) 300 620,648,650 Dua! High Speed Adder/Subtractor MC 70180 Mc 10580 4.5 360 620,648,650 4-Bit Arithmetic Logic Unit/Function Generator MC10181 McC10581 See Logic Diag. 600 623,649,652 2-Bit Arithmetic Logic Unit/Function Generator MC10182 - See Logic Diag. 575 620 Error Detection-Correction Circuit MC10193 _ 7.5 520 620 Hex inverter/Buffer MC10195 - 2.0 200 620 Hex AND Gate MC10197 - 2.8 200 620 High Speed Dual 3-Input 3-Output OR Gate MC10210 _ 1.5 160 620 High Speed Oual 3-input 3-Output NOR Gate MC10211 =_ 1.5 160 620 High Speed Dual 3-Input 3-Output OR/NOR Gate MCc10212 _ 1.5 160 620 High Speed Tripie Line Receiver MC 10216 Mc 10616 1.8 100 620,648,650 High Speed Dual Type D Master-Slave Flip-Flop Mc10231 mMc10631 f = 225 MHz 270 620,648,650 High Speed 2 x 1 Bit Array Multiplier Block MC 10287 - ~ 400 620 q@ L suffix denotes Dual In-Line Ceramic Package, P suffix denotes Dual In-Line Plastic Package, F suffix denotes flat package {i.e., MC101001. = Ceramic Dual In-Line Package, MC10100P = Plastic Dual !n-Line Package and MC 10S500F = Ceramic Flat Package.) *Load Power not includedDUAL BINARY TO 1-4 DECODER MECL 10,000 series (LOW) MC10571 POSITIVE LOGIC Eo (2) 14 10(14)Q0 3 11(15) QO 2 12(16) QO 1 A(13)9 13 (1) a0 0 3 (7) Q1 3 B(11)7 4 (8) Qi 2 E (3) 18 5 (9) Q1 1 Z1 (6) 2 6 (10)Q1 0 Numbers et end of terminals are pin numbers for L package (Case 620). Numbers in parenthesis denotes pin numbers for F package (case 650). TRUTH TABLE The MC10571 is a binary coded 2 line to dual 4 line decoder with selected outputs fow. With either EO or E1 high, the corresponding selected 4 outputs are high. The common enable E forces all outputs high. All propagation delay times are equal due to the internal emitter dotting techniques used. High impedance 50 k ohm resistors on all inputs eliminate the need to tie unused inputs to VEE. Pp = 330 mW typ/pkg (No Load) tod = 4.0nstyp Case | Vcc1|Vcca| Vee 620 | Pin 1} Pin 16/Pin 8 650 | Pin S| Pin 4 [Pin 12 ENABLE INPUTS | {INPUTS OUTPUTS | Go | &1 |] a B | a10} O14 | G12 | Q13 | GOO | Q01 | Q02 | A03 t L Ll L t L H H H Ll H H H ul bt L L H H Ll H H H L H H ut t L H u H H Ll H H H Lt H L Ll L H H H H R L H ial H L L Lt H tl L H H H H L H H H L H l Lt i L H H H H H H H H O) o @ o H H H H H H H H @ = Don't Care See General Information section for pack aging and maximum ratings. 3-331CEE-E ELECTRICAL CHARACTERISTICS Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after therma! equi- librium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 100-ohm resistor 10 -2.0 volts. Test procedures are shown only for selected inputs and outputs. Other inputs and outputs are tested in a similar manner. 10 003 11 Q02 12 Q01 13 Q00 3 Q13 4 12 5 Q11 6 Q10 ye L SUFFIX CERAMIC PACKAGE CASE 620 TEST VOLTAGE VALUES E12 (Voits) @ Test Temperature Vitmax Viemin | VthAmin|YiLAmax| VEE 55C ~0.880 ~1920 | -1.255 | -1.510 | -5.2 +25C ~0.780 -1,850 | -1.105 | -1.475 | -5.2 +126C 0.630 -1.820_ | -1.000 ; -1.400 | -5.2 . MC10571L Test Limits Pin , oO 3, TEST VOLTAGE APPLIED TO PINS LISTED BELOW: Under -55C +25C +125C (Vee) Characteristic Symbol | Test Min Max Min Typ Max Min Max Unit Vitmax Vitmin | VinAmin|iLAmax| VEE Gnd Power Supply Drain Current le 8 - 7 - 64 77 - - mAdc = [2,7,9,14,15 - _ - 8 1,16 Input Current link 14 _ - - - 220 - - uAdc 14 - - - 8 1,16 tin 14 0s = 05 - = 0.3 - wAde _ 14 - = 8 1,16 Logic 1" Gutput Voltage VoH 6 -1.080 | - 880 | -0.930 - ~0.780 | -0.925 |} 2630 Ndc 5 = _ - 38 TAG 13 ~1.080 | -0.880 | -0.930 - -0.780 | -0.825 | -0.630 Vde 15 = = = 8 116 Logic 0 Output Voltage VOL 13 -1.920 } -1.655 | -7.850 - -1.620 | -1.820 | -1.545 Vde - 2,7,9,14,15 = _ 8 1,16 Logic 1 Threshold Voltage VOHA 6 -7,100 - -0.950 _ = -0.845 - Vde - _ 15 - 8 1,16 13 ~1.100 - -0.950 = = ~0.845 - Vde = - 15 = 8 1,16 Logic 0 Threshold Voltage VoLA 6 - -1 835 = - ~1.600 - 71.825 Vdc - 23465 - 7 SB 146. 13 ~ -1,635 - - ~1.600 - -1.525 Vde - 2,7,14,15 - 9 8 1,16 Switching Times 41.11V +0.31V_ | Pulse in PulssOut |-3.2V | +2.0V {100,57 Load) Propagation Delay 1746+ 6 - - 15 4.0 6.0 = ns 14 2,9,15 7 6 8 1,16 17-6 6 ~ - - - 14 29,15 6 7413+ 13 - - - - 2 9,14,15 13 t713- 13 - - - - 2 9,14,16 13 16+ 6 - - 1.1 2.0 3.3 _ _ 14 2,9,15 6 Rise Time (20% to 80%) 13+ 13 - - - ~ 2 9,14,15 13 tg 6 - - - - 14 29,15 6 Fat Time (20% to 80%) 43- 13 = = = = 2 9,14,15, 33 (penuiuos) | /GOLOWEfE- ELECTRICAL CHARACTERISTICS Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equi- librium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 100-ohm resistor to -2.0 volts. Test procedures are shown only for selected inputs and outputs. Other inputs and outputs are tested in a similar manner. 14 Q03 15 Q02 16 Q01 1 2000 7 Q13 8.Q12 9 Q11 L_ ] te a10 F SUFFIX CERAMIC PACKAGE CASE 650 TEST VOLTAGE VALUES E16 {Volts} @ Test Temperature ViHmax Vitmin | ViHAmin|VitAmax| VEE -55C -0.880 -1.920 ] -1.255 | -1.510 | -5.2 +25C -0.780 -1.850 | -1.105 | -1.475 | -5.2 +125C -0.630 -1.820 | -1.000 | -1.400 | -5.2 . MC10571F Test Limits Pin 3 3, TEST VOLTAGE APPLIED TO PINS LISTED BELOW: - Under ~55C +25C #125C Vec} Characteristic Symbol | Test Min Max Min Typ Max Min Max Unit | Vitimex Vicmin | VihAmin| VitAmax| VEE Gnd Power Supply Drain Current IE 12 = = = 64 77 = mAdc | 2,3,6,11,13 = = = 12 45 Input Current link 2 - - - - 220 - Adc 2 - ~_ - 12 45 Hint 2 0.5 = 05 = - 03 = nAdc - 2 - - 12 45 Logic 1 Output Voltage Vou 10 | -1.080 | -0.880 | -0.930 = -0.780 | -0.825 | -0.630 | Vde 3 - - - 12 45 1 1,080 | -0.880 | -0.930 - -0.780 | -0.825 | -0.630 | Vdc 3 = = - 12 45 Logic 0" Output Voltage VoL 1 ~1,920 | -1.655 | -1.850 - -1.620 | -1.820 | -1.545 | Vde = 2,7,9,14,15 - - 12 45 Logic 1 Threshold Voltage - VOHA 10 | -1.100 ~0.950 - - 0.845 - Vde 3 - 3 - 12 45 1 -1.100 - -0.950 ~ = 0.845 Vde 3 = 3 - 12 45 Logic 0 Threshold Voltage VOLA 10 = -1.635 = - ~1.600 - -1.525 | Vde - 2,9,14,15 - " 12 45 1 - ~1.635 - - -1.600 - -1.625 | Vde - 2,7,14,15 - 13 12 45 Switching Times +1.110V +0.31V Pulse tn JPulse Out [-3.2V | +2.0V (100 Load) Propagation Delay 1114104 10 - ~ 15 4.0 6.0 - - ns 2 36,13 1 10 12 45 t11-10- 10 - - - 2 36,13 10 tyast+ 1 - - | | ~ - 6 2,3,13 1 ty1-1- 1 - - - - 6 2,3,13 1 10+ 10 - - 11 2.0 33 - - 2 36,13 10 Rise Time (20% to 80%) tht 1 - - - - 6 2,3,13 1 t10- 10 - - - - 2 3,6,13 10 Fall Time (20% to 80%) 4. 1 - - - - 6 2,3,13 1 (penuuos) L ZGOLOWMC 10571 (continued) SWITCHING TIME TEST CIRCUIT AND WAVEFORMS @ 25C Voct * Voc2 Vin +2.0 Vde Vout Pulse Generator PROPAGATION DELAY (20 to 80%) | | | my T } input Pulse | te=t- = 2.04 0.2 n8 ee | | | : 0.1 uF 0.1 uF Unused outputs connected to 38 100-ohm resistor to ground. = 0 +0.31 Vae = Veg = -3.2 Vde Alt input and output cables to the scope are equal tengths of 50-ohrn coaxial cable, Wire tngth should be <1/4 inch from TPipn to input pin and TP ou, to output pin.