© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 12
1Publication Order Number:
CS8371/D
CS8371
8.0 V/1.0 A, 5.0 V/250 mA
Dual Regulator
with Independent Output
Enables and NOCAPt
The CS8371 is an 8.0 V/5.0 V dual output linear regulator. The
8.0 V ±5.0% output sources 1.0 A, while the 5.0 V ±5.0% output
sources 250 mA. Each output is controlled by its own ENABLE lead.
Setting the ENABLE input high turns on the associated regulator
output. Holding both ENABLE inputs low puts the IC into sleep mode
where current consumption is less than 10 mA.
The regulator is protected against overvoltage, short−circuit and
thermal runaway conditions. The device can withstand 45 V load dump
transients making suitable for use in automotive environments. ON’s
proprietary NOCAP solution is the first technology which allows the
output to be stable without the use of an external capacitor.
The CS8371 is available in a 7 lead TO−220 package with copper
tab. The tab can be connected to a heatsink if necessary.
Features
•Two Regulated Outputs
−8.0 V ±5.0%; 1.0 A
−5.0 V ±5.0%; 250 mA
•Independent ENABLE for Each Output
•Seperate Sense Feedback Lead for 8.0 V Output
•< 10 mA Sleep Mode Current
•Fault Protection
−Overvoltage Shutdown
−+45 V Peak Transient Voltage
−Short Circuit
−Thermal Shutdown
•CMOS Compatible, Low Current ENABLE Inputs
•Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
PIN CONNECTIONS AND
MARKING DIAGRAM
Device Package Shipping
ORDERING INFORMATION
50 Units/RailCS8371ET7 TO−220
STRAIGHT
50 Units/RailCS8371ETVA7 TO−220
VERTICAL
TO−220
SEVEN LEAD
T SUFFIX
CASE 821E
TO−220
SEVEN LEAD
TVA SUFFIX
CASE 821J
1
7
1
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
Tab = GND
Pin 1. ENABLE1
2. ENABLE2
3. VOUT2
4. GND
5. Sense
6. VCC
7. VOUT1
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50 Units/RailCS8371ETVA7G TO−220
VERTICAL
(Pb−Free)
50 Units/RailCS8371ET7G TO−220
STRAIGHT
(Pb−Free)
CS
8371
AWLYWWG
CS
8371
AWLYWWG
CS8371
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2
Figure 1. Block Diagram
−
+
ENABLE1
Trimmed Bandgap
Voltage Reference
1.2 V Pre−Regulator
Bias Generator
Thermal
Shutdown
−
+
ENABLE2
1.2 V
+
−
Overvoltage
Shutdown
−
+
VCC
Current Limit
VOUT2
GND
NOCAP
Current Limit
Sense
VOUT1
MAXIMUM RATINGS
Rating Value Unit
Power Dissipation Internally Limited −
ENABLE Input Voltage Range −0.6 to +10 V
Load Current (8.0 V Regulator) Internally Limited −
Load Current (5.0 V Regulator) Internally Limited −
Transient Peak Voltage (31 V Load Dump @ 14 V VCC) 45 V
Storage Temperature Range −65 to +150 °C
Junction Temperature Range −40 to +150 °C
Lead Temperature Soldering: Wave Solder (through hole styles only) (Note 1) 260 peak °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 second maximum.
CS8371
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3
ELECTRICAL CHARACTERISTICS: (−40°C≤ TA≤ +85°C, 10.5 V ≤ VCC ≤ 16 V, ENABLE1 = ENABLE2 = 5.0 V,
IOUT1 = IOUT2 = 5.0 mA, unless otherwise stated.)
Characteristic Test Conditions Min Typ Max Unit
PRIMARY OUTPUT (VOUT1)
Output Voltage IOUT1 = 1.0 A 7.60 8.00 8.40 V
Line Regulation 10.5 V ≤ VCC ≤ 26 V − − 50 mV
Load Regulation 5.0 mA ≤ IOUT1 ≤ 1.0 A − − 150 mV
Sleep Mode Quiescent Current VCC = 14 V, ENABLE1 = ENABLE2 = 0 V 0 0.2 10.0 mA
Quiescent Current VCC = 14 V, IOUT1 = 1.0 A, IOUT2 = 250 mA − − 30 mA
Dropout Voltage IOUT1 = 250 mA
IOUT1 = 1.0 A
− −
−
1.2
1.5
V
V
Quiescent Bias Current IOUT1 = 5.0 mA, ENABLE2 = 0 V, VCC = 14 V,
IQ = ICC − IOUT1
IOUT1 = 1.0 A, ENABLE2 = 0 V, VCC = 14 V,
IQ = ICC − IOUT1
−
−
−
−
10
22
mA
mA
Ripple Rejection f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
−
−
−
90
74
68
−
−
−
dB
dB
dB
Current Limit VCC = 16 V 1.1 − 2.5 A
Overshoot Voltage 5.0 mA ≤ IREG1 ≤ 1.0 A − − 6.0 V
Output Noise 10 Hz − 100 kHz − 300 − mVrms
SECONDARY OUTPUT (VOUT2)
Output Voltage IOUT2 = 250 mA 4.75 5.00 5.25 V
Line Regulation 7.0 V ≤ VCC ≤ 26 V − − 40 mV
Load Regulation 5.0 mA ≤ IOUT2 ≤ 250 mA − − 100 mV
Dropout Voltage IOUT2 = 5.0 mA
IOUT2 = 250 mA
− −
−
2.2
2.5
V
V
Quiescent Bias Current IOUT2 = 5.0 mA, ENABLE1 = 0 V, VCC = 14 V,
IQ = ICC − IOUT2
IOUT2 = 250 mA, ENABLE1 = 0 V, VCC = 14 V,
IQ = ICC − IOUT2
−
−
−
−
7.0
8.0
mA
mA
Ripple Rejection f = 120 Hz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
f = 10 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
f = 20 kHz, VCC = 14 V with 1.0 VPP AC, COUT = 0 mF
−
−
−
90
75
67
−
−
−
dB
dB
dB
Current Limit VCC = 16 V 270 − 600 mA
Overshoot Voltage 5.0 mA ≤ IREG2 ≤ 250 mA − − 4.3 V
Output Noise 10 Hz − 100 kHz − 170 − mVrms
ENABLE FUNCTION (ENABLE)
Input Current VCC = 14 V, 0 V ≤ ENABLE ≤ 5.5 V −150 − 150 mA
Input Voltage Low
High
0
2.0
−
−
0.8
5.0
V
V
PROTECTION CIRCUITRY
ESD Threshold Human Body Model ±2.0 ±4.0 − kV
Overvoltage Shutdown − 24 − 30 V
Thermal Shutdown Guaranteed by Design 150 180 − °C
Thermal Hysteresis − − 30 − °C
CS8371
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PACKAGE PIN DESCRIPTION
PACKAGE LEAD #
7 Lead TO−220 LEAD SYMBOL FUNCTION
1 ENABLE1ENABLE control for the 8.0 V, 1.0 A output.
2 ENABLE2ENABLE control for the 5.0 V, 250 mA output.
3 VOUT2 5.0 V ±5.0%, 250 mA regulated output.
4 GND Ground.
5 Sense Sense feedback for the primary 8.0 V output.
6 VCC Supply voltage, usually from battery.
7 VOUT1 8.0 V ±5.0%, 1.0 A regulated output.
TYPICAL PERFORMANCE CHARACTERISTICS
85°C
−40
Ambient Temperature (°C) Ambient Temperature (°C)
Figure 2. Regulator 1 Output Voltage Figure 3. Regulator 2 Output Voltage
Output Current (mA) Output Current (mA)
Figure 4. Regulator 1 Dropout Voltage Figure 5. Regulator 2 Dropout Voltage
5.00
−20
Output Voltage (V)
Output Voltage (V)
2.5
Dropout Voltage (V)
50
8.05
8.04
8.03
8.02
8.01
8.00
7.99
7.98
7.97
7.96
7.95
Dropout Voltage (V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
−20 0 20 40 60 80 100 120 140
0 100 200 500 600 700 800 900 1000300 400
0 20 40 60 80 100 120 140−40
4.95
4.90
4.85
2.0
1.5
1.0
0.5
0100 150 200 2500
VIN = 14 V
IOUT = 1.0 A
VIN = 14 V
IOUT = 250 mA
25°C
25°C
85°C
−40°C
−40°C
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TYPICAL PERFORMANCE CHARACTERISTICS
0
Reg 1 Output Current (A) Reg 2 Output Current (mA)
Figure 6. Regulator 1 Current Limit Figure 7. Regulator 2 Current Limit
Ambient Temperature (°C) Ambient Temperature (°C)
Figure 8. Quiescent Current Figure 9. Quiescent Current
10
0
Reg 1 Output Voltage (V)
Reg 2 Output Voltage (V)
1.0
Quiescent Current (mA0
Quiescent Current (mA)
9.0
−40
Ambient Temperature (°C) Ambient Temperature (°C)
Figure 10. Regulator 1 Quiescent Current Figure 11. Regulator 2 Quiescent Current
Quiescent Current (mA)
Quiescent Current (mA)
−40 −40
4.0
6.0
−40
10
9
8
7
6
5
4
3
2
1
0123
9
8
7
6
5
4
3
2
1
0100 200 300 400 500
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0 −20 0 2040 6080
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
−20 0 20 40 60 80
5.5
5.0
4.5
4.0
3.5
3.0 −200 20406080
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0 −20 0 20 40 60 80
VIN = 14 V
TA = 25°C
VIN = 14 V
TA = 25°C
Enable 1 = 5.0 V
Enable 2 = 5.0 V
VIN = 14 V
IOUT1 = 1.0 A
IOUT2 = 250 mA
Enable 1 = 0 V
Enable 2 = 0 V
VIN = 14 V
Enable 1 = 5.0 V
Enable 2 = 0 V
VIN = 14 V
Enable 1 = 0 V
Enable 2 = 5.0 V
VIN = 14 V
IOUT = 5.0 mA IOUT = 1.0 A
IOUT = 250 mA
IOUT = 5.0 mA
CS8371
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TYPICAL PERFORMANCE CHARACTERISTICS
0
Output Current (mA) Output Current (mA)
Figure 12. Regulator 1 Load Regulation Figure 13. Regulator 2 Load Regulation
Time (ms)
Figure 14. Regulator 1 Startup Figure 15. Regulator 2 Startup
5.02
0
Output Voltage (V)
Output Voltage (V)
Enable 1 (V)
8
Time (ns)
Figure 16. Regulator 1 Line Transient
Response
Figure 17. Regulator 2 Line Transient
Response
0
2
0
8.020
7
6
5
4
3
2
1
0
0
1
2
3
4
5
121234567891011
Reg 1 Output Voltage
(V)
1
0
−1
−2
10
12
14
16
Input Voltage (V) Output Voltage Deviation (V)
100 200 300 400 500 600
Time (ms)
Enable 2 (V)
8
0
7
6
5
4
3
2
1
0
0
1
2
3
4
5
121234567891011
Reg 2 Output Voltage
(V)
Time (ns)
0
0.6
0.2
0
−0.2
−0.4
10
12
14
16
Input Voltage (V) Output Voltage Deviation (V)
100 200 300 400 500 600
0.4
−0.6
8.015
8.010
8.005
8.000
7.995
7.990
7.985
7.980 100 200 300 400 500 600 700 800 900 1000 50 100 150 200 250
5.01
5.00
4.99
4.98
4.97
4.96
4.95
4.94
VIN = 14 V
COUT = 0 mF
TA = 25°C
IOUT = 5.0 mA
COUT = 0 mF
TA = 25°C
IOUT = 5.0 mA
COUT = 0 mF
TA = 25°C
COUT = 0 mF
TA = 25°C
85°C
85°C
25°C
VIN = 14 V
25°C
−40°C
−40°C
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7
TYPICAL PERFORMANCE CHARACTERISTICS
Time (ms)
Figure 18. Regulator 1 Load Transient
Response
Figure 19. Regulator 2 Load Transient
Response
Frequency (Hz) Frequency (Hz)
Figure 20. Regulator 1 Ripple Rejection Figure 21. Regulator 2 Ripple Rejection
100
Ripple Rejection (dB)
Ripple Rejection (dB)
100
10
Output Capacitor Size (mF)
Figure 22. Regulator 1 Stability
Output Capacitor ESR (W)
.01
5
10
0
5
Load Current (mA) Output Voltage Deviation (V)
51015202530
1000
3
2
1
0
−1
−2
−3
Time (ms)
0
5
Load Current (mA) Output Voltage Deviation (mV)
51015202530
250
+500
0
−500
80
60
40
20 100 1k 10k 100k 1M1
80
60
40
20 100 1k 10k 100k 1M1
1
00.1 1 10 100 1000
VIN = 14 V
COUT = 0 mF
TA = 25°C
VIN = 14 V
COUT = 0 mF
TA = 25°C
TA = 25°C
VIN = 14 V
COUT = 0 mF
TA = 25°C
VIN = 14 V
COUT = 0 mF
TA = 25°C
VIN = 14 V
RESR ≤ 1.6 W
IOUT = 5.0 mA to 1.0 A
Unstable
Region
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8
DEFINITION OF TERMS
Dropout Voltage − The input−output voltage differential
at which the circuit ceases to regulate against further
reduction in input voltage. Measured when the output
voltage has dropped 100 mV from the nominal value
obtained at 14 V input, dropout voltage is dependent upon
load current and junction temperature.
Current Limit − Peak current that can be delivered to the
output.
Input Voltage − The DC voltage applied to the input
terminals with respect to ground.
Input Output Differential − The voltage difference
between the unregulated input voltage and the regulated
output voltage for which the regulator will operate.
Line Regulation − The change in output voltage for a
change in the input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that the average chip temperature is not significantly
affected.
Load Regulation − The change in output voltage for a
change in load current at constant chip temperature.
Long Term Stability − Output voltage stability under
accelerated life−test conditions after 1000 hours with
maximum rated voltage and junction temperature.
Output Noise Voltage − The rms AC voltage at the
output, with constant load and no input ripple, measured
over a specified frequency range.
Quiescent Current − The part of the positive input
current that does not contribute to the positive load current.
The regulator ground lead current.
Ripple Rejection − The ratio of the peak−to−peak input
ripple voltage to the peak−to−peak output ripple voltage.
Temperature Stability of VOUT − The percentage
change in output voltage for a thermal variation from room
temperature to either temperature extreme.
Figure 23. Applications Circuit
VIN
GND
ENABLE1
VOUT1
VOUT2
CS8371
Tuner IC
Control
C1*
0.1 mF
5.0 V
8.0 V
* C1is required if the regulator is far from the power source filter.
ENABLE2
APPLICATION NOTES
With seperate control of each output channel, the CS8371
is ideal for applications where each load must be switched
independently. In an automotive radio, the 8.0 V output
drives the displays and tape drive motors while the 5.0 V
output supplies the Tuner IC and memory.
Stability Considerations/NOCAP
Normally a low dropout or quasi−low dropout regulator
(or any type requiring a slow lateral PNP in the control loop)
necessitates a large external compensation capacitor at the
output of the IC. The external capacitor is also used to curtail
overshoot, determine startup delay time and load transient
response.
Traditional LDO regulators typically have low unity gain
bandwidth, display overshoot and poor ripple rejection.
Compensation is also an issue because the high frequency
load capacitor value, ESR (Equivalent Series Resistance)
and board layout parasitics all can create oscillations if not
properly accounted for.
NOCAP is an ON Semiconductor exclusive output stage
which internally compensates the LDO regulator over
temperature, load and line variations without the need for
an expensive external capacitor. It incorporates high gain
(>80 dB) and large unity gain bandwidth (>100 kHz) while
maintaining many of the characteristics of a single−pole
amplifier (large phase margin and no overshoot).
NOCAP is ideally suited for slow switching or steady
loads. If the load displays large transient current
requirements, such as with high frequency microprocessors,
an output storage capacitor may be needed. Some large
capacitor and small capacitor ESR values at the output may
CS8371
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9
cause small signal oscillations at the output. This will
depend on the load conditions. With these types of loads, a
traditional output stage may be better suited for proper
operation.
Output 1 employs NOCAP. Refer to the plots in the Typical
Performance Characteristics section for appropriate output
capacitor selections for stability if an external capacitor is
required by the switching characteristics of the load. Output
2 has a Darlington NPN−type output structure and is
inherently stable with any type of capacitive load or no
capacitor at all.
Calculating Power Dissipation in a
Dual Output Linear Regulator
The maximum power dissipation for a dual output
regulator (Figure 24) is
PD(max) +NJVIN(max) *VOUT1(min)NjIOUT1(max) )
NJVIN(max) *VOUT2(min)NjIOUT2(max) )VIN(max)IQ (1)
where:
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1,
VOUT2(min) is the minimum output voltage from VOUT2,
IOUT1(max) is the maximum output current, for the
application,
IOUT2(max) is the maximum output current, for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
RqJA +150°C*TA
PD(2)
The value of RqJA can be compared with those in the
package section of the data sheet. Those packages with
RqJA
’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 24. Dual Output Regulator With Key
Performance Parameters Labeled.
SMART
REGULATOR®
Control
Features
VOUT1
IOUT1
VOUT2
IOUT2
VIN
IIN
IQ
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
RqJA +RqJC )RqCS )RqSA (3)
where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heatsink thermal resistance, and
RqSA = the heatsink−to−ambient thermal resistance.
RqJC appears in the package section of the data sheet. Like
RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
PACKAGE THERMAL DATA
Parameter
TO−220
SEVEN LEAD Unit
RqJC Typical 2.4 °C/W
RqJA Typical 50 °C/W
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PACKAGE DIMENSIONS
DIM
A
MIN MAX MIN MAX
MILLIMETERS
0.600 0.610 15.24 15.49
INCHES
B0.386 0.403 9.80 10.23
C0.170 0.180 4.32 4.56
D0.028 0.037 0.71 0.94
G0.045 0.055 1.15 1.39
H
J0.018 0.026 0.46 0.66
K1.028 1.042 26.11 26.47
L0.355 0.365 9.02 9.27
M5 NOM
Q0.142 0.148 3.61 3.75
U0.490 0.501 12.45 12.72
V0.045 0.055 1.15 1.39
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.003 (0.076) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
4. 821E−01 THRU 821−03 OBSOLETE, NEW
STANDARD 821E−04.
_5 NOM
_
0.088 0.102 2.24 2.59
A
K
U
L
Q
D
G
B
C
M
M
VMJ
H
SEATING
PLANE
OPTIONAL
CHAMFER
175 _
7 LEAD, TO−220
T SUFFIX
CASE 821E−04
ISSUE D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION D DOES NOT INCLUDE
INTERCONNECT BAR (DAMBAR) PROTRUSION.
DIMENSION D INCLUDING PROTRUSION SHALL
NOT EXCEED 10.92 (0.043) MAXIMUM.
A
U
D
G
B
T
M
0.356 (0.014) M
Q
7 PL
−Q−
K
F
J
C
E
−T−
N
L
M
WDIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.560 0.590 14.22 14.99
B0.385 0.415 9.77 10.54
C0.160 0.190 4.06 4.82
D0.023 0.037 0.58 0.94
E0.045 0.055 1.14 1.40
F0.540 0.555 13.72 14.10
G0.050 BSC 1.27 BSC
J0.014 0.022 0.36 0.56
K0.785 0.800 19.94 20.32
L0.322 0.337 8.18 8.56
M0.073 0.088 1.85 2.24
N0.090 0.115 2.28 2.91
Q0.146 0.156 3.70 3.95
S0.164 0.179 4.17 4.55
U0.460 0.475 11.68 12.07
W33°°
R
S
H
H14.48 15.110.570 0.595
R0.289 0.304 7.34 7.72
7 LEAD, TO−220
TVA SUFFIX
CASE 821J−02
ISSUE A
CS8371
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11
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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CS8371/D
NOCAP is a trademark of Semiconductor Components Industries, LLC (SCILLC).
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