IRF840L, SiHF840L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) * Halogen-free According to IEC 61249-2-21 Definition * Dynamic dV/dt Rating * Repetitive Avalanche Rated * Fast Switching * Ease of Paralleling * Simple Drive Requirements * Compliant to RoHS Directive 2002/95/EC 500 RDS(on) () VGS = 10 V 0.85 Qg (Max.) (nC) 63 Qgs (nC) 9.3 Qgd (nC) 32 Configuration Single D I2PAK (TO-262) DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The I2PAK (TO-262) is a power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and lowest possible on-resistance. The I2PAK (TO-262) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W. G S S D G N-Channel MOSFET ORDERING INFORMATION Package I2PAK (TO-262) Lead (Pb)-free and Halogen-free SiHF840L-GE3 IRF840LPbF Lead (Pb)-free SiHF840L-E3 ABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 V Gate-Source Voltage VGS 20 V Continuous Drain Current Pulsed Drain VGS at 10 V TC = 25 C TC = 100 C Currenta ID IDM Linear Derating Factor UNIT 8.0 5.1 A 32 1.0 W/C EAS 510 mJ Currenta IAR 8.0 A Repetitive Avalanche Energya EAR 13 mJ Single Pulse Avalanche Energyb Repetitive Avalanche Maximum Power Dissipation TC = 25 C TC = 100 C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s PD 125 50 dV/dt 3.5 TJ, Tstg - 55 to + 150 300d W V/ns C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 C, L = 14 mH, Rg = 25 , IAS = 8.0 A (see fig. 12). c. ISD 8.0 A, dI/dt 100 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 www.vishay.com 1 IRF840L, SiHF840L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT C/W SPECIFICATIONS (TJ = 25 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 A 500 - - V VDS/TJ Reference to 25 C, ID = 1 mA - 0.78 - V/C VGS(th) VDS = VGS, ID = 250 A 2.0 - 4.0 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VGS = 20 V - - 100 VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 C - - 250 - - 0.85 4.9 - - S IGSS IDSS RDS(on) gfs ID = 4.8 Ab VGS = 10 V VDS = 50 V, ID = 4.8 Ab A Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 8 A, VDS = 400 V see fig. 6 and 13b - 1300 - - 310 - - 120 - - - 63 - - 9.3 pF nC Gate-Drain Charge Qgd - - 32 Turn-On Delay Time td(on) - 14 - - 23 - - 49 - - 20 - - 4.5 - - 7.5 - - - 8.0 - - 32 - - 2.0 V - 460 970 ns - 4.2 8.9 C Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 250 V, ID = 8.0 A Rg = 9.1 , RD = 31, see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 C, IS = 8 A, VGS = 0 Vb TJ = 25 C, IF = 8.0 A, dI/dt = 100 A/sb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %. www.vishay.com 2 Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 IRF840L, SiHF840L Vishay Siliconix TYPICAL CHARACTERISTICS (25 C, unless otherwise noted) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V 101 4.5 V 100 ID, Drain Current (A) ID, Drain Current (A) Top 25 C 100 20 s Pulse Width VDS = 50 V 20 s Pulse Width TC = 25 C 100 4 101 VDS, Drain-to-Source Voltage (V) 91069_01 ID, Drain Current (A) 4.5 V 100 20 s Pulse Width TC = 150 C 100 91069_02 101 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics, TC = 150 C Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 6 7 8 9 10 Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 5 VGS, Gate-to-Source Voltage (V) 91069_03 Fig. 1 - Typical Output Characteristics, TC = 25 C 101 150 C 101 91069_04 3.0 2.5 ID = 8.0 A VGS = 10 V 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRF840L, SiHF840L Vishay Siliconix 2500 Capacitance (pF) 2000 ISD, Reverse Drain Current (A) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss 1500 1000 Coss 500 Crss ID, Drain Current (A) VDS = 400 V VDS = 100 V 8 4 For test circuit see figure 13 0 91069_06 15 30 45 60 Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage www.vishay.com 4 Operation in this area limited by RDS(on) 10 s 2 10 100 s 5 1 ms 2 1 10 ms 5 TC = 25 C TJ = 150 C Single Pulse 2 0.1 0.1 75 QG, Total Gate Charge (nC) 1.4 1.2 1.0 Fig. 7 - Typical Source-Drain Diode Forward Voltage 5 VDS = 250 V 0.8 VSD, Source-to-Drain Voltage (V) 102 16 12 0.6 91069_07 ID = 8.0 A 0 VGS = 0 V 0.4 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage VGS, Gate-to-Source Voltage (V) 25 C 101 VDS, Drain-to-Source Voltage (V) 20 150 C 100 0 100 91069_05 101 91069_08 2 5 1 2 5 10 2 5 102 2 5 103 2 5 104 VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 IRF840L, SiHF840L Vishay Siliconix RD VDS VGS 8.0 ID, Drain Current (A) D.U.T. Rg + - VDD 10 V 6.0 Pulse width 1 s Duty factor 0.1 % Fig. 10a - Switching Time Test Circuit 4.0 2.0 VDS 90 % 0.0 25 50 75 100 125 150 TC, Case Temperature (C) 91069_09 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response (ZthJC) 10 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 PDM Single Pulse (Thermal Response) t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-2 10-3 10-5 10-4 10-3 10-2 0.1 1 102 10 t1, Rectangular Pulse Duration (S) 91069_11 Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD Rg D.U.T. + - IAS V DD VDS 10 V tp 0.01 W Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRF840L, SiHF840L Vishay Siliconix EAS, Single Pulse Energy (mJ) 1200 ID 3.6 A 5.1 A Bottom 8.0 A Top 1000 800 600 400 200 VDD = 50 V 0 25 91069_12c 50 75 100 125 150 Starting TJ, Junction Temperature (C) Fig. 13 - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 k QG 10 V 12 V 0.2 F 0.3 F QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 IRF840L, SiHF840L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer + - - Rg * * * * + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91069. Document Number: 91069 S10-2554-Rev. B, 08-Nov-10 www.vishay.com 7 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 A 4 4 L1 B A E c2 H Gauge plane 4 0 to 8 5 D B Detail A Seating plane H 1 2 C 3 C L L3 L4 Detail "A" Rotated 90 CW scale 8:1 L2 B A1 B A 2 x b2 c 2xb E 0.010 M A M B 0.004 M B 2xe Plating 5 b1, b3 Base metal c1 (c) D1 4 5 (b, b2) Lead tip MILLIMETERS DIM. MIN. MAX. View A - A INCHES MIN. 4 E1 Section B - B and C - C Scale: none MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 6.22 - 0.245 - b 0.51 0.99 0.020 0.039 E1 b1 0.51 0.89 0.020 0.035 e b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 2.54 BSC 0.100 BSC c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 D 8.38 9.65 0.330 0.380 L4 0.25 BSC 4.78 5.28 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Material Category Policy Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant. Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Revision: 12-Mar-12 1 Document Number: 91000