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Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FAN7340 LED Backlight Driving Boost Switch Features Description The FAN7340 is a single-channel boost controller that integrates an N-channel power MOSFET for PWM dimming using Fairchild's proprietary planar Doublediffused MOS (D MOS) technology. Single-Channel Boost LED Switch Internal Power MOSFET for PWM Dimming: R DS(on) = 3.4 at VGS=10 V, BVDSS=400 V Current Mode PWM Control Internal Programmable Slope Compensation Wide Supply Voltage Range: 10 V to 35 V LED Current Regulation: 1% Programmable Switching Frequency Analog and PWM Dimming Wide Dimming Ratio: On Time=10 s to DC Cycle-by-Cycle Current Limiting Thermal Shutdown: 150C Open-LED Protection (OLP) Over-Voltage Protection (OVP) Over-Current Protection (OCP) Error Flag Generation (for External Load Switch) Internal Soft-Start 16-Lead SOIC Package The IC operates as a constant-current source for driving high-current LEDs. It uses Current Mode control with programmable slope compensation to prevent subharmonic oscillation. The IC provides protections including: open-LED protection, over-voltage protection, and direct-short protection for high system reliability. The IC internally generates a FAULT signal with delay if an abnormal LED string condition occurs. PWM dimming and analog dimming functions can be implemented independently. Internal soft-start prevents inrush current flowing into output capacitor at startup. Applications LED Backlight for LCD TV LED Backlight for LCD Monitor LED Lighting Ordering Information Part Number Operating Temperature Range FAN7340MX -40C to +125C (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 Package 16-Lead, Small-Outline Integrated Circuit (SOIC) Packaging Method Tape & Reel www.f airchildsemi.com FAN7340 -- LED Backlight Driving Boost Switch July 2013 20s Delay - OVP OVP + 3V 100mV FAULT OLP TSD 1s Delay + ADIM*4 1.4~4V - S OCP R POR Current Sense Q 640s at 200kHz Auto-Restart PWM - 1/4 gm ADIM - R + + 0.3~3V Dim off DRV Q S Gate Driver PWM CMP 0.5V Slope Compensation 5k 100mV CS Burst Operation + CLK+LEB 4V + Switch Off 16 Steps Internal Soft-Start 3ms at 200kHz - 0.5V Oscillator GND RT 45A Drain VCC - UVLO 9V PWM + OLPi Hys. 1.0V 1.22V ENA Dim off - BDIM + OLP Hys. 70mV Current Sense 5s Delay 0.2V - 5V, max. 3mA 40.96ms at 200kHz Debounce Time + REF Voltage Reference & Internal Bias OLPi PWM SEN End of Soft-Start BDIM Figure 1. Internal Block Diagram (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 2 FAN7340 -- LED Backlight Driving Boost Switch Block Diagram FAN7340 -- LED Backlight Driving Boost Switch Pin Assignments 1 DRV 2 GND 3 CS 4 REF 5 FAULT 6 RT 7 SENSE 8 F PXYTT FAN7340 VCC 16 BDIM 15 ADIM 14 CMP 13 OVP 12 ENA 10 DRAIN 9 DRAIN Figure 2. Package Diagram Pin Definitions Pin # Name Description 1 VCC This pin is the supply voltage of the IC. 2 DRV This pin is the gate drive signal of the boost switch. 3 GND This pin is the ground of the IC. 4 CS This pin is for sensing the current flowing through an external MOSFET. It includes a built-in 300 ns blanking time. The peak of the current flowing through the MOSFET is limited to this pin voltage. Slope compensation of the boost controller can be programmed through the series resistor of this pin. 5 REF This pin is the 5 V reference voltage pin. Maximum current capability is 3 mA. 6 FAULT 7 RT 8 SENSE This pin is for sensing the current flowing through the LEDs. A sensing resistor is connected from this pin to ground. This pin is connected to the negative input of the internal error amplifier. 9, 10 DRAIN Drain pin of PWM dimming power MOSFET. 12 ENA Enable input pin. If voltage of this pin is higher than 1.22 V, IC is starting to operate. If the voltage of this pin is lower than 1.15 V, the IC stops operating. 13 OVP Over-voltage protection input pin. Output voltage of the boost circuit is connected to this pin through a resistor divider circuit. If this pin voltage is higher than 3 V, OVP is triggered. 14 CMP This pin is the error amplifier output. Typically, a compensation capacitor and resistor are connected to this pin from the ground. 15 ADIM This pin is for setting the current flowing through the LEDs. This pin is connected to the positive inputs of the internal error amplifier. Linear voltage range of ADIM is 0.3 V~3.0 V. 16 BDIM This pin is for the burst dimming signal. If this pin voltage is HIGH, the internal dimming MOSFET is turned on. If this pin voltage is LOW, the dimming MOSFET is turned off. This pin is for indicating the fault signal. This pin is connected to the open drain. When OLP protection is occurred, the FAULT pin is pulled HIGH. Oscillator frequency set of the boost switch (50 kHz ~ 300 kHz). Note : 1. Pin 11 is a "No Connect" pin (not shown in Figure 2). (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified. Symbol Min. Max. Unit Supply Voltage 10 35 V TA Operating Temperature Range -40 +125 C TJ Junction Temperature +150 C VCC Parameter +150 C Thermal Resistance Junction-to-Ambient(2, 3) 120 C/W Power Dissipation 0.9 W TSTG Storage Temperature Range JA PD -65 Notes: 2. Thermal resistance test board; size 76.2 mm x 114.3 mm x 1.6 mm (1S0P); JEDEC standard: JESD51-2, JESD513. 3. Assume no ambient airflow. Pin Breakdown Voltage Pin # Name Value Unit Pin # Name Value Unit 1 VCC 35 V 9 DRAIN 400 V 2 DRV 20 V 10 DRAIN 400 V 3 GND V 11 N/A 4 CS 6 V 12 ENA 6 V V 5 REF 6 V 13 OVP 6 V 6 FAULT 35 V 14 CMP 6 V 7 RT 6 V 15 ADIM 6 V 8 SENSE 6 V 16 BDIM 6 V (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 4 FAN7340 -- LED Backlight Driving Boost Switch Absolute Maximum Ratings For typical values, TA = 25C and VCC = 15 V unless otherwise specified. Specifications to -40C ~ 125C are guaranteed by design based on final characterization results . Symbol Parameter Condition Min. Typ. Max. Unit 35 V 2 4 mA 9.0 9.7 V Supply Voltage Section VCC Input DC Supply Voltage Range (4) ISD Shutdown Mode Supply Current 10 BDIM Connected to GND Under-Voltage Lockout Section Vth Vth,hys Ist Start Threshold Voltage 8.3 Start Threshold Voltage Hysteresis Standby Current 0.5 VCC=Vth-0.2 1.0 1.5 V 200 300 A 5 V 0.8 V 500 mho ON/OFF Section Von On-State Input Voltage Voff Off-State Input Voltage 2 Error Amplifier Section Gm Error Amplifier Transconductance(4) AV_ro Error Amplifier Output impedance AV Error Amplifier Open-Loop Gain(4) Voffset VADIM =1 V 100 (4) Input Offset Voltage VADIM =1 V -10 Isin CMP Sink Current VADIM =1 V, VSEN SE=2 V 100 Isur CMP Source Current VADIM =1 V, VSEN SE=0 V 100 VIDR VO Input Differential Voltage Range Output Voltage Range 300 20 M 60 dB 10 mV 200 300 A 200 300 A 0 3 V 0.7 4.0 V Oscillator Section Min. fosc Boost Oscillator Frequency RT=100 k 50 190 Ma x. Dmax Ma ximum Duty Cycle (4) 200 kHz 210 300 kHz kHz 86 90 94 % 4.9 5.0 5.1 V 25 mV 25 mV Reference Section VREF 5V Regulation Voltage VREF,Line 5V Line Regulation VREF,Load 5V Load Regulation 0<I5<3 mA PWM Dimming Section VPDIM,L PWM Dimming Input Low Voltage VPDIM,H PWM Dimming Input High Voltage RPDIM PWM Dimming Pull-Down Resistance 0.8 2 100 160 V 5 V 220 k FET Section (for Dimming) BVDSS IDSS RDS(ON) Drain-Source Breakdown Voltage (4) (4) VCC=0 V, ID=250 A 400 V Zero-Gate-Voltage Drain Current VDS=250 V, TA=25C Drain-Source On-State Resistance VGS=10 V, ID=1 A 3.4 (4) 1 30 A CISS Input Capacitance VDS=25 V, VGS=0 V, f=1 MHz 173 225 pF COSS Output Capacitance (4) VDS=25 V,VGS=0V, f=1 MH z 30 40 pF Continued on the following page... (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 5 FAN7340 -- LED Backlight Driving Boost Switch Electrical Characteristics For typical values, TA = 25C and VCC = 15 V, unless otherwise specified. Specifications to -25C ~ 85C are guaranteed by design based on final characterization results . Symbol Parameter Condition Min. Typ. Max. Unit 10.8 11.8 12.8 V Output Section (Boost / Dimming) VDRV Gate Output Voltage VCC=15 V Vuv Gate Output Voltage Before Startup -0.5 0.5 V Idsur Gate Output Drive Source Current(4) 80 180 280 mA Idsin Gate Output Drive Sink Current(4) 80 180 280 mA (4) trh Gate Output Rising Time (Boost) tfl Gate Output Falling Time (Boost) (4) C L=2.0 nF 200 ns C L=2.0 nF 120 ns Current Sense Section tblank Leading-Edge Blanking (4) 150 tdelay,cl Delay to Output of Current-Limit (4) Comparator Voffset,clc Offset Voltage of Current-Limit (4) Comparator 300 -20 450 ns 180 ns 20 mV 54 A Slope Compensation Section Islope Rslope Ramp Generator Current Slope Compensation Resistor 36 (4) 45 5 k 3 ms Soft-Start Section tss Soft-Start Period (4) fosc=200 kHz Protection Section td,ovp.tr Delay for Triggering Over-Voltage Protection (4) 15 20 25 s td,ovpr Delay for Releasing Over-Voltage Protection (4) 10 14 18 s td.oc p Delay for Over-Current Protection(4) tAR Auto-Restart Time for Over-Current Protection (4) fosc=200 kHz td,ol pi Delay for Triggering Open-LED Protection (4) td,ol p Delay for Open-LED Protection fosc=200 kHz Vth,ovp Over-Voltage Protection Threshold Voltage Vhys ,ovp Over-Voltage Protection Voltage Hysteresis Vth.csoc p Boost Switch Current Limit Threshold Voltage Vth,oc p LED Over-Current Protection Threshold Voltage Vth,ol p Open-LED Protection Threshold Voltage TSD THYS 3 s 640 s 5 7 40.96 2.85 3.00 0.45 0.50 1.4 (Min. 4.0xVADIM Clamp) (4) Thermal Shutdown Temperature (4) s ms 3.15 0.1 (4) Thermal Shutdown Hysteresis 1 V V 0.55 V 4.0 (Ma x. Clamp) V 0.15 0.20 0.25 V 140 150 160 C 20 C Notes: 4. These parameters, although guaranteed, are not tested in production. (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 6 FAN7340 -- LED Backlight Driving Boost Switch Electrical Characteristics (Continued) 9.9 1.7 9.7 1.5 9.5 1.3 Vth.hys , [V] Vth, [V] 9.3 9.1 8.9 8.7 1.1 0.9 0.7 8.5 0.5 8.3 0.3 8.1 -50 -25 0 25 50 75 Temperature, [] 100 -50 125 -25 0 25 50 75 100 125 Temperature, [] Figure 3. Start Threshold Voltage vs. Temperature Figure 4. Start Threshold Voltage Hysteresis vs. Temperature 350 4.5 4 300 3.5 ISD, [mA] Ist, [uA] 250 200 150 3 2.5 2 1.5 100 1 50 0.5 -50 -25 0 25 50 75 100 125 -50 -25 0 Temperature, [] Figure 5. Standby Current vs. Temperature 50 75 100 125 Figure 6. Shutdown Mode Supply Current vs. Temperature 1.4 1.3 1.35 1.25 1.3 1.2 1.25 Voff, [V] Von, [V] 25 Temperature, [] 1.2 1.15 1.1 1.15 1.05 1.1 1 1.05 -50 -25 0 25 50 75 100 -50 125 Figure 7. On-State Input Voltage vs. Temperature (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 -25 0 25 50 75 100 125 Temperature, [] Temperature, [] Figure 8. Off-State Input Voltage vs. Temperature www.f airchildsemi.com 7 FAN7340 -- LED Backlight Driving Boost Switch Typical Performance Characteristics 14 500 10 6 400 Voffset, [mV] G m, [umho] 600 300 200 2 -2 -6 100 -10 0 -14 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 Temperature, [] Temperature, [] 350 350 300 300 250 250 200 150 100 100 50 50 -25 0 25 50 75 Temperature, [] 100 -50 125 -25 0 25 50 75 100 125 Temperature, [] Figure 11. CMP Sink Current vs. Temperature Figure 12. CMP Source Current vs. Temperature 215 96 210 94 205 92 Dmax, [%] fOSC, [KHz] 200 150 -50 125 Figure 10. Input Offset Voltage vs. Temperature Isur, [uA] Isin, [uA] Figure 9. Error Amplifier Transconductance vs. Temperature 100 200 195 190 90 88 86 185 84 -50 -25 0 25 50 75 100 125 -50 Temperature, [] Figure 13. Boost Oscillator Frequenc y vs. Temperature (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 -25 0 25 50 75 Temperature, [] 100 125 Figure 14. Maximum Duty Cycle vs. Temperature www.f airchildsemi.com 8 FAN7340 -- LED Backlight Driving Boost Switch Typical Performance Characteristics (Continued) 1.8 5.1 1.7 5.05 1.6 VPDIM,H, [V] VREF , [V] 5.15 5 4.95 1.5 1.4 1.3 4.9 1.2 4.85 -50 -25 0 25 50 75 100 -50 125 -25 0 25 Figure 15. 50 75 100 125 Temperature, [] Temperature, [] 5V Regulation Voltage vs. Temperature Figure 16. PWM Dimming Input High Voltage vs. Temperature 1.7 240 220 1.6 RPDIM, [Kohm] VPDIM,L , [V] 200 1.5 1.4 1.3 180 160 140 120 1.2 100 80 1.1 -50 -25 0 25 50 75 100 -50 125 -25 0 Figure 17. PWM Dimming Input Low Voltage vs. Temperature 50 75 100 125 Figure 18. PWM Dimming Pull-Down Resistance vs. Temperature 300 13.5 13 250 Idsin, [mA] 12.5 VDRV, [V] 25 Temperature, [] Temperature, [] 12 11.5 200 150 100 11 10.5 50 -50 -25 0 25 50 75 100 125 -50 Temperature, [] 0 25 50 75 100 125 Temperature, [] Figure 19. Gate Output Voltage vs. Temperature (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 -25 Figure 20. Gate Output Drive Sink Current vs. Temperature www.f airchildsemi.com 9 FAN7340 -- LED Backlight Driving Boost Switch Typical Performance Characteristics (Continued) 0.85 55 0.8 0.75 47 tAR ,[mS] Islope, [uA] 51 43 0.7 0.65 0.6 0.55 39 0.5 0.45 35 -50 -25 0 25 50 75 100 -50 125 -25 0 25 50 75 100 125 Temperature, [] Temperature, [] Figure 21. Ramp Generator Current vs. Temperature Figure 22. Auto-Restart Time for OCP vs. Temperature 3.2 0.2 3.15 0.16 3.05 Vhys,ovp,[V] Vth,ovp,[V] 3.1 3 2.95 0.12 0.08 2.9 0.04 2.85 2.8 0 -50 -25 0 25 50 75 100 125 -50 -25 0 Temperature, [] Figure 23. OVP Threshold Voltage vs. Temperature 25 50 75 Temperature, [] 100 125 Figure 24. OVP Hysteresis Voltage vs. Temperature 55 td,olp,[mS] 50 45 40 35 30 25 -50 -25 0 25 50 75 100 125 Temperature, [] Figure 25. (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 Delay for Over-Current Protection vs. Temperature www.f airchildsemi.com 10 FAN7340 -- LED Backlight Driving Boost Switch Typical Performance Characteristics (Continued) The FAN7340 operates as a constant-current source for driving high-current LEDs. It uses Current-Mode control with programmable slope compensation to prevent subharmonic oscillation. V GATE The IC provides protections such as open-LED protection, over-voltage protection, and over-current protection for improved system reliability. The IC internally generates a FAULT OUT signal with a delay in case an abnormal LED string condition occurs. PWM dimming and analog dimming functions can be implemented independently. Internal soft-start prevents inrush current flowing into output capacitor at startup. Circuit operation is explained in the following sections. VLED VCMP Soft-Start Period ILED t Figure 26. Soft-Start Waveforms VCC Under-Voltage Lockout (UVLO) LED Current Setting An internal regulator provides the regulated 5 V used to power the IC. The Under-Voltage Lockout (UVLO) turns off the IC in the event of the voltage dropping below the specific threshold level. The UVLO circuit inhibits powering the IC until a voltage reference is established, up to predetermined threshold level. During the boost converter operating periods, the output LED current can be set by equation: where ADIM(V) is ADIM pin applied voltage and, RSENSE is the sensing Enable Applying voltage higher than 1.22 V (typical) to the ENA pin enables the IC. Applying voltage lower than 1.15 V (typical) to the ENA pin disables the IC. If ENA pin voltage is higher than 1.22 V (typical) and VCC is higher than 9.0 V (typical.), the IC starts to supply 5 V re ference voltage from VCC. resistor value. An additional 60 m comes from an internal wire bonding resistor. To calculate LED current precisely, consider the wire bonding resistor. Analog Dimming and PWM Dimming Analog dimming is achieved by varying the voltage level at the ADIM pin. This can be implemented either with a potentiometer from the VREF pin or from an external voltage source and a resistor divider circuit. The ADIM voltage level is adjusted to be the same as the feedback level (VSENSE). A VADIM range from 0.3 V to 3 V is recommended. Oscillator (Boost Switching Frequency) Boost switching frequency is programmed by the value of the resistor connected from the RT pin to ground. RT pin voltage is set to 2 V. The current through the RT pin resistor determines boost switching frequency according to formula: PWM dimming (BDIM) helps achieve a fast PWM dimming response in spite of the shortcomings of the boost converter. The PWM dimming signal controls three nodes in the IC; gate signal to the switching FET, gate signal to the dimming FET, and output connection of the trans-conductance amplifier. When the PWM dimming signal is HIGH, the gates of the switching FET and dimming FET are enabled. At the same time, the output of the transconductance ap-amp is connected to the compensation network. This allows the boost converter to operate normally. (1) Soft-Start Function at Startup During initial startup, the switching device can be damaged due to the over-current coming from the input line by the negative control. This can result in the initial overshoot of the LED current. Therefore, during initial startup, the soft-start control gradually increases the duty cycle so that the output voltage can rise smoothly to control inrush current and overshoot. Dynamic Contrast Ratio FAN7340 adapts the soft-start function in the boost converter stage. During soft-start period, boost switch turn-on duty is limited by clamped CMP voltage. The soft-start period is dependent on boost switching frequency, which is decided by the RT resistor (Equation (1)). Soft-start period is set to be cumulative time when the BDIM (PWM dimming) signal is HIGH: The Dynamic Contrast Ratio (DCR) means the maximum contrast ratio achievable by adjusting the amount of light (dimming) of the screen instantaneously using the backlight during the extremely short period of time. FAN7340 can normally drive the LED backlight under 0.1% dimming duty cycle at 200 Hz dimming frequency. Even operating at 5 s-dimming FET turn-on time and extremely low dimming duty, FAN7340 can operate LEDs with normal peak current level. (2) (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 (3) www.f airchildsemi.com 11 FAN7340 -- LED Backlight Driving Boost Switch Functional Description Iinductor Ipeak=45A A dimming MOSFET (400 V N-channel MOSFET; such as FDD3N40) is incorporated in the FAN7340. The power transistor is produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology is tailored to minimize on-state resistance (RDS(on) =3.4 ), to provide superior switching performance. This device is suited for high-efficiency SMPS and shows desirable thermal characteristic during operation. To prevent initial LED current overshoot at low VADIM levels, gate resistance of the internal dimming FET is designed as 5 kexperimentally. m1 m m2 Iramp Ts VSC 5k R1 VCS VS RS VCMP Figure 27. Slope Compensation Block Diagram Feedback Loop Compensation Cycle-by-Cycle Over-Current Protection Stable closed-loop control can be accomplished by connecting a compensation network between COMP and GND. The compensation needed to stabilize the converter can be either a Type-I circuit (a simple integrator) or a Type-II circuit (and integrator with and additional pole-zero pair). The type of the compensation circuit required is dependent on the phase of the power stage at the crossover frequency. In boost topology, the switch can be damaged in abnormal conditions (inductor short, diode short, output short). It is always necessary to sense the switch current to protect against over-current failures. Switch failures due to excessive current can be prevented by limiting Id. Id DRV FAN7340 adopts a Type-II compensator circuit. Programmed Current Control 5k FAN7340 uses a Current-Mode control method. CurrentMode control loops: an outer feedback loop that senses output voltage (current) and delivers a DC control voltage to an inner feedback loop, which senses the peak current of the inductor and keeps it constant on a pulse-by-pulse basis. One of the advantages of the Current-Mode control is line/load regulation, which is corrected instantaneously against line voltage changes without the delay of an error amplifier. vcs CS CLK+LEB R1 RS + Switch Off 0.5V - Figure 28. Cycle-by-Cycle OCP Circuit When the voltage drops at R 1 and R S e xceed a threshold of approximately 0.5 V, the power MOSFET over-current function is triggered a fter minimum turn-on time or LEB time (300 ns). Programmable Slope Compensation When the power converter operates in Continuous Conduction Mode (CCM), the current programmed controller is inherently unstable when duty is larger than 50%, regardless of the converter topology. The FAN7340 uses a Peak-Current-Mode control scheme with programmable slope compensation and includes an internal transconductance amplifier to accurately control the output current over all line and load conditions. The peak voltage level at CS terminal: An internal Rslope resistor (5 k) connected to sensing resistor RS and an external resistor R 1 can control the slope of VSC for the slope compensation. Although the normal operating mode of the power converter is DCM, the boost converter operates in CCM in the case of rapid LED current increas e. As a result, slope compensation circuit is an important feature. After the first PWM dimming-HIGH signal, the feedback sensing resistor (RSENSE) starts sensing the LED current. If the feedback voltage of the SENSE pin drops below 0.2 V, the OLP triggers to generate an error flag signal. Because OLP can be detected only in PWM dimming-HIGH; if OLP detecting time is over 5 s, PWM dimming signal is pulled HIGH internally regardless of external dimming signal. If OLP signal continues over blanking time, an error flag signal is triggered. (4) Choose the boost switch current-sensing resistor (RCS): (5) Open-LED Protection (OLP) The value of an external series resistor (R1) can be programmed by the user. In normal DCM operation, 5 k is recommended. OLP blanking time is dependent on boost switch frequency per Equation (6). FAULT OUT signal is made through the FO pin, which needs to be connected 5 V reference voltage through a pull-up resistor. In normal operation, FO pin voltage is pulled down to ground. In OLP condition, FO pin voltage is pulled HIGH. (6) (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 12 FAN7340 -- LED Backlight Driving Boost Switch Internal Dimming MOSFET LED Over-Current Protection (OCP) The primary purpose of the over-current protection function is to protect the internal dimming MOSFET from excessive current. The OCP is triggered when the feedback voltage meets the clamping level (1.4 V ~ 4 V) of the ADIM voltage x4. At 1 s delay after the OCP is triggered, the IC turns off both the boost FET and dimming FET and restarts the gate signal every tAR automatically. tAR can be calculated as : V 8192/f seconds FO (7) VSENSE 0.2V Dimming 1. When VADIM =0.3 V (VADIM x4=1.2 V). 2. OCP threshold level is set to 1.4 V. 3. OCP is triggered at feedback voltage level = 1.4 V. Time Dimming off OLPi Triggered VSENSE<0.2V over 5s Dimming off If OLPi is triggerd, Dimming is pulled to 100% full duty VSENSE OLP Released VSENSE>0.2V VSENSE=1.4V VADIM=0.3V Figure 29. Open-LED Protection GATE In LED open load condition, OVP is triggered ahead of OLP. Over-Voltage Protection (OVP) Figure 32. OCP Waveforms at VADIM =0.3 V Over-voltage protection is triggered when the voltage of the external output voltage trip point meets 3 V. After triggering OVP, the dimming switch and boost switch are turned off. The protection signal is recovered when the output voltage divider is below 2.9 V. 1. When VADIM =0.8 V (VADIM x4=3.2 V). 2. OCP threshold level is set to 3.2 V. 3. OCP is triggered at VSENSE = 3.2 V. VLED (Open) VSENSE=3.2V VSENSE ROVP1 VADIM=0.8V OVP 3V GATE ROVP2 Figure 33. OCP Waveforms at VADIM =0.8 V Figure 30. Over-Voltage Trip Point VOVP 1. When VADIM =1.2 V (VADIM x4=4.8 V). 2. OCP threshold level is set to 4.0 V. 3. OCP is triggered at VSENSE = 4.0 V. 3.0V 2.9V Boost Gate VSENSE VSENSE=4.0V Time Figure 31. VADIM=1.2V OVP Trigger and Release GATE Figure 34. (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 OCP Waveforms at VADIM =1.2 V www.f airchildsemi.com 13 FAN7340 -- LED Backlight Driving Boost Switch In system operation, OLP is triggered in only direct-short condition. Direct short means that some point of the LED string is shorted to set ground. In direct-short condition, the boost controller cannot control the LED current and a large current flows into the LED string directly from input power. To prevent this abnormal condition, the FO signal is used to turn off input power or the total system. FO signal is only triggered in OLP condition. Application Input Voltage Range LED Backlight TV 120 VDC 10% Rated Output Power Output current (Rated Voltage) LED 250 mA (230 V) 72-LEDs/1-String Features High Efficiency Constant Current Boost Converters High-Voltage, High-Current LED Driving Typical Application Circuit D1 CN1 Vin Vin Vin GND GND GND CN2 L1 200uH/PC44 1 2 3 4 5 6 C1 22uF/160V FFD04H60S C2 R1 10R CON6 47uF/400V R21 330k 0 Q1 FDPF7N50F D2 1SS355 R9 0R VCC D3 1N4148 R8 0.2R/1W R23 10k 1 2 3 On/Of f VCC GND FO BDIM ADIM On/Of f C5 open 0 1 2 3 4 5 6 4 VCC C3 FO 10uF/50V C4 1u 5 C8 10n CON6 R19 10k 6 FO TP1 R12 100K On/Of f 7 ADIM R13 3.9K TP R14 20K R15 220K R20 100k C10 1.2n VCC BDIM 16 R6 300k BDIM OVP 5.1k 8 FAN7340 C12 1.2n CON6 R5 300k IC1 ENA R7 R2 300k N.C N.C VLED VLED LED1 LED2 0 R4 100K R22 330k CN3 1 2 3 4 5 6 DRV GND CS REF FO ADIM CMP OVP ENA ADIM C13 1.2n R10 11k 14 13 OVP C6 6.8n 12 R11 15k C7 100n ENA RT DRAIN SENSE DRAIN R16 2.7R/1W 15 10 9 FAN7340 BDIM R17 3.9K R18 220K Vin : 120V Vout : 230V Output current : 250mA Switching frequency : 200kHz C11 1.2n 0 Figure 35. (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 Typical Application Circuit www.f airchildsemi.com SLC1012C -- LED Backlight Driving Boost Switch Typical Application Circuit (Boost Topology for LED Backlight) 10.00 9.80 A 8.89 16 9 B 4.00 3.80 6.00 PIN ONE INDICATOR 1.75 1 5.6 8 0.51 0.35 1.27 (0.30) 0.25 M 1.27 C B A 0.65 LAND PATTERN RECOMMENDATION 1.75 MAX 1.50 1.25 SEE DETAIL A 0.25 0.10 C 0.25 0.19 0.10 C 0.50 0.25 X 45 NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.36 8 0 A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AC, ISSUE C. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P600X175-16AM F) DRAWING FILE NAME: M16AREV12. SEATING PLANE 0.90 0.50 (1.04) DETAIL A SCALE: 2:1 Figure 36. 16-Lead, Small Outline Integrated Circuit (SOIC) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions , specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 15 FAN7340 -- LED Backlight Driving Boost Switch Physical Dimension FAN7340 -- LED Backlight Driving Boost Switch (c) 2013 Fairchild Semiconductor Corporation FAN7340 * 1.0.1 www.f airchildsemi.com 16 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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