OPA130
OPA2130
OPA4130
Low Power, Precision
FET-INPUT OPERATIONAL AMPLIFIERS
DESCRIPTION
The OPA130 series of FET-input op amps combine precision
dc performance with low quiescent current. Single, dual, and
quad versions have identical specifications for maximum
design flexibility. They are ideal for general-purpose, por-
table, and battery operated applications, especially with high
source impedance.
OPA130 op amps are easy to use and free from phase
inversion and overload problems often found in
common FET-input op amps. Input cascode circuitry pro-
vides excellent common-mode rejection and maintains low
input bias current over its wide input voltage range. OPA130
series op amps are stable in unity gain and provide excellent
dynamic behavior over a wide range of load conditions,
including high load capacitance. Dual and quad designs
feature completely independent circuitry for lowest crosstalk
and freedom from interaction, even when overdriven or
overloaded.
Single and dual versions are available in DIP-8 and SO-8
surface-mount packages. Quad is available in DIP-14 and
SO-14 surface-mount packages. All are specified for
–40°C to +85°C operation.
FEATURES
● LOW QUIESCENT CURRENT: 530µA/amp
● LOW OFFSET VOLTAGE: 1mV max
● HIGH OPEN-LOOP GAIN: 120dB min
● HIGH CMRR: 90dB min
● FET INPUT: IB = 20pA max
● EXCELLENT BANDWIDTH: 1MHz
●WIDE SUPPLY RANGE: ±2.25 to ±18V
● SINGLE, DUAL, AND QUAD VERSIONS
1
2
3
4
8
7
6
5
NC
V+
Output
Offset Trim
Offset Trim
–In
+In
V–
OPA130
DIP-8, SO-8
1
2
3
4
8
7
6
5
V+
Out B
–In B
+In B
Out A
–In A
+In A
V–
OPA2130
DIP-8, SO-8
A
B
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
–In D
+In D
V–
+In C
–In C
Out C
Out A
–In A
+In A
V+
+In B
–In B
Out B
OPA4130
DIP-14, SO-14
AD
BC
SBOS053A – MAY 1998 – REVISED MARCH 2006
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998-2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
OPA130
OPA2130
OPA130
OPA2130
OPA4130
OPA4130
OPA130, OPA2130, OPA4130
2SBOS053A
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V–.................................................................... 36V
Input Voltage .....................................................(V–) –0.7V to (V+) +0.7V
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature ..................................................–40°C to +125°C
Storage Temperature .....................................................–40°C to +125°C
Junction Temperature...................................................................... 150°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground, one amplifier per package.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
For the most current package and ordering information, see
the Package Option Addendum at the end of this document,
or see the TI web site at www.ti.com.
PACKAGE/ORDERING INFORMATION
OPA130, OPA2130, OPA4130 3
SBOS053A www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 10kΩ, unless otherwise noted.
OPA130PA, UA
OPA2130PA, UA
OPA4130PA, UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage ±0.2 ±1mV
vs Temperature(1) Operating Temperature Range ±2±10 µV/°C
vs Power Supply VS = ±2.25V to ±18V 2 20 µV/V
Channel Separation (dual and quad) 0.3 µV/V
INPUT BIAS CURRENT(2)
Input Bias Current VCM = 0V +5 ±20 pA
vs Temperature See Typical Characteristics
Input Offset Current VCM = 0V ±2±20 pA
NOISE
Input Voltage Noise
Noise Density, f = 10Hz 30 nV/√Hz
f = 100Hz 18 nV/√Hz
f = 1kHz 16 nV/√Hz
f = 10kHz 16 nV/√Hz
Current Noise Density, f = 1kHz 4fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range, Positive (V+)–2 (V+)–1.5 V
Negative (V–)+2 (V–)+1.2 V
Common-Mode Rejection VCM = –13V to +13V 90 105 dB
INPUT IMPEDANCE
Differential 1013 || 1 Ω || pF
Common-Mode VCM = –13V to +13V 1013 || 3 Ω || pF
OPEN-LOOP GAIN
Open-loop Voltage Gain VO = –13.8V to +13V 120 135 dB
RL = 2kΩ, VO = –13V to +12V 120 135 dB
FREQUENCY RESPONSE
Gain-Bandwidth Product 1 MHz
Slew Rate 2V/µs
Settling Time: 0.1% G = 1, 10V Step, CL = 100pF 5.5 µs
0.01% G = 1, 10V Step, CL = 100pF 7 µs
Overload Recovery Time G = 1, VIN = ±15V 2 µs
Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 3.5Vrms 0.0003 %
OUTPUT
Voltage Output, Positive (V+)–2 (V+)–1.5 V
Negative (V–)+1.2 (V–)+1 V
Positive RL = 2kΩ(V+)–3 (V+)–2.5 V
Negative RL = 2kΩ(V–)+2 (V–)+1.5 V
Short-Circuit Current ±18 mA
Capacitive Load Drive (Stable Operation) 10 nF
POWER SUPPLY
Specified Operating Voltage ±15 V
Operating Voltage Range ±2.25 ±18 V
Quiescent Current (per amplifier) IO = 0 ±530 ±650 µA
TEMPERATURE RANGE
Operating Range –40 +85 °C
Storage –40 +125 °C
Thermal Resistance,
θ
JA
DIP-8 100 °C/W
SO-8 Surface-Mount 150 °C/W
DIP-14 80 °C/W
SO-14 Surface-Mount 110 °C/W
NOTES: (1) Ensured by wafer test. (2) High-speed test at TJ = 25°C.
OPA130, OPA2130, OPA4130
4SBOS053A
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 10kΩ, unless otherwise noted.
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
1
1k
100
10
Voltage Noise (nV/√Hz)
Frequency (Hz)
10 100 1k 10k 100k 1M
1
1k
100
10
Current Noise (fA/√Hz)
1
Voltage Noise
Current Noise
INPUT BIAS CURRENT
vs INPUT COMMON-MODE VOLTAGE
Common-Mode Voltage (V)
Input Bias Current (pA)
10
5
0–15 –10 –50 51015
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
Ambient Temperature (°C)
Input Bias and Input Offset Current (pA)
10k
1k
100
10
1
0.1
0.01–75 –50 –25 0 25 50 75 100 125
IBIOS
VCM = 0V
CHANNEL SEPARATION vs FREQUENCY
Frequency (Hz)
Channel Separation (dB)
160
140
120
100
80 10 100 1k 10k 100k
Dual and quad devices.
G = 1, all channels.
Quad measured channel
A to D or B to C—other
combinations yield improved
rejection.
R
L
= 10kΩ
OPEN-LOOP GAIN/PHASE vs FREQUENCY
1
120
100
80
60
40
20
0
–20
Voltage Gain (dB)
0
–45
–90
–135
–180
Phase Shift (°)
Frequency (Hz)
10 100 1k 10k 100k 1M 10M
φ
G
C
L
= 100pF
POWER SUPPLY AND COMMON-MODE REJECTION
vs FREQUENCY
Frequency (Hz)
PSR, CMR (dB)
120
110
100
90
80
70
60
50
40
30
20
10
010 100 1k 10k 100k 1M
CMR
+PSR
–PSR
OPA130, OPA2130, OPA4130 5
SBOS053A www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±15V, and RL = 10kΩ, unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY
1M
Frequency (Hz)
10k 100k
30
25
20
15
10
5
0
Output Voltage (Vp-p)
V
S
= ±2.25V
V
S
= ±5V
Maximum output voltage
without slew-rate induced
distortion
V
S
= ±15V
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (µV)
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
700
15
10
5
0
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage Drift (µV/°C)
20
18
16
14
12
10
8
6
4
2
0
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
5.50
6.00
6.50
7.00
7.50
8.00
AOL, CMR, PSR vs TEMPERATURE
Ambient Temperature (°C)
AOL, CMR, PSR (dB)
140
130
120
110
100–75 –50 –25 0 25 50 75 100 125
CMR
Open-Loop
Gain
PSR
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT
vs TEMPERATURE
Temperature (°C)
Quiescent Current Per Amp (mA)
0.65
0.60
0.55
0.50
0.45
0.40
0.35
Short-Circuit Current (mA)
40
35
30
25
20
15
10
–75 –50 –25 0 25 50 75 100 125
ISC
+
IQ
ISC
–
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
Frequency (Hz)
THD + Noise (%)
0.1
0.01
0.001
0.0001100 1k 10k 100k
G = +1
G = +10
R
L
= 10kΩ
R
L
= 2kΩ
OPA130, OPA2130, OPA4130
6SBOS053A
www.ti.com
LARGE-SIGNAL STEP RESPONSE
G = 1, C
L
= 100pF
5V/div
5µs/div
SMALL-SIGNAL STEP RESPONSE
G = 1, C
L
= 1000pF
50mV/div
5µs/div
SMALL-SIGNAL STEP RESPONSE
G =1, C
L
= 100pF
500ns/div
50mV/div
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
15
14
13
12
11
10
–10
–11
–12
–13
–14
–15 0 ±5 ±10 ±15 ±20
Output Current (mA)
Output Voltage Swing (V)
+125°C
+25°C
–55°C
+85°C
+125°C
+25°C
–55°C
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
80
70
60
50
40
30
20
10
0
10pF 100pF 1nF 10nF 100nF
Load Capacitance (F)
Overshoot (%)
G = +1
G = –1
G = ±5
SETTLING TIME vs GAIN
Gain (V/V)
Settling Time (µs)
100
10
1±1 ±10 ±100
0.1%
0.01%
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±15V, and RL = 10kΩ, unless otherwise noted.
OPA130, OPA2130, OPA4130 7
SBOS053A www.ti.com
APPLICATIONS INFORMATION
OPA130 series op amps are unity-gain stable and suitable
for a wide range of general-purpose applications. Power
supply pins should be bypassed with 10nF ceramic capaci-
tors or larger.
OPA130 op amps are free from unexpected output phase-
reversal common with FET op amps. Many FET-input op
amps exhibit phase-reversal of the output when the input
common-mode voltage range is exceeded. This can occur in
voltage-follower circuits, causing serious problems in
control loop applications. OPA130 series op amps are free
from this undesirable behavior. All circuitry is completely
independent in dual and quad versions, assuring normal
behavior when one amplifier in a package is overdriven or
short-circuited.
OPERATING VOLTAGE
OPA130 series op amps operate with power supplies from
±2.25V to ±18V with excellent performance. Although speci-
fications are production tested with ±15V supplies, most
behavior remains unchanged throughout the full operating
voltage range. Parameters which vary significantly with
operating voltage are shown in the typical performance
curves.
OFFSET VOLTAGE TRIM
Offset voltage of OPA130 series amplifiers is laser trimmed
and usually requires no user adjustment. The OPA130
(single op amp version) provides offset voltage trim con-
nections on pins 1 and 5. Offset voltage can be adjusted by
connecting a potentiometer as shown in Figure 1. This
adjustment should be used only to null the offset of the op
amp, not to adjust system offset or offset produced by the
signal source. Nulling offset that is not produced by the
amplifier will change the offset voltage drift behavior of the
op amp.
V+
V–
100kΩ
OPA130 single op amp only.
Use offset adjust pins only to null
offset voltage of op amp—see text.
Trim Range: ±5mV typ
OPA130 6
7
5
4
3
21
10nF
10nF
FIGURE 1. OPA130 Offset Voltage Trim Circuit.
INPUT BIAS CURRENT
The input bias current is approximately 5pA at room tem-
perature and increases with temperature as shown in the
Typical Characteristic curve
Input Bias Current vs Tempera-
ture
.
Input stage cascode circuitry assures that the input bias
current remains virtually unchanged throughout the full input
common-mode range of the OPA130. See the Typical
Characteristic curve
Input Bias Current vs Common-Mode
Voltage
.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA130UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA130UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA130UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA130UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2130PA OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA2130UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2130UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2130UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2130UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4130PA OBSOLETE PDIP N 14 TBD Call TI Call TI
OPA4130UA ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4130UA/2K5 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4130UA/2K5E4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4130UAE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
PACKAGE OPTION ADDENDUM
www.ti.com 11-Nov-2009
Addendum-Page 1
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Nov-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA130UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA2130UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA4130UA/2K5 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA130UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA2130UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA4130UA/2K5 SOIC D 14 2500 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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