General Description
The MAX5927/MAX5929 +1V to +13.2V quad hot-swap
controllers provide complete protection for multisupply
systems. They allow the safe insertion and removal of cir-
cuit cards into live backplanes. These devices hot swap
multiple supplies ranging from +1V to +13.2V, provided
one supply is at or above +2.7V and only one supply is
above +11.0V. The input voltage rails (channels) can be
configured to sequentially turn-on/off, track each other,
or have completely independent operation.
The discharged filter capacitors of the circuit card pro-
vide low impedance to the live backplane. High inrush
currents from the backplane to the circuit card can burn
up connectors and components, or momentarily collapse
the backplane power supply leading to a system reset.
The MAX5927/MAX5929 hot-swap controllers prevent
such problems by gradually ramping up the output volt-
age and regulating the current to a preset limit when the
board is plugged in, allowing the system to stabilize
safely. After the startup cycle is complete, on-chip com-
parators provide VariableSpeed/BiLevel™ protection
against short-circuit and overcurrent faults, and provide
immunity against system noise and load transients. The
load is disconnected in the event of a fault condition. The
MAX5929A automatically restarts after a fault condition,
while the MAX5929L must be unlatched. The MAX5927
fault management mode is selectable.
The MAX5927/MAX5929 offer a variety of options to
reduce external component count and design time. All
devices integrate an on-board charge pump to drive
the gates of low-cost external N-channel MOSFETs, an
adjustable startup timer, and an adjustable current limit.
The devices offer integrated features like startup cur-
rent regulation and current glitch protection to eliminate
external timing resistors and capacitors. The
MAX5929_L provides an open-drain active-low status
output for each channel, the MAX5929_H provides an
open-drain active-high status output for each channel,
and the MAX5927 status output polarity is selectable.
The MAX5927 is available in a 32-pin thin QFN package
and the MAX5929 is available in a 24-pin QSOP pack-
age. All devices are specified over the extended tem-
perature range, -40°C to +85°C.
Applications
Features
♦Safe Hot Swap for +1V to +13.2V Power Supplies
with Any Input Voltage (VIN_ ≥2.7V and Only One
VIN_ > 11.0V)
♦Adjustable Circuit Breaker/Current-Limit
Threshold from 25mV to 100mV
♦Configurable Tracking, Sequencing, or
Independent Operation Modes
♦VariableSpeed/BiLevel Circuit-Breaker Response
♦Internal Charge Pumps Generate N-Channel
MOSFET Gate Drives
♦Inrush Current Regulated at Startup
♦Autoretry or Latched Fault Management
♦Programmable Undervoltage Lockout
♦Status Outputs Indicate Fault/Safe Condition
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
________________________________________________________________ Maxim Integrated Products 1
32
31
30
29
28
27
26
LIM1
ON1
ON2
POL
MODE
ON3
ON4
25 LIM2
9
10
11
12
13
14
15
STAT2
TIM
N.C.
LATCH
STAT3
STAT4
BIAS
16GND
17
18
19
20
21
22
23
GATE3
SENSE3
IN3
N.C.
LIM3
GATE2
SENSE2
8
7
6
5
4
3
2
STAT1
GATE4
SENSE4
IN4
LIM4
GATE1
SENSE1
MAX5927
THIN QFN
1IN1 24 IN2
TOP VIEW
Pin Configurations
Ordering Information
19-2945; Rev 3; 3/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART TEMP RANGE PIN-PACKAGE
MAX5927ETJ -40°C to +85°C 32 Thin QFN-EP
MAX5929LHEEG -40°C to +85°C 24 QSOP
MAX5929LLEEG -40°C to +85°C 24 QSOP
MAX5929AHEEG -40°C to +85°C 24 QSOP
MAX5929ALEEG -40°C to +85°C 24 QSOP
VariableSpeed/BiLevel is a trademark of Maxim Integrated
Products, Inc.
PCI Express Hot Plug
Hot Plug-In Daughter Cards
RAID
Power-Supply
Sequencing/Tracking
Basestation Line Cards
Portable Computer Device
Bays (Docking Stations)
Network Switches, Routers,
Hubs
Selector Guide and Typical Operating Circuit appear at end
of data sheet.
EP = Exposed paddle.
Pin Configurations continued at end of data sheet.
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND, unless otherwise noted.)
IN_ ..........................................................................-0.3V to +14V
GATE_.............................................................-0.3V to (IN_ + 6V)
BIAS (Note 1) .............................................. (VIN - 0.3V) to +14V
ON_, STAT_, LIM_ (MAX5927), TIM, MODE,
LATCH (MAX5927), POL (MAX5927)
(Note 1).....................................................-0.3V to (VIN + 0.3V)
SENSE_........................................................-0.3V to (IN_ + 0.3V)
Current into Any Pin..........................................................±50mA
Continuous Power Dissipation (TA= +70°C)
24-Pin QSOP (derate 9.5mW/°C above +70°C)............762mW
32-Pin Thin QFN (derate 21.3mW/°C above +70°C) ..1702mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > +11.0V, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and
TA= +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
POWER SUPPLIES
IN_ Input Voltage Range VIN_ At least one VIN_ ≥ +2.7V and only one
VIN_ > +11.0V 1.0
13.2
V
Supply Current IQIIN1 + IIN2 + IIN3 + IIN4, VON_ = 2.7V,
VIN_ = +13.2V, after STAT_ asserts 2.5 5 mA
CURRENT CONTROL
TA = +25°C
22.5
25
27.5
LIM_ = GND,
MAX5927/MAX5929
(Note 4)
TA = -40°C to +85°C 21.0 27.5
RLIM_ = 10kΩ (MAX5927) 80
125
Slow-Comparator Threshold
(VIN_ - VSENSE_)
(Note 3)
VSC,TH
RLIM_ from LIM_ to GND (MAX5927) RLIM_ x 7.5 x
10-6 + 25mV
mV
1mV overdrive 3 ms
Slow-Comparator Response Time
(Note 4) tSCD 50mV overdrive 130 µs
Fast-Comparator Threshold
(VIN_ - VSENSE_)VFC,TH 2 x
VSC
,
TH
mV
Fast-Comparator Response Time
tFCD 10mV overdrive, from overload condition 200 ns
SENSE_ Input Bias Current
IB SENSE_
VSENSE_ = VIN_
0.03
1µA
MOSFET DRIVER
RTIM = 100kΩ8.0
10.8 13.6
RTIM = 4kΩ (minimum value)
0.30
0.4
0.55
Startup Period (Note 5) tSTART
TIM floating (default) 5 9 14
ms
Note 1: VIN is the largest of VIN1, VIN2, VIN3, and VIN4.
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > +11.0V, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and
TA= +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
Charging, VGATE_ = GND, VIN_ = 5V
(Note 6) 80 100
125
Discharging, during startup 100
µA
Discharging, normal turn-off or triggered by
the slow comparator after startup,
VGATE_ = 5V, VIN_ = 10V, VON_ = 0V
237
Average Gate Current IGATE
Discharging, triggered by a fault after
startup, VGATE_ = 5V, VIN_ = 10V,
(VIN_ - VSENSE_) > VFC,TH (Note 7)
30 50
120
mA
Gate-Drive Voltage VDRIVE VGATE_ - VIN_, IGATE_ = 1µA 4.9 5.3 5.6 V
ON COMPARATOR
Low to high
0.85 0.875 0.90
V
ON_ Threshold
VON_
TH
Hysteresis 25 mV
ON_ Propagation Delay 10mV overdrive 10 µs
ON_ Voltage Range VON_ Without false output inversion VIN V
ON_ Input Bias Current IBON_ VON_ = VIN
0.03
1µA
ON_ Pulse Width Low
tUNLATCH
To unlatch after a latched fault
100
µs
DIGITAL OUTPUTS (STAT_)
Output Leakage Current VSTAT_ ≤ 13.2V 1 µA
Output Voltage Low VOL_ POL = floating (MAX5927), ISINK = 1mA 0.4 V
UNDERVOLTAGE LOCKOUT (UVLO)
UVLO Threshold VUVLO
Startup is initiated when this threshold is
reached by any VIN_ and VON_ > 0.9V
(Note 8)
2.25 2.65
V
UVLO Hysteresis
VUVLO
HYST
250 mV
UVLO Glitch Filter Reset Time tD, GF
VIN < VUVLO maximum pulse width to reset
10 µs
UVLO to Startup Delay tD,UVLO Time input voltage must exceed VUVLO
before startup is initiated 20
37.5
60 ms
Input Power-Ready Threshold
VPWRRDY
(Note 9) 0.9
0.95
1.0 V
Input Power-Ready Hysteresis
VPWRHYST
50 mV
LOGIC AND TIMING
POL Input Pullup IPOL POL = GND (MAX5927) 2 4 6 µA
LATCH Input Pullup ILATCH LATCH = GND (MAX5927) 2 4 6 µA
MODE Input Voltage VMODE MODE floating (default to sequencing
mode) 1.0
1.25
1.5 V
Independent Mode Selection
Threshold
VINDEP
TH
VMODE rising 0.4 V
Tracking Mode Selection
Threshold
VTRACK
TH
VMODE rising 2.7 V
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
4_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +13.2V provided at least one supply is larger than or equal to +2.7V and only one supply is > +11.0V, TA= -40°C to
+85°C, unless otherwise noted. Typical values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, VON_ = +3.3V, and
TA= +25°C.) (Notes 1, 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
MODE Input Impedance RMODE 200 kΩ
Autoretry Delay tRETRY Delay time to restart after fault shutdown 64 x
tSTART
ms
Note 2: All devices are 100% tested at TA= +25°C. Limits over temperature are guaranteed by design.
Note 3: The slow-comparator threshold is adjustable. VSC,TH = RLIM x 7.5µA + 25mV (see the Typical Operating Characteristics).
Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent—the higher the overcurrent
condition, the faster the response time (see the Typical Operating Characteristics).
Note 5: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current limiter
by regulating the sense current with the fast comparator (see the Startup Period section).
Note 6: The current available at GATE is a function of VGATE (see the Typical Operating Characteristics).
Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current.
Note 8: Each channel input while the other inputs are at +1V.
Note 9: Each channel input while any other input is at +3.3V.
Typical Operating Characteristics
(Typical Operating Circuits, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA=
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
0
1
2
3
4
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5927 toc01
VINW (V)
IIN (mA)
06824 1012 14
VINX = VINY = VINZ = 2.7V
IINW + IINX + IINY + IINZ
IINW
IINX + IINY + IINZ
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
26481012 14
TOTAL SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX5927 toc02
VIN (V)
IIN (mA)
IIN = IIN1 + IIN2 + IIN3 + IIN4
VIN = VINW = VINX = VINY = VINZ
VON = VON1 = VON2 = VON3 = VON4
VON = 0V
VON = 3.3V
0
1.0
0.5
2.0
1.5
2.5
3.0
-40 85
SUPPLY CURRENT
vs. TEMPERATURE
MAX5927 toc03
TEMPERATURE (°C)
IIN (mA)
10-15 35 60
VON_ = VINX = VINY = VINZ = 2.7V
VINW = 2.8V
IINW + IINX + IINY + IINZ
IINX + IINY + IINZ
IINW
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
_______________________________________________________________________________________ 5
0
2
4
6
8
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
MAX5927 toc04
VINW (V)
VDRIVEW (V)
06824 1012 14
VINX = VINY = VINZ = 2.7V
0
30
90
60
120
150
GATE CHARGE CURRENT
vs. GATE VOLTAGE
MAX5927 toc05
VGATEW (V)
GATE CHARGE CURRENT (µA)
01051520
VONW = VINX = VINY = VINZ = 2.7V
VINW = 1V
VINW = 5V
VINW = 13.2V
0
40
120
80
160
200
GATE CHARGE CURRENT
vs. TEMPERATURE
MAX5927 toc06
TEMPERATURE (°C)
GATE CHARGE CURRENT (µA)
-40 3510-15 60 85
VONW = VINX = VINY = VINZ = 2.7V
VGATEW = 0V
VINW = 13.2V
VINW = 5V
0
2
1
4
3
5
6
020
GATE DISCHARGE CURRENT (NORMAL)
vs. GATE VOLTAGE
MAX5927 toc07
VGATEW (V)
GATE DISCHARGE CURRENT (mA)
841216
VONW = 0V
VINX = VINY = VINZ = 2.7V
VINW = 13.2V
VINW = 1V
VINW = 5V
VINW = 3.3V
0
2
1
4
3
5
6
-40 85
GATE DISCHARGE CURRENT (NORMAL)
vs. TEMPERATURE
MAX5927 toc08
TEMPERATURE (°C)
GATE DISCHARGE CURRENT (mA)
10-15 35 60
VONW = 0V
VINX = VINY = VINZ = 2.7V
VINW = 13.2V
VINW = 5V
VINW = 3.3V
VINW = 1V
10
0255075100 125
1
0.1
0.01
0.001
0.0001
TURN-OFF TIME
vs. SENSE VOLTAGE
MAX5927 toc09
VINW - VSENSEW (mV)
TURN-OFF TIME (ms)
SLOW-COMPARATOR
THRESHOLD
FAST-COMPARATOR
THRESHOLD
TURN-OFF TIME vs. SENSE VOLTAGE
(EXPANDED SCALE)
MAX5927 toc10
VINW - VSENSEW (mV)
TURN-OFF TIME (ms)
10
0.1
1
20 25 30 35 40 45 50
SLOW-COMPARATOR THRESHOLD
0
20
60
40
100
80
120
SLOW-COMPARATOR THRESHOLD
vs. RLIMW
MAX5927 toc11
RLIMW (kΩ)
VSC,TH (mV)
0246810
0
20
40
60
STARTUP PERIOD
vs. RTIM
MAX5927 toc12
RTIM (kΩ)
tSTART (ms)
0 100 200 400300 500
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA=
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
6_______________________________________________________________________________________
TURN-OFF TIME
SLOW-COMPARATOR FAULT
MAX5927toc13
VSTATW
2V/div
VGATEW
5V/div
VINW - VSENSEW
25mV/div
0V
0V
1ms/div
TURN-OFF TIME
FAST-COMPARATOR FAULT
MAX5927toc14
VSTATW
2V/div
VGATEW
5V/div
VINW - VSENSEW
100mV/div
0V
0V
0V
100ns/div
STARTUP WAVEFORMS FAST TURN-ON
(CGATE = 0nF, CBOARD = 1000µF)
MAX5927toc15
VONW
5V/div
VGATEW
10V/div
VSTATW
5V/div
IINW
2A/div
VOUTW
10V/div
2ms/div
STARTUP WAVEFORMS SLOW TURN-ON
(CGATE = 0.22µF, CBOARD = 1000µF)
MAX5927toc16
VONW
5V/div
VGATEW
10V/div
VSTATW
5V/div
IINW
2A/div
VOUTW
10V/div
10ms/div
AUTORETRY DELAY (TIME FLOATING)
MAX5927toc17
VGATEW
2V/div
0V
0V
0V
VOUTW
2V/div
IOUTW
500mA/div
100ms/div
TURN-ON IN
VOLTAGE-TRACKING MODE
MAX5927toc18
VINW
2V/div
0V
0V
VONW
2V/div
5V/div
4ms/div
VPWRRDY
VGATEX
VGATEW
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA=
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
XXXX
MAX5927toc19
VINW
2V/div
0V
VONW
2V/div
0V
5V/div
0V
4ms/div
VGATEX
VGATEW
VPWRRDY
TURN-OFF IN
VOLTAGE-TRACKING MODE
XXXX
MAX5927toc20
VINW
2V/div
VONW
2V/div
0V
5V/div
4ms/div
VGATEX VGATEW
TURN-ON IN
POWER-SEQUENCING MODE
VPWRRDY
0V
0V
XXXX
MAX5927toc21
VINW
2V/div
VONW
2V/div
5V/div
0V
0V
0V
4ms/div
VGATEX
VGATEW
TURN-OFF IN
POWER-SEQUENCING MODE
VPWRRDY
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
_______________________________________________________________________________________ 7
XXXX
MAX5927toc22
VINW
2V/div
0V
VONW
2V/div
0V
5V/div
0V
4ms/div
TURN-ON IN
INDEPENDENT MODE
VGATEX
VGATEW
XXXX
MAX5927toc23
VINW
2V/div
0V
VONW
2V/div
5V/div
0V
4ms/div
TURN-OFF IN
INDEPENDENT MODE
VPWRRDY
VGATEX
VGATEW
0V
0
10
30
20
40
50
STRONG GATE DISCHARGE CURRENT
vs. OVERDRIVE
MAX5927 toc24
VIN_- VSENSE_ (mV)
GATE DISCHARGE CURRENT (mA)
20 3525 30 45
40 50
VINW = 5V
VINW = 2.7V
VONW = VIN
VGATE = 5V
AFTER STARTUP
VINW = 12V
Typical Operating Characteristics (continued)
(Typical Operating Circuits, Q1 = Q2 = Q3 = Q4 = Fairchild FDB7090L, VIN1 = 12V, VIN2 = 5.0V, VIN3 = 3.3V, VIN4 = 1.0V, TA=
+25°C, unless otherwise noted. Channels 1 through 4 are identical in performance. Where characteristics are interchangeable,
channels 1 through 4 are referred to as W, X, Y, and Z.)
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
8_______________________________________________________________________________________
Pin Description
PIN
MAX5927
MAX5929
NAME FUNCTION
14IN1 Channel 1 Supply Input. Connect to a supply voltage from 1V to 13.2V and to one end of
RSENSE1. Bypass with a 0.1µF capacitor to ground.
25
SENSE1
Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET
and to one end of RSENSE1.
36GATE1 Channel 1 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
4—LIM4 Channel 4 Current-Limit Setting. Connect a resistor from LIM4 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave open.
57IN4 Channel 4 Supply Input. Connect to a supply voltage from 1V to 13.2V and to one end of
RSENSE4. Bypass with a 0.1µF capacitor to ground.
68
SENSE4
Channel 4 Current-Sense Input. Connect SENSE4 to the drain of an external MOSFET
and to one end of RSENSE4.
79GATE4 Channel 4 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
810STAT1
Open-Drain Status Signal for Channel 1. STAT1 asserts when hot swap is successful and
tSTART has elapsed. STAT1 deasserts if ON1 is low, or if channel 1 is turned off for any
fault condition.
911STAT2
Open-Drain Status Signal for Channel 2. STAT2 asserts when hot swap is successful and
tSTART has elapsed. STAT2 deasserts if ON2 is low, or if channel 2 is turned off for any
fault condition.
10 12 TIM
Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period.
Leave TIM unconnected for the default startup period of 9ms. RTIM must be between
4kΩ and 500kΩ.
11, 20 — N.C. No Connection. Not internally connected.
12 — LATCH Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault.
Leave LATCH open for latch mode.
13 13 STAT3
Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and
tSTART has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any
fault condition.
14 14 STAT4
Open-Drain Status Signal for Channel 4. STAT4 asserts when hot swap is successful and
tSTART has elapsed. STAT4 deasserts if ON4 is low, or if channel 4 is turned off for any
fault condition.
15 15 BIAS
Supply Reference Output. The highest supply is available at BIAS for filtering. Connect a
1nF to 10nF ceramic capacitor from BIAS to GND. No other connections are allowed to
this pin.
16 16 GND Ground
17 17 GATE3 Channel 3 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
18 18
SENSE3
Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET
and to one end of RSENSE3.
19 19 IN3 Channel 3 Supply Input. Connect to a supply voltage from 1V to 13.2V and to one end of
RSENSE3.
Detailed Description
The MAX5927/MAX5929 are circuit-breaker ICs for hot-
swap applications where a line card is inserted into a
live backplane. The MAX5927/MAX5929 operate down
to 1V provided one of the inputs is above 2.7V.
Normally, when a line card is plugged in to a live back-
plane, the card’s discharged filter capacitors provide
low impedance that can momentarily cause the main
power supply to collapse. The MAX5927/MAX5929
reside either on the backplane or on the removable
card to provide inrush current limiting and short-circuit
protection. This is achieved by using external N-chan-
nel MOSFETs, external current-sense resistors, and on-
chip comparators. The startup period and current-limit
threshold of the MAX5927/MAX5929 can be adjusted
with external resistors. Figure 1 shows the MAX5927/
MAX5929 functional diagram.
The MAX5927 offers four programmable current limits,
selectable fault management mode, and selectable
STAT_ output polarity. The MAX5929 features fixed cur-
rent limits, and a variety of fault management and
STAT_ polarity option combinations.
Mode
The MAX5927/MAX5929 supports three modes of oper-
ation: voltage-tracking, power-sequencing, and inde-
pendent mode. Select the appropriate mode according
to Table 1.
Voltage-Tracking Mode
Connect MODE high to enter voltage-tracking mode.
While in voltage-tracking mode, all channels turn on
and off together. To turn all channels on:
•At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
• All VON_ must exceed VON,TH (0.875V).
•No faults may be present on any channel.
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
_______________________________________________________________________________________ 9
MODE OPERATION
High (Connect to BIAS) Voltage tracking
OPEN Power sequencing
GND Independent
Table 1. Operational Mode Selection
PIN
MAX5927
MAX5929
NAME FUNCTION
21 — LIM3 Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave open.
22 20 GATE2 Channel 2 Gate-Drive Output. Connect to gate of external N-channel MOSFET.
23 21
SENSE2
Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET
and to one end of RSENSE2.
24 22 IN2 Channel 2 Supply Input. Connect to a supply voltage from 1V to 13.2V and to one end of
RSENSE2.
25 — LIM2 Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set the current-
trip level. Connect to GND for the default 25mV threshold. Do not leave open.
26 23 ON4 On/Off Channel 4 Control Input (see the Mode section)
27 24 ON3 On/Off Channel 3 Control Input (see the Mode section)
28 1 MODE Mode Configuration Input. Mode is configured according to Table 1 as soon as one of
the IN_ voltages exceeds UVLO and before turning on OUT_ (see the Mode section).
29 — POL STAT Output Polarity Select (See Table 3 and the Status Output Section)
30 2 ON2 On/Off Channel 2 Control Input (See the Mode Section)
31 3 ON1 On/Off Channel 1 Control Input (See the Mode Section)
32 — LIM1 Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set the current-
trip level. Connect to GND for the default 25mV threshold. Do not leave open.
EP — EP Exposed Pad. Leave EP floating or connect to GND.
Pin Description (continued)
MAX5927/MAX5929
The MAX5927/MAX5929 turn off all channels if any of
the above conditions are not met. After a fault-latched
shutdown, cycle any of the ON_ inputs to unlatch and
restart all channels.
Power-Sequencing Mode
Leave MODE floating to enter power-sequencing
mode. While in power-sequencing mode, the
MAX5927/MAX5929 turn on and off each channel
depending on the state of the corresponding VON_. To
turn on a given channel:
•At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
•The corresponding VON_ must exceed VON,TH
(0.875V).
•No faults may be present on any channel.
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
10 ______________________________________________________________________________________
FAST COMP.
SLOW COMP.
FAST DISCHARGE
Q1
OUT1
2.45V
BIAS AND
REFERENCES
STARTUP
OSCILLATOR
TIMING
OSCILLATOR
CHARGE
PUMP DEVICE CONTROL
LOGIC
VSC, TH VFC, TH
RLIM1
SENSE1
IN1
GATE1
RSENSE1
LIM1*
RTIM
TIM
1nF
BIAS POL*
RLIM2
100µA
UVLO
UVLO FAST COMP.
SLOW COMP.
FAST DISCHARGE
SLOW DISCHARGESLOW DISCHARGE
Q2
OUT2
CHARGE
PUMP
CURRENT CONTROL
AND
STARTUP LOGIC
CURRENT CONTROL
AND
STARTUP LOGIC
VSC, TH
VFS, TH
SENSE2
IN2
GATE2
RSENSE2
LIM2*
100µA
STAT2STAT1
LIM3* LIM4*
FAST COMP.
SLOW COMP.
FAST DISCHARGE
Q3
OUT3
FAULT
MANAGEMENT
OPERATION
MODE
CHARGE
PUMP
ON
INPUT
CONPARATORS
VSC, TH VFS, TH
SENSE3
IN3
GATE3
RSENSE3
RLIM3 RLIM4
100µA
UVLO
UVLO FAST COMP.
SLOW COMP.
FAST DISCHARGE
SLOW DISCHARGESLOW DISCHARGE
Q4
OUT4
CHARGE
PUMP
CURRENT CONTROL
AND
STARTUP LOGIC
CURRENT CONTROL
AND
STARTUP LOGIC
VSC, TH
VFS, TH
SENSE4
IN4
GATE4
RSENSE4
100µA
3mA/
50mA
3mA/
50mA
3mA/
50mA 3mA/
50mA
STAT4
STAT3*MAX5927 ONLY. LATCH* MODEON1 ON2 ON3 ON4
MAX5927
MAX5929
Figure 1. Functional Diagram
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 11
ON1
ON2
ON3
ON4
ANY
IN_
IN2
IN3
IN4
OUT1*
OUT2*
OUT3*
OUT4*
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided tD, UVLO Requirement is Met)
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
12 ______________________________________________________________________________________
ON1
ON2
ON3
ON4
ANY
IN_
IN2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
*
Figure 3. Power-Sequencing Timing Diagram (Provided tD, UVLO Requirement is Met)
The MAX5927/MAX5929 turn off all channels if any of
the above conditions are not met. After a fault-latched
shutdown, cycle any of the ON_ inputs to unlatch and
restart all channels, depending on the corresponding
VON_ state.
Independent Mode
Connect MODE to GND to enter independent mode.
While in independent mode, the MAX5927/MAX5929
provide complete independent control for each chan-
nel. To turn on a given channel:
•At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms)
•The corresponding VIN_ must exceed VPWRRDY
(0.95V)
•The corresponding VON_ must exceed VON,TH
(0.875V)
The MAX5927/MAX5929 turn off the corresponding
channel if any of the above conditions are not met.
During a fault condition on a given channel only, the
affected channel is disabled. After a fault-latched shut-
down, recycle the corresponding ON_ inputs to unlatch
and restart only the corresponding channel.
Startup Period
RTIM sets the duration of the startup period from 0.4ms
(RTIM = 4kΩ) to 50ms (RTIM = 500kΩ) (see the Setting
the Startup Period, RTIM section). The default startup
period is fixed at 9ms when TIM is floating. The startup
period begins after the turn-on conditions are met as
described in the Mode section, and the device is not
latched or in its autoretry delay (see the Latched and
Autoretry Fault Management section).
The MAX5927/MAX5929 limit the load current if an
overcurrent fault occurs during startup instead of com-
pletely turning off the external MOSFETs. The slow
comparator is disabled during the startup period and
the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external current-
sense resistor.
During the startup period, the gate-drive current is limit-
ed to 100µA and decreases with the increase of the
gate voltage (see the Typical Operating Characteristics).
This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcur-
rent, the MAX5927/MAX5929 regulate the gate voltage
to ensure that the voltage across the sense resistor
does not exceed VSU,TH. This effectively regulates the
inrush current during startup.
Figure 6 shows the startup waveforms. STAT_ is assert-
ed immediately after the startup period if no fault condi-
tion is present.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a 3mA/50mA pulldown current
in response to a fault condition. After a fault, STAT_ is
deasserted, the MAX5929L stays latched off and the
MAX5929A automatically restart. Use the MAX5927
LATCH input to control whether the STAT_ outputs latch
off or Autoretry after a fault condition (see the Latched
and Autoretry Fault Management section).
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________________________ 13
Figure 4. Power-Sequencing Fault Turn-Off
ON1 = ON2 = ON3 = ON4
OVERCURRENT
FAULT
CONDITION
OUT1
OUT2
OUT3
OUT4
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
*
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
14 ______________________________________________________________________________________
ON1
ON2
ON3
ON4
IN1
IN2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
tD, UVLO
*
*
*
*
Figure 5. Independent Mode Timing Diagram
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Slow-Comparator Normal Operation
After the startup period is complete, the slow comparator
is enabled and the device enters normal operation. The
comparator threshold voltage (VSC,TH) is adjustable from
25mV to 100mV. The slow-comparator response time is
3ms for a 1mV overdrive. The response time decreases
to 100µs with a large overdrive. The variable-speed
response time allows the MAX5927/MAX5929 to ignore
low-amplitude momentary glitches, thus increasing
system noise immunity. After an extended overcurrent
condition, a fault is generated, STAT_ outputs are
deasserted, and the MOSFET gates are discharged with
a 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period, the fast comparator regu-
lates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup
fast-comparator threshold voltage (VSU,TH), VSU,TH is
scaled to two times the slow-comparator threshold
(VSC,TH).
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fast-
comparator threshold, a fault is generated, STAT_ is
deasserted, and the MOSFET gates are discharged
with a strong 50mA pulldown current. This happens in
the event of a serious current overload or a dead short.
The fast-comparator threshold voltage (VFC,TH) is
scaled to two times the slow-comparator threshold
(VSC,TH). This comparator has a fast response time of
200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5927/MAX5929 from turn-
ing on the external MOSFETs until one input voltage
exceeds the UVLO threshold (2.45V) for tD,UVLO. The
MAX5927/MAX5929 use power from the highest input
voltage rail for the charge pumps. This allows for more
efficient charge-pump operation. The highest VIN_ is
provided as an output at BIAS. The UVLO protects the
external MOSFETs from an insufficient gate-drive volt-
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 15
Figure 6. Independent Mode Startup Waveforms
tON
VDRIVE
VGATE_
VGATE_
ON_
STAT_
VTH
VOUT_
VOUT_
ILOAD_
tSTART
CBOARD_ = LARGE
CBOARD_ = 0
VFC,TH
RSENSE_
Figure 7. VariableSpeed/BiLevel Response
SENSE VOLTAGE (VIN - VSENSE)
TURN-OFF TIME
VSC,TH VFC,TH
(2 x VSC,TH)
3ms
130µs
200ns
SLOW
COMPARATOR
FAST
COMPARATOR
MAX5927/MAX5929
age. tD,UVLO ensures that the board is fully inserted
into the backplane and that the input voltages are
stable. The MAX5927/MAX5929 include a UVLO glitch
filter, tD,GF, to reject all input voltage noise and tran-
sients. Bringing all input supplies below the UVLO
threshold for longer than tD,GF reinitiates tD,UVLO and
the startup period, tSTART. See Figure 8 for an example
of automatic turn-on function.
Latched and Autoretry Fault Management
The MAX5929L always latch the external MOSFETs off
when an overcurrent fault is detected, and the
MAX5929A are always in autoretry mode. The
MAX5927 can be configured to either latch the external
MOSFETs off or to autoretry (see Table 2). Toggling
ON_ below 0.875V for at least 100µs clears the
MAX5929L or MAX5927 (LATCH = FLOAT) fault and
reinitiates the startup period. Similarly, the MAX5929A
or MAX5927 (LATCH = GND) turn the external
MOSFETs off when an overcurrent fault is detected,
then automatically restart after the autoretry delay that
is internally set to 64 times tSTART.
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that
assert when hot swap is successful and tSTART has
elapsed. STAT_ deasserts if ON_ is low or if the chan-
nel is turned off for any fault condition.
The polarity of the STAT_ outputs is selected using POL
for the MAX5927 (see Table 3). Tables 4 and 5 contain
the MAX5927/MAX5929 truth tables.
Applications Information
Component Selection
N-Channel MOSFETs
Select the external MOSFETs according to the applica-
tion’s current levels. Table 6 lists recommended com-
ponents. The MOSFET’s on-resistance (RDS(ON))
should be chosen low enough to have a minimum volt-
age drop at full load to limit the MOSFET power dissi-
pation. High RDS(ON) causes output ripple if there is a
pulsating load. Determine the device power rating to
accommodate a short-circuit condition on the board at
startup and when the device is in autoretry mode (see
the MOSFET Thermal Considerations section).
Using these devices in latched mode allows the use of
MOSFETs with lower power ratings. A MOSFET typical-
ly withstands single-shot pulses with higher dissipation
than the specified package rating. Table 7 lists some
recommended MOSFET manufacturers.
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
16 ______________________________________________________________________________________
LATCH FAULT MANAGEMENT
Floating Fault condition latches MOSFETs off
Low Autoretry mode
Table 2. Selecting Fault Management
Mode (MAX5927)
POL STAT_
Low Asserts low
Floating Asserts high (open drain)
Table 3. Selecting STAT_ Polarity
(MAX5927)
Figure 8. Automatic Turn-On when Input Voltages are Above
their Respective Undervoltage Lockout Threshold (Provided
tD,UVLO Requirement is Met)
MAX5927
MAX5929
V1
ON1
ON2
ON3
ON4
GND
GND
ON1
ON2
ON3
ON4
REMOVABLE CARDBACKPLANE
V2
V3
V4
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 17
PART CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
CHANNEL 4
FAULT
STAT1/
GATE1*
STAT2/
GATE2*
STAT3/
GATE3*
STAT4/
GATE4*
Yes X X X L/OFF L/OFF L/OFF L/OFF
XYes X X L/OFF L/OFF L/OFF L/OFF
XXYes X L/OFF L/OFF L/OFF L/OFF
XXXYes L/OFF L/OFF L/OFF L/OFF
MAX5927 (POL = 1),
MAX5929_H
No No No No H/ON H/ON H/ON H/ON
Yes X X X
H/OFF H/OFF H/OFF
H/OFF
XYes X X
H/OFF H/OFF H/OFF
H/OFF
XXYes X
H/OFF H/OFF H/OFF
H/OFF
XXXYes
H/OFF H/OFF H/OFF
H/OFF
MAX5927 (POL = 0),
MAX5929_L
No No No No L/ON L/ON L/ON L/ON
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
(Note: STAT_ is asserted when hot swap is successful and tON has elapsed. STAT_ is unasserted during a fault)
CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
CHANNEL 4
FAULT
STAT1/
GATE1
STAT2/
GATE2
STAT3/
GATE3
STAT4/
GATE4
Yes Yes Yes Yes
Unasserted/OFF Unasserted/OFF Unasserted/OFF
Unasserted/OFF
Yes Yes Yes No
Unasserted/OFF Unasserted/OFF Unasserted/OFF
Asserted/ON
Yes Yes No Yes
Unasserted/OFF Unasserted/OFF
Asserted/ON
Unasserted/OFF
Yes Yes No No
Unasserted/OFF Unasserted/OFF
Asserted/ON Asserted/ON
Yes No Yes Yes
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Unasserted/OFF
Yes No Yes No
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Asserted/ON
Yes No No Yes
Unasserted/OFF
Asserted/ON Asserted/ON
Unasserted/OFF
Yes No No No
Unasserted/OFF
Asserted/ON Asserted/ON Asserted/ON
No Yes Yes Yes Asserted/ON
Unasserted/OFF Unasserted/OFF
Unasserted/OFF
No Yes Yes No Asserted/ON
Unasserted/OFF Unasserted/OFF
Asserted/ON
No Yes No Yes Asserted/ON
Unasserted/OFF
Asserted/ON
Unasserted/OFF
No Yes No No Asserted/ON
Unasserted/OFF
Asserted/ON Asserted/ON
No No Yes Yes Asserted/ON Asserted/ON
Unasserted/OFF
Unasserted/OFF
No No Yes No Asserted/ON Asserted/ON
Unasserted/OFF
Asserted/ON
No No No Yes Asserted/ON Asserted/ON Asserted/ON
Unasserted/OFF
No No No No Asserted/ON Asserted/ON Asserted/ON Asserted/ON
Table 5. Status Output Truth Table: Independent Mode
*L = Low, H = High.
MAX5927/MAX5929
Sense Resistor
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV. Select a sense resistor that caus-
es a drop equal to the slow-comparator threshold volt-
age at a current level above the maximum normal
operating current. Typically, set the overload current at
1.2 to 1.5 times the full load current. The fast-compara-
tor threshold is two times the slow-comparator thresh-
old in normal operating mode. Choose the sense
resistor power rating to be greater than or equal to 2 x
(IOVERLOAD) x VSC,TH. Table 7 lists some recommend-
ed sense resistor manufacturers.
Slow-Comparator Threshold, RLIM (MAX5927)
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV, allowing designers to fine-tune
the current-limit threshold for use with standard-value
sense resistors. Low slow-comparator thresholds allow
for increased efficiency by reducing the power dissi-
pated by the sense resistor. Furthermore, the low 25mV
slow-comparator threshold is beneficial when operating
with supply rails down to 1V because it allows a small
percentage of the overall output voltage to be used for
current sensing. The VariableSpeed/BiLevel fault pro-
tection feature offers inherent system immunity against
load transients and noise. This allows the slow-com-
parator threshold to be set close to the maximum nor-
mal operating level without experiencing nuisance
faults. To adjust the slow-comparator threshold, calcu-
late RLIM as follows:
where VTH is the desired slow-comparator threshold
voltage. Shorting LIM_ to GND sets VTH to 25mV. Do
not leave LIM_ open.
Setting the Startup Period, RTIM
The startup period (tSTART) is adjustable from 0.4ms to
50ms. The adjustable startup period feature allows sys-
tems to be customized for MOSFET gate capacitance
and board capacitance (CBOARD). The startup period
is adjusted with a resistor connected from TIM to GND
(RTIM). RTIM must be between 4kΩand 500kΩ. The
startup period has a default value of 9ms when TIM is
left floating. Calculate RTIM with the following equation:
where tSTART is the desired startup period.
Rt
pF
TIM START
=×128 800
RVmV
A
LIM TH
=−
µ
25
75.
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
18 ______________________________________________________________________________________
PART NUMBER MANUFACTURER DESCRIPTION
IRF7413 11mΩ, 8-pin SO, 30V
IRF7401 22mΩ, 8-pin SO, 20V
IRL3502S
International Rectifier
6mΩ, D2PAK, 20V
MMSF3300 20mΩ, 8-pin SO, 30V
MMSF5N02H 30mΩ, 8-pin SO, 20V
MTB60N05H
Motorola
14mΩ, D2PAK, 50V
FDS6670A 10mΩ, 8-pin SO, 30V
ND8426A 13.5mΩ, 8-pin SO, 20V
FDB8030L
Fairchild
4.5mΩ, D2PAK, 30V
Table 6. Recommended N-Channel MOSFETs
COMPONENT MANUFACTURER PHONE WEBSITE
Dale-Vishay 402-562-3131 www.vishay.com
Sense Resistors IRC 704-264-8861 www.irctt.com
International Rectifier 310-233-3331 www.irf.com
Fairchild 888-522-5372 www.fairchildsemi.com
MOSFETs
Motorola 602-224-3576 www.mot-sps.com/ppd
Table 7. Component Manufacturers
Startup Sequence
There are two ways of completing the startup
sequence. Case A describes a startup sequence that
slowly turns on the MOSFETs by limiting the gate
charge. Case B uses the current-limiting feature and
turns on the MOSFETs as fast as possible while still
preventing a high inrush current. The output voltage
ramp-up time (tON) is determined by the longer of the
two timings, case A and case B. Set the startup timer
(tSTART) to be longer than tON to guarantee enough
time for the output voltage to settle.
Case A: Slow Turn-On (Without Current Limit)
There are two ways to turn on the MOSFETs without
reaching the fast-comparator current limit:
•If the board capacitance (CBOARD) is small, the
inrush current is low.
•If the gate capacitance is high, the MOSFETs turn
on slowly.
In both cases, the turn-on time is determined only by
the charge required to enhance the MOSFET. The
small 100µA gate-charging current effectively limits
the output voltage dV/dt. Connecting an external
capacitor between GATE and GND extends the turn-
on time. The time required to charge/discharge a
MOSFET is as follows:
where:
CGATE is the external gate to ground capacitance
(Figure 9),
∆VGATE is the change in gate charge,
QGATE is the MOSFET total gate charge,
IGATE is the gate-charging/discharging current.
In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (Crss) plus any additional
capacitance from GATE to GND (CGATE), and on any
load current (ILOAD) present during the startup period.
Example: Charging and discharging times using the
Fairchild FDB7030L MOSFET
If VIN1 = 5V then GATE1 charges up to 10.4V (VIN1 +
VDRIVE), therefore ∆VGATE = 10.4V. The manufacturer’s
data sheet specifies that the FDB7030L has approxi-
mately 60nC of gate charge and Crss = 600pF. The
MAX5927/MAX5929 have a 100µA gate-charging cur-
rent and a 3mA/50mA normal/strong discharging cur-
rent. CBOARD = 6µF and the load does not draw any
current during the startup period. With no gate capaci-
tor, the inrush current, charge, and discharge times are:
IF
pF AA
IVnC
Ams
tVnC
mA ms
tVnC
mA s
INRUSH
CHARGE
DISCHARGE
DISCHARGE STRONG
=µ
+×+=
=×+
µ=
=×+ =
=×+ =
6
600 0 100 0 1
0104 60
100 06
0104 60
3002
0104 60
50 12
. .
. .
. .
()
µ
µ
IC
CC II
INRUSH BOARD
rss GATE GATE LOAD
=+×+
tCVQ
I
GATE GATE GATE
GATE
=×+∆
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 19
Figure 10. Adjustable Undervoltage Lockout
GATE_
SENSE_
VTURN-ON - (R2 x R1) VON, TH
R2
ON_
VIN
IN_
R1
R2
MAX5927
MAX5929
Figure 9. Operating with an External Gate Capacitor
GATE_
SENSE_
GND
ON_
RSENSE_ VOUT_
CGATE
CBOARD
VIN_
IN_
RPULLUP
STAT_ MAX5927
MAX5929
MAX5927/MAX5929
With a 22nF gate capacitor, the inrush current, charge,
and discharge times are: Case B: Fast Turn-On (With Current Limit)
In applications where the board capacitance (CBOARD)
is high, the inrush current causes a voltage drop across
RSENSE that exceeds the startup fast-comparator
threshold. The fast comparator regulates the voltage
across the sense resistor to VFC,TH. This effectively reg-
ulates the inrush current during startup. In this case,
the current charging CBOARD can be considered con-
stant and the turn-on time is:
tCVR
V
ON BOARD IN SENSE
FCTH
=××
,
IF
pF nF AmA
tnF V nC
Ams
tnF V nC
mA ms
tnF V nC
mA s
INRUSH
CHARGE
DISCHARGE
DISCHARGE STRONG
=µ
+×+=
=×+
µ=
=×+=
=×+ =
6
600 22 100 0 26 5
22 10 4 60
100 289
22 10 4 60
30 096
22 10 4 60
50 58
.
. .
. .
. .
()
µ
µ
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
20 ______________________________________________________________________________________
INY GATEY
INZ GATEZ
Q1
RSENSEY
SENSEY
RSENSEZ
SENSEZ
Q2
CBOARDZ
OUTY
CBOARDY
OUTZ
VY
C1
R1
VEN
VZ
ON
OFF
GND
MAX5927
MAX5929
ON
GND
VONY, TH
VONZ, TH
tDELAY
VEN
t1 = -R1C1 ln( )
VEN - VONY, TH
VEN
VON
VY
VZ
t0t1t2
t2 = -R1C1 ln( )
VEN - VONZ, TH
VEN
tDELAY = -R1C1 ln( )
VEN - VONY, TH
VEN - VONZ, TH
Figure 11. Power Sequencing: Channel Z Turns On tDELAY After Channel Y
The maximum inrush current in this case is:
Figure 6 shows the waveforms and timing diagrams for
a startup transient with current regulation (see the
Typical Operating Characteristics). When operating
under this condition, an external gate capacitor is
not required.
ON Comparators
The ON comparators control the on/off function of the
MAX5927/MAX5929. ON_ is also used to reset the fault
latch (latch mode). Pull VON_ low for 100µs, tUNLATCH,
to reset the shutdown latch. ON_ also programs the
UVLO threshold (see Figure 10). A resistive-divider
between VIN_, VON_, and GND sets the user program-
mable turn-on voltage. In power-sequencing mode, an
RC circuit can be used at ON_ to set the delay timing
(see Figure 11).
Using the MAX5927/MAX5929 on the
Backplane
Using the MAX5927/MAX5929 on the backplane allows
multiple cards with different input capacitance to be
inserted into the same slot even if the card does not
have on-board hot-swap protection. The startup period
can be triggered if IN_ is connected to ON_ through a
trace on the card (Figure 12).
Input Transients
The voltage at IN1, IN2, IN3, or IN4 must be above VUVLO
during inrush and fault conditions. When a short-circuit
condition occurs on the board, the fast comparator trips
cause the external MOSFET gates to be discharged at
50mA according to the mode of operation (see the Mode
section). The main system power supply must be able to
sustain a temporary fault current, without dropping below
the UVLO threshold of 2.45V, until the external MOSFET is
completely off. If the main system power supply collapses
below UVLO, the MAX5927/MAX5929 force the device to
restart once the supply has recovered. The MOSFET is
turned off in a very short time resulting in a high di/dt. The
backplane delivering the power to the external card must
have low inductance to minimize voltage transients
caused by this high di/dt.
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissi-
pate little power. The MOSFET RDS(ON) is low when the
MOSFET is fully enhanced. The power dissipated in nor-
mal operation is PD= ILOAD2x RDS(ON). The most
power dissipation occurs during the turn-on and turn-off
transients when the MOSFETs are in their linear regions.
Take into consideration the worst-case scenario of a
continuous short-circuit fault, consider these two cases:
1) The single turn-on with the device latched after a
fault: MAX5927 (LATCH = high or floating) or
MAX5929L.
2) The continuous autoretry after a fault: (MAX5927
(LATCH = low) or MAX5929A.
MOSFET manufacturers typically include the package
thermal resistance from junction to ambient (RθJA) and
thermal resistance from junction to case (RθJC), which
determines the startup time and the retry duty cycle (d
= tSTART/(tSTART + tRETRY). Calculate the required tran-
sient thermal resistance with the following equation:
where ISTART = VSU,TH/RSENSE.
ZTT
VI
JA MAX JMAX A
IN START
θ()
≤−
×
IV
R
INRUSH FCTH
SENSE
=,
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 21
Figure 12. Using the MAX5927/MAX5929 on a Backplane
ON_
IN_ GATE_
VIN VOUT
SENSE_
MAX5927
MAX5929
CBOARD
BACKPLANE
POWER
SUPPLY
REMOVABLE CARD
WITH NO HOT-INSERTION
PROTECTION
MAX5927/MAX5929
Layout Considerations
To take full tracking advantage of the switch response
time to an output fault condition, it is important to keep all
traces as short as possible and to maximize the high-cur-
rent trace dimensions to reduce the effect of undesirable
parasitic inductance. Place the MAX5927/MAX5929 close
to the card’s connector. Use a ground plane to minimize
impedance and inductance. Minimize the current-sense
resistor trace length (<10mm), and ensure accurate cur-
rent sensing with Kelvin connections (Figure 13).
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence, the
power dissipation across the switch increases, as does
the die temperature. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the MOSFET pack-
age on both sides of the board. Connect the two pads
to the ground plane through vias, and use enlarged
copper mounting pads on the topside of the board.
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
22 ______________________________________________________________________________________
MAX5927
MAX5929
GND
Q4
Q3
Q2
Q1
V1
ON1
ON2
ON3
ON4
GND
ON1
OUT1
OUT2
*MAX5927 ONLY.
**OPTIONAL COMPONENT.
OUT3
OUT4
1nF
16V
STAT1
STAT2
STAT3
STAT4
LIM4*
BIAS
TIM
MODE
POL*
LATCH*
LIM3*
LIM2*
LIM1*
IN4
IN3
IN2
IN1
SENSE4
SENSE3
SENSE2
SENSE1
GATE1
GATE2
GATE3
GATE4
ON2
ON3
ON4
REMOVABLE CARDBACKPLANE
V2
V3
V4
RSENSE1
RSENSE2
RSENSE3
RSENSE4
RLIM1** RLIM2** RLIM3** RLIM4** RLIM**
Typical Operating Circuit
Figure 13. Kelvin Connection for the Current-Sense Resistors
SENSE RESISTOR
HIGH-CURRENT PATH
MAX5927
MAX5929
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
______________________________________________________________________________________ 23
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
ON3
ON4
IN2
SENSE2IN1
ON1
ON2
MODE
TOP VIEW
GATE2
IN3
SENSE3
GATE3SENSE4
IN4
GATE1
SENSE1
16
15
14
13
9
10
11
12
GND
BIAS
STAT4
STAT3TIM
STAT2
STAT1
GATE4
QSOP
MAX5929
Pin Configurations (continued)
Selector Guide
PART CURRENT LIMIT FAULT MANAGEMENT STAT_ POLARITY
MAX5927ETJ Programmable Selectable Selectable
MAX5929LHEEG Fixed Latched Asserted high (open drain)
MAX5929LLEEG Fixed Latched Asserted low
MAX5929AHEEG Fixed Autoretry Asserted high (open drain)
MAX5929ALEEG Fixed Autoretry Asserted low
Chip Information
TRANSISTOR COUNT: 7704
PROCESS: BiCMOS
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
24 ______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QFN THIN.EPS
D2
(ND-1) X e
e
D
C
PIN # 1
I.D.
(NE-1) X e
E/2
E
0.08 C
0.10 C
A
A1 A3
DETAIL A
0.15 C B
0.15 C A
E2/2
E2
0.10 M C A B
PIN # 1 I.D.
b
0.35x45∞
L
D/2 D2/2
L
C
L
C
e e
L
CC
L
k
k
LL
E
1
2
21-0140
PACKAGE OUTLINE
16, 20, 28, 32, 40L, THIN QFN, 5x5x0.8mm
DETAIL B
L
L1
e
COMMON DIMENSIONS
3.353.15
T2855-1 3.25 3.353.15 3.25
MAX.
3.20
EXPOSED PAD VARIATIONS
3.00T2055-2 3.10
D2
NOM.MIN.
3.203.00 3.10
MIN.
E2
NOM. MAX.
NE
ND
PKG.
CODES
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1,
T2855-3 AND T2855-6.
NOTES:
SYMBOL
PKG.
N
L1
e
E
D
b
A3
A
A1
k
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
JEDEC
T1655-1 3.203.00 3.10 3.00 3.10 3.20
0.70 0.800.75
4.90
4.90
0.25
0.25
0
--
4
WHHB
4
16
0.350.30
5.10
5.105.00
0.80 BSC.
5.00
0.05
0.20 REF.
0.02
MIN. MAX.NOM.
16L 5x5
3.10
T3255-2 3.00 3.20 3.00 3.10 3.20
2.70
T2855-2 2.60 2.602.80 2.70 2.80
E
2
2
21-0140
PACKAGE OUTLINE
16, 20, 28, 32, 40L, THIN QFN, 5x5x0.8mm
L0.30 0.500.40
------
WHHC
20
5
5
5.00
5.00
0.30
0.55
0.65 BSC.
0.45
0.25
4.90
4.90
0.25
0.65
--
5.10
5.10
0.35
20L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
---
WHHD-1
28
7
7
5.00
5.00
0.25
0.55
0.50 BSC.
0.45
0.25
4.90
4.90
0.20
0.65
--
5.10
5.10
0.30
28L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
---
WHHD-2
32
8
8
5.00
5.00
0.40
0.50 BSC.
0.30
0.25
4.90
4.90
0.50
--
5.10
5.10
32L 5x5
0.20 REF.
0.75
0.02
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
-
40
10
10
5.00
5.00
0.20
0.50
0.40 BSC.
0.40
0.25
4.90
4.90
0.15
0.60
5.10
5.10
0.25
40L 5x5
0.20 REF.
0.75
NOM.
0
0.70
MIN.
0.05
0.80
MAX.
0.20 0.25 0.30
-
0.35 0.45
0.30 0.40 0.50
DOWN
BONDS
ALLOWED
NO
YES3.103.00 3.203.103.00 3.20T2055-3
3.103.00 3.203.103.00 3.20T2055-4
T2855-3 3.15 3.25 3.35 3.15 3.25 3.35
T2855-6 3.15 3.25 3.35 3.15 3.25 3.35
T2855-4 2.60 2.70 2.80 2.60 2.70 2.80
T2855-5 2.60 2.70 2.80 2.60 2.70 2.80
T2855-7 2.60 2.70 2.80 2.60 2.70 2.80
3.20
3.00 3.10T3255-3 3.203.00 3.10
3.203.00 3.10T3255-4 3.203.00 3.10
3.403.20 3.30T4055-1 3.20 3.30 3.40
NO
NO
NO
NO
NO
NO
NO
NO
YES
YES
YES
YES
YES
3.203.00T1655-2 3.10 3.00 3.10 3.20 YES
MAX5927/MAX5929
Low-Voltage, Quad, Hot-Swap
Controllers/Power Sequencers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25
©2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
QSOP.EPS
E
1
1
21-0055
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH