Allegro MicroSystems, LLC Conf idential Information A1338 Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs FEATURES AND BENEFITS DESCRIPTION * Contactless 0 to 360 angle sensor IC, for angular position and rotation direction measurement Circular Vertical Hall (CVH) technology provides a single-channel sensor system, with air gap independence * 12-bit resolution possible in Low RPM mode, 10-bit resolution in High RPM mode * Angle Refresh Rate (output rate) configurable between 25 and 3200 s through EEPROM programming Capable of sensing magnetic rotational speeds up to 7600 rpm, and up to 30,000 rpm with reduced accuracy * SPI (mode 3), and SENT (Single Edge Nibble Transmission) or PWM (Pulse-Width Modulation)* Continued on the next page... PACKAGES: 14-pin TSSOP (Suffix LE) 24-pin TSSOP (Suffix LE) Not to scale Single SoC Dual Independent SoCs The A1338 is a 0 to 360 angle sensor IC that provides contactless high-resolution angular position information based on magnetic circular vertical Hall (CVH) technology. It has a system-on-chip (SoC) architecture that includes: a CVH front end, digital signal processing, digital SPI, and SENT or PWM outputs. It also includes on-chip EEPROM technology, capable of supporting up to 100 read/write cycles, for flexible end of line programming of calibration and configuration parameters. The A1338 is ideal for automotive applications requiring 0 to 360 angle measurements, such as electronic power steering (EPS), seatbelt motor position systems, rotary PRNDLs, and throttle systems. The A1338 was designed with safety-critical application requirements in mind. It includes user-controlled on-chip logic built-in self-test (LBIST) and full signal path diagnostics to enable customers to determine if the IC is operating in a proper manner. The A1338 supports a Low RPM mode for slower rate applications and a High RPM mode for high-speed applications. High RPM mode is for applications that require higher refresh rates to minimize error due to latency. Low RPM mode is for applications that require higher resolution operating at lower angular velocities. The A1338 is available in single-die 14-pin TSSOP and a dual-die 24-pin TSSOP. Both packages are lead (Pb) free with 100% matte-tin leadframe plating. A1338 BYP1_1 BYP2_1 VCC_1 (also Programming) SoC die 1 To all internal circuits Regulator EEPROM ECC Error Detection / Correction GNDA_1 GNDD_1 CVH Self-Test CVH Self-Test Control Amplifier ADC Bandpass Filter PWM or SENT Interface Angle Detect PWM_1/SENT_1 Temp Sensor Multi-Segment Circular Vertical Hall ADC Digital Processing CS_1/ID0_1 MISO_1 MOSI_1 SCLK_1/ID1_1 BIAS_1 SPI Interface with 4-bit CRC Adjustable Rotational Discontinuity Direction Point (0 Angle) CW /CCW Data Registers BYP1_2 BYP2_2 VCC_2 GNDA_2 GNDD_2 CS_2/ID0_2 MISO_2 MOSI_2 SCLK_2/ID1_2 BIAS_2 TC Segment Processing SoC die 2 PWM_2/SENT_2 A1338 Magnetic Circuit and IC Diagram A1338LLE-DS, Rev. 3 MCO-0000279 April 4, 2018 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 FEATURES AND BENEFITS (continued) SPI interface provides a robust communication protocol for fast angle readings* SENT output supports four modes: SAEJ2716 (JAN2010) and Allegro proprietary options of Triggered SENT (TSENT), Sequential SENT (SSENT), and Addressable SENT (ASENT)* Programmable via Manchester Encoding on the VCC line, reducing external wiring* SPI and SENT interfaces allows use of multiple independent sensors for applications requiring redundancy* * Advanced diagnostics to support safety-critical applications, including: * EEPROM with Error Correction Control (ECC) configuration, sensor calibration including end-of line adjustments like programmable angle reference (0) position and rotation direction (CW or CCW) * Available in both single-die and dual-die configurations Dual-die devices contain two independent die housed within a single package * Absolute maximum VCC of 26.5 V for increased robustness and direct connection to automotive vehicle battery * See Selection Guide for more details. On-chip, user-controlled logic built-in self-test (LBIST) and signal path diagnostics 4-bit CRC on SPI messages User-Programmable Missing Magnet Error flag for notifying controller of low magnetic field level * Diagnostics are initiated over the SPI or SENT interface and can directly test proper operation of the IC in safety-critical applications SELECTION GUIDE [1] Part Number System Die Output Protocols Package Packing [1] A1338LLETR-DD-T Dual SPI and SENT 24-pin TSSOP 4000 pieces per 13-in. reel A1338LLETR-P-DD-T Dual SPI and PWM 24-pin TSSOP 4000 pieces per 13-in. reel A1338LLETR-T Single SPI and SENT 14-pin TSSOP 4000 pieces per 13-in. reel A1338LLETR-P-T Single SPI and PWM 14-pin TSSOP 4000 pieces per 13-in. reel Contact AllegroTM for additional packing options. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Allegro MicroSystems, LLC Conf idential Information A1338 Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs Table of Contents Features and Benefits............................................................ 1 Description........................................................................... 1 Packages............................................................................. 1 A1338 Magnetic Circuit and IC Diagram................................... 1 Selection Guide.................................................................... 2 Specifications....................................................................... 4 Absolute Maximum Ratings................................................. 4 Thermal Characteristics...................................................... 4 Typical Application Diagram.................................................... 4 Pinout Diagrams and Terminal List.......................................... 5 Functional Block Diagram...................................................... 6 Operating Characteristics....................................................... 7 Functional Description......................................................... 10 Overview........................................................................ 10 Angle Measurement......................................................... 10 Impact of High Speed Sensing.......................................... 10 Angle Resolution and Representation..................................11 Programming Modes........................................................ 12 SPI System-Level Timing.................................................. 12 Power-Up....................................................................... 12 PWM Output ("-P" option)................................................. 12 Error Reporting in PWM.................................................... 12 Manchester Serial Interface.................................................. 13 Entering Manchester Communication Mode........................ 13 Transaction Types............................................................ 13 Writing to EEPROM......................................................... 13 Manchester Interface Reference........................................ 14 SENT Output Mode.......................................................... 15 Diagnostics..................................................................... 18 Serial Interface Structure...................................................... 19 Application Information........................................................ 25 Serial Interface Description............................................... 25 Calculating Target Zero-Degree Angle................................ 25 Bypass Pins Usage.......................................................... 25 Changing Sampling Modes............................................... 26 Magnetic Target Requirements.......................................... 26 Redundant Applications and Alignment Error....................... 27 System Timing and Error.................................................. 27 Characteristic Performance Data.......................................... 28 EMC Reduction.................................................................. 30 Package Outline Drawings................................................... 31 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Rating Unit Forward Supply Voltage Characteristic Symbol VCC Not sampling angles Notes 26.5 V Reverse Supply Voltage VRCC Not sampling angles -18 V All Other Pins Forward Voltage VIN 5.5 V All Other Pins Reverse Voltage VR 0.5 V Operating Ambient Temperature TA -40 to 150 C Maximum Junction Temperature TJ(max) 165 C Tstg -65 to 170 C Storage Temperature L range THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information Characteristic Symbol Package Thermal Resistance [1] Additional Test Conditions [1] RJA Value Unit LE-24 package 117 C/W LE-14 package 82 C/W thermal information available on the Allegro website. VCC 0.1 F 0.1 F BYP1_1 Host Microprocessor 0.1 F 0.1 F BYP2_1* VCC_1 VCC_2 CS_1 SCLK_1 MOSI_1 MISO_1 BIAS_1 BYP1_2 BYP2_2* PWM_1/SENT_1 A1338 CS_2 SCLK_2 MOSI_2 MISO_2 BIAS_2 GNDA_1 0.1 F PWM_2/SENT_2 GNDA_2 GNDD_1 GNDD_2 Typical Application Diagram (dual-die version) Either or both internal SoCs can be operated simultaneously. (See "EMC Reduction" Section for application circuits that require a higher level of EMC immunity.) *Secondary bypass capacitors only required when using Elevated SPI Output Voltage. Contact Allegro for availability. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 PINOUT DIAGRAMS AND TERMINAL LIST BYP1_1 1 14 GNDD_1 GNDD_1 2 13 CS_1/ID0_1 GNDA_1 3 12 MOSI_1 SENT_1/PWM_1 4 11 SCLK_1/ID1_1 VCC_1 5 10 MISO_1 NC NC 6 9 7 8 1 24 GNDD_1 2 23 CS_1/ID0_1 22 MOSI_1 GNDA_1 3 SENT_1/PWM_1 4 21 SCLK_1/ID1_1 VCC_1 5 20 MISO_1 BIAS_2 6 19 BYP2_1 BYP2_2 7 18 BIAS_1 MISO_2 8 17 VCC_2 SCLK_2/ID1_2 9 16 SENT_2/PWM_2 MOSI_2 10 BYP2_1 CS_2/ID0_2 11 BIAS_1 14-Pin TSSOP LE Package Pinouts BYP1_1 GNDD_1 GNDD_2 12 15 GNDA_2 14 GNDD_2 13 BYP1_2 24-Pin TSSOP LE Package Pinouts Terminal List Table Pin Name Pin Number LE-14 Function LE-24 BYP1_1 1 1 External Bypass Capacitor Terminal for Internal Regulator (die 1) BYP2_1 9 19 External Bypass Capacitor Terminal for Internal Regulator (die 1) BYP1_2 - 13 External Bypass Capacitor Terminal for Internal Regulator (die 2) BYP2_2 - 7 External Bypass Capacitor Terminal for Internal Regulator (die 2) CS_1 /ID0_1 13 23 CS_2 /ID0_2 - 11 Option 1: SPI Chip Select Terminal, Active Low Input(die 1) Option 2: ID0 bit to indicate Slave Address for SSENT or ASENT communication modes only (die 1) Option 1: SPI Chip Select Terminal, Active Low Input(die 2) Option 2: ID0 bit to indicate Slave Address for SSENT or ASENT communication modes only (die 2) GNDA_1 3 3 Device Analog Ground Terminal (die 1) GNDA_2 - 15 Device Analog Ground Terminal (die 2) GNDD_1 2, 14 2, 24 Device Digital Ground Terminal (die 1) GNDD_2 - 12, 14 Device Digital Ground Terminal (die 2) MISO_1 10 20 SPI Master Input/Slave Output (die 1) MISO_2 - 8 SPI Master Input/Slave Output (die 2) MOSI_1 12 22 SPI Master Output Slave Input (die 1) MOSI_2 - 10 SLCK_1/ID1_1 11 21 SCLK_2/ID1_2 - 9 SPI Master Output Slave Input (die 2) Option 1: SPI Clock Terminal (die 1) Option 2: ID1 bit to indicate Slave Address for SSENT or ASENT communication modes only (die 1) Option 1: SPI Clock Terminal (die 2) Option 2: ID1 bit to indicate Slave Address for SSENT or ASENT communication modes only (die 2) SENT_1/PWM_1 4 4 SENT Output (Die1); PWM Output (Die1); SENT for A1338LLETR-DD-T, A1338LLETR-T; PWM for A1338LLETR-P-DD-T, A1338LLETR-P-T SENT_2/PWM_2 - 16 SENT Output (Die2); PWM Output (Die2); SENT for A1338LLETR-DD-T, A1338LLETR-T; PWM for A1338LLETR-P-DD-T, A1338LLETR-P-T BIAS_1 8 18 Bias Connection; connect to ground or pull up to 3.3 V (die 1) VCC_1 5 5 Power Supply (die 1); also used for EEPROM Programming VCC_2 - 17 Power Supply (die 2); also used for EEPROM Programming BIAS_2 - 6 Bias Connection; connect to ground or pull up to 3.3 V (die 2) NC 6, 7 - Not internally connected; tie to GNDD Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 A1338 BYP1_1 BYP2_1 VCC_1 (also Programming) SoC die 1 Regulator To all internal circuits EEPROM ECC Error Detection / Correction GNDA_1 GNDD_1 CVH Self-Test CVH Self-Test Control Amplifier ADC Bandpass Filter PWM or SENT Interface Angle Detect PWM_1/SENT_1 Temperature Sensor Multi-Segment Circular Vertical Hall ADC Digital Processing CS_1/ID0_1 MISO_1 MOSI_1 SCLK_1/ID1_1 SPI Interface with 4-bit CRC Adjustable Rotational Discontinuity Direction Point CW/CCW (0 Angle) Data Registers TC Segment Processing BIAS_1 BYP1_2 BYP2_2 VCC_2 GNDA_2 GNDD_2 CS_2/ID0_2 MISO_2 MOSI_2 SCLK_2/ID1_2 BIAS_2 SoC die 2 PWM_2/SENT_2 Functional Block Diagram Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 OPERATING CHARACTERISTICS: Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] 3.7 - 16 V ELECTRICAL CHARACTERISTICS Supply Voltage VCC Supply Current ICC Undervoltage Lockout Threshold Voltage [3] VCC Low Flag Threshold [4] Supply Zener Clamp Voltage Reverse-Battery Current Power-On Time [5] Each die, TA = 150C - 8.25 10 mA VUVLOHI Maximum VCC , dV/dt = 1V/ms, TA = 25C - - 3.6 V VUVLOLOW Maximum VCC , dV/dt = 1V/ms, TA = 25C VUVLOTH VZSUP Voltage [6] Bypass2 Pin Output (Elevated SPI Output Mode) - V 3.9 V 26.5 40 - V -5 - 0 mA - 300 - s VBYP1 TA = 25C, CBYP = 0.1 F 2.5 2.7 2.9 V VBYP2 TA = 25C, CBYP2 = 0.1 F; Contact Allegro for availability 2.9 3.1 3.3 V tPO Bypass1 Pin Output Voltage [6] - - VRCC = -18 V, TA = 25C IRCC ICC = ICC(AWAKE) + 3 mA, TA = 25C 2.9 3.5 SPI INTERFACE SPECIFICATIONS Digital Input High Voltage [7] VIH MOSIx, SCLKx, CSx pins 2.4 - 5.5 V Digital Input Low Voltage [7] VIL MOSIx, SCLKx, CSx pins - - 0.5 V CSx Pin Input Bias Current IBIAS VCSx = 3.3 V - 15 - A SPI Output High Level VOH1 MISOx pins, CL = 20 pF, CBYP1 = 0.1 F, CBYP2 grounded 2.5 2.7 2.9 V SPI Output High Level (Elevated SPI Output Mode) VOH2 MISOx pins, CL = 20 pF, CBYP1 = 0.1 F, CBYP2 = 0.1 F. Contact Allegro for availability. 2.9 3.1 3.3 V SPI Output Low Voltage VOL MISOx pins, CL = 20 pF - 0.3 - V SPI Clock Frequency [7] fSCLK MISOx pins, CL = 20 pF 0.1 - 10 MHz SPI Clock Duty Cycle [7] DfSCLK SPICLKDC, 5 V compliant 40 - 60 % tSPI 5 V compliant 5.8 - 588 kHz Chip-Select to First SCLK Edge [7] tCS Time from CSx going low to SCLKx falling edge 50 - - ns Data Output Valid Time [7] tDAV Data output valid after SCLKx falling edge - - 40 ns MOSI Setup Time [7] tSU Input setup time before SCLKx rising edge 25 - - ns MOSI Hold Time [7] tHD Input hold time after SCLKx rising edge 50 - - ns tCHD Hold SCLKx high time before CSx rising edge 5 - - ns Loading on digital output (MISOx) pin with SPI Clock Frequency = 10 MHz - - 20 pF SPI Frame Rate [7] SCLK to CS Hold Time [7] Capacitive Load [7] CL Continued on the next page... Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] PWM Frequency Code = 00 - 122 - Hz PWM Frequency Code = 01 - 1.024 - kHz PWM Frequency Code = 10 - 2.048 - kHz PWM INTERFACE SPECIFICATIONS (A1338LLETR-P-DD-T and A1338LLETR-P-T variants only) PWM Carrier Frequency fPWM PWM Duty Cycle Minimum DPWM(min) - 5 - % PWM Duty Cycle Maximum DPWM(max) - 95 - % VPWM(L) PWM Output Signal [8] VPWM(H) Maximum Sink Current ILIMIT 5 k Rpullup 50 k - - 0.2 V 2 k Rpullup < 5 k - - 0.4 V Minimum Rpullup = 2 k 0.9 x VS - - V Maximum Rpullup = 50 k 0.7 x VS - - V - 30 - mA -10 - 10 % Output FET on, TA = 25C PWM Carrier Frequency Tolerance [7] - Deviation from expected fPWM PWM Resolution - 12-bit angle value 0.022 - %DC/LSB 1, TA = 25C, fPWM = 2 kHz 0.18 - Hz PWM Frequency Jitter PWM Duty Cycle Jitter PWM Thermal Duty Cycle Drift [7] fPWM(JITTER) DPWM(JITTER) 1, TA = 25C, fPWM = 1 kHz 0.11 - Hz 1, TA = 25C, fPWM = 124 Hz 0.01 - Hz 3, 300 G, TA = 25C, no AVG 0.095 - %DC 3, 300 G, fPWM = 2 kHz, AVG = 0x4 or greater 0.095 - %DC 3, 300 G, fPWM = 1 kHz, AVG = 0x5 or greater 0.03 - %DC 3, 300 G, fPWM = 124 Hz, AVG = 0x7 0.027 - %DC -0.35 - 0.35 %DC Tick time = 3 s - - 1 ms Tick time = 0.5 s, 3 data nibbles, SCN, and CRC, nibble length = 27 ticks - 96 - s DPWM(THDRIFT) Change in duty cycle from 25C to 150C; 300 G SENT PROTOCOL SPECIFICATIONS (A1338LLETR-DD-T and A1338LLETR-T variants only) SENT Message Duration Minimum Programmable SENT Message Duration tCVHST tSENTMIN 5 k Rpullup 50 k - - 0.2 V 2 k Rpullup < 5 k - - 0.4 V Minimum Rpullup = 2 k 0.9 x VS - - V Maximum Rpullup = 50 k 0.7 x VS - - V VSENTtrig(L) - - 1.4 V VSENTtrig(H) 2.8 - - V Tick time = 0.5 s, 3 data nibbles, SCN, and CRC, nibble length = 27 ticks 2 - - s VSENT(L) SENT Output Signal [7] VSENT(H) SENT Output Trigger Signal Minimum Time Frame for SENT Trigger Signal tSENTMIN Triggered Delay Time tdSENT From end of trigger pulse to beginning of SENT message frame. TSENT (SENT_MODE 3 and SENT_MODE 4) - 7 - tick Maximum Sink Current ILIMIT Output FET on, TA = 25C - 30 - mA - 23 - ms - 10 - ms DIAGNOSTIC SPECIFICATIONS CVH Self-Test Time tUI_DIAG Logic BIST Coverage vs. Time tLBISTXX 70% Coverage Continued on the next page... Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] EEPROM PROGRAMMING PULSES tPULSE(H) Time above minimum pulse voltage 8 10 11 ms Rise Time tr 10% to 90% of minimum pulse level 300 - - s Fall Time tf 10% to 90% of minimum pulse level 60 - - s Applied on VCC line 18 19 19.5 V 0.002 - 50 ms - - 1500 Gpp - 12 - bit B = 300 G, TA = 25C, ORATE = 0 - 11.59 - bit High RPM mode - 25 - s Low RPM mode, AVG = 011 (varies with AVG mode, refer to the appendix Programming Reference) - 200 - s Low RPM mode (see Figure 4) - 60 - s TA = 25C, ideal magnet alignment, B = 300 G, target rpm = 0 - 0.5 - degrees TA = 150C, ideal magnet alignment, B = 300 G, target rpm = 0 -1.3 - 1.3 degrees TA = 25C, B = 300 G, 3 sigma noise, no internal filtering - 0.35 - degrees TA = 150C, no internal filtering, B = 300 G, 3 sigma noise, target rpm = 0 - 0.55 - degrees TA = 150C, B = 300 G -1.4 - 1.4 degrees TA = -40C, B = 300 G - 1 - degrees B = 300 G, typical maximum drift observed after AEC-Q100 qualification testing - 0.5 - degrees Pulse High Time Pulse Voltage VPULSE Separation Time tPULSE(f-r) Timing between first pulse dropping below 6 V and 2nd pulse rising above 6 V MAGNETIC CHARACTERISTICS Magnetic Field B Range of input field ANGLE CHARACTERISTICS Digital Output Word Length [8] Effective RESANGLE Resolution [9] Angle Refresh Rate [10] tANG Response Time tRESPONSE Angle Error ERRANG Angle Noise NANG Temperature Drift ANGLEDRIFT ANGLEDRIFT- Angle Drift Over Lifetime LIFE [1] Typical data is at TA = 25C and VCC = 5 V, and it is for design estimates only. G (gauss) = 0.1 mT (millitesla). [3] At power-on, a die will not respond to commands until V CC rises above VUVLOHI. After that, the die will perform and respond normally until VCC drops below VUVLOLOW . [4] VCC Low Threshold Flag will be sent via the SPI interface as part of the angle measurement. [5] During the power-on time period, the A1338 SPI transactions are not guaranteed. [6] The output voltage and current specifications are to aid in PCB design. The pin is not intended to drive any external circuitry. The specifications indicate the peak capacitor charging and discharging currents to be expected during normal operation. [7] Parameter is not guaranteed at final test. Determined by design. [8] RES ANGLE represents the number of bits of data available for reading from the die registers. [9] Effective Resolution is calculated using the formula below: [2] 1 log2(360) - log2 [10] The ( ) 1 n Magnet Position Position 1 Position 2 t Response Time Sensor Output Output 1 Output 2 n i=1 i rate at which a new angle reading will be ready. Def inition of Response Time Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com t 9 Allegro MicroSystems, LLC Conf idential Information A1338 Overview Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs FUNCTIONAL DESCRIPTION The A1338 is a rotary position Hall-sensor-based device. It incorporates up to two electrically independent Hall-based sensor dies in the same surface-mount package to provide solid-state consistency and reliability, and to support a wide variety of automotive applications. Each Hall-sensor-based die measures the direction of the magnetic field vector through 360 in the x-y plane (parallel to the branded face of the device) and computes an angle measurement based on the actual physical reading, as well as any internal configuration parameters that have been set by the user. The output of each die is used by the host microcontroller to provide a single channel of target data. This device is an advanced, programmable system-on-chip (SoC). Each integrated circuit includes a circular vertical Hall (CVH) analog frontend, a high-speed sampling A-to-D converter, digital filtering, digital signal processing, and an SPI, SENT, or PWM output of the processed angle data. Angle Measurement The A1338 can monitor the angular position of a rotating magnet at speeds ranging from 0 to more than 7600 rpm. At lower rotational speeds, the A1338 is able to measure angle data with minimal angular latency between the actual magnet and sensor output. As the rpm increases, the angular latency between the magnet and sensor output also increases. Above 7600 rpm, the A1338 continues to provide angle data; however, the accuracy is proportionally reduced. The A1338 can be configured to operate in two angular measurement modes of operation: Low RPM mode, and High RPM mode. Low RPM mode allows a programmable number of internal angle samples to be accumulated and averaged, providing greater resolution while reducing the update rate. This is suitable for lower rpm applications (0 to 500 rpm). For high-speed applications, the averaging function may be bypassed by operating in High RPM mode. The actual update rate of Low RPM mode can be changed by setting the AVERAGING bits in the EEPROM (see the appendix Programming Reference for details). Table 1 describes the different levels of averaging available in Low RPM mode. A setting of 0002 is equivalent to High RPM mode. Table 1: Refresh Rate Based on Quantity of Samples Averaged AVG [2:0] Quantity of Samples Averaged Refresh Rate (s) 000 1 25 001 2 50 010 4 100 011 8 200 100 16 400 101 32 800 110 64 1600 111 128 3200 The A1338 has a typical output bandwidth of 40 kHz (25 s refresh rate) in High RPM mode. In High RPM mode, a new angle measurement is available at the internal angle output register to be transmitted over the SPI/SENT or PWM output ports every 25 s. There is a latency of 60 s from when there is a change in the position of the target magnet field to when the new representative angle is updated in the internal angle output register. This latency effectively represents the age of the angle measurement. Impact of High-Speed Sensing Due to signal path latency, the angle information is delayed by tRESPONSE. This delay equates to a greater angle value as the rotational velocity increases (i.e. a magnet rotating at 20,000 rpm traverses twice as much angular distance in a fixed time period as a magnet rotating at 10,000 rpm), and is referred to as angular lag. The lag is directly proportional to rpm, and may be compensated for externally, if the velocity is known. Angular lag can be expressed using the following equation: Angle_Lag = (rpm x 6) / (16 x tRESPONSE) (1) where rpm represents the rotational velocity of the magnet, Angle_lag is expressed in degrees, and tRESPONSE is in s. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 so when High RPM mode is selected, the effective range of resolution is 8 to 10 bits (from lower to higher field intensities), and in Low RPM mode, the effective range is 11 to 12 bits, depending on field strength and AVG selection. 4 Angle Lag (degrees) 3.5 3 Regardless of the field intensity and mode selection, the transmission protocol and number formatting remains the same. The MSB is always transmitted first. The entire number should be read. 2.5 2 1.5 The Output Angle is always calculated at maximum resolution. To be more explicit, when reading the digital angle value: 1 0.5 0 AngleOUT = 360 () x D[12:0] / (213) 0 2,000 4,000 6,000 RPM 8,000 10,000 12,000 Figure 1: Angle Lag versus RPM, 60 s Response Time Angle Resolution and Representation In addition to using the internal averaging of the sensor, angle resolution is also dependent on the intensity (B, in gauss) of the applied magnetic field from the target. At lower intensities, a reduced signal-to-noise ratio will cause one or two LSBs to change state randomly due to noise. These factors work together, (2) This formula is always true, regardless of the applied field intensity. What changes with the field and speed setting is how "quiet" the LSBs of the measurement data (D 12:x) will be. It should be noted that the secondary die (E2) is rotated 180 relative to the primary die (E1). This results in a difference in measurement of approximately 180 between the two dies, given perfect alignment of each die to the target magnet. This phenomenon can be counteracted by subtracting the offset using a microprocessor. Alternatively, the difference between the two dies can be compensated for using the EEPROM for setting the Reference Angle. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs The A1338 wakes up in a default state that sets all SPI registers to their default value. It is important to note that, regardless of the state of the device before a power cycle, the device will re-power with default values. For example, on every power-up, the device will power up in the mode set in the EEPROM bit RPM. The state of the EEPROM is unchanged. PWM Output ("-P-" option) The A1338LLETR-P-DD-T and A1338LLETR-P-T options provide a pulse-width-modulated output with duty cycle proportional to the measured angle. The PWM duty cycle ranges between 5% (corresponding to 0 angle) and 95% (corresponding to 360 angle). The 0% and 100% (Pulled Low and Pulled High) states D0T D1T D2T D3T D4T D5T D6T D7T D8T D9T D10T D(x) = tpulse(x) / Tperiod tpulse(5) Tperiod 0T 1T 2T 3T 4T 5T 6T 7T 8T 9T 10T 11T Time Figure 2: PWM mode outputs a duty-cycle-based waveform that can be read by the external controller as a cumulatively changing continuous voltage. Within each cycle, the output is high for the first 5% of the period. The middle 90% of the period is a linear interpolation of the angle as samples at the beginning of the PWM period. PWM Period Power-Up (0 Degrees) PWM Period PWM Period 5 % LOW 5 % HIGH Upon applying power to the A1338, the device automatically runs through an initialization routine. The purpose of this initialization is to ensure that the device comes up in the same predictable operating condition every power cycle. This initialization routine takes a finite amount of time to complete, which is referred to as Power-On Time, tPO . CLAMP_LOW 0 360 Degrees 5 % LOW 5 % HIGH * Best case: 1.5 SPI cycles; 2 s, assuming a 10 MHz SPI clock D = 95% 120 Degrees PWM Period 240 Degrees 5 % LOW 5 % HIGH * Worst case: 2 CVH cycle + 2 SPI cycles D = 50% CLAMP_HIGH 5 % LOW 5 % HIGH The A1338 outputs a new angle measurement every tANG s. In High RPM mode, the A1338 outputs a new angle measurement every tANG s, with an effective resolution of 10 bits. There is, however, a latency of tLAT , from when the rotating magnet is sampled by the CVH to when the sampled data has been completely transmitted over the SPI interface. Because an SPI interface Read command is not synchronous with the CVH timing, but instead is polled by the external host microcontroller, the latency can vary. For single back-to-back SPI transactions (first transaction is sending the Read register 0x0 command, second is retrieving the angle data) the following scenarios are possible: D = 5% 360 5 % LOW 5 % HIGH SPI System-Level Timing Magnetic Field Angle () The EEPROM can be programmed through the dedicated SPI interface pins or via Manchester encoding on the VCC pin, allowing process coefficients to be entered and options selected. (Note: programming EEPROM also requires the VCC line to be pulsed, which could adversely affect other devices if powered from the same line). The EEPROM provides persistent storage at end of line for final parameters. are reserved for error condition notifications. PWM Waveform (V) Programing Modes 5 % LOW 5 % HIGH A1338 Figure 3: Pulse-Width Modulation (PWM) Examples The angle is represented in 12-bit resolution and can never reach exactly 360. The maximum duty cycle high period is: DutyCycleMax (%) = (4095 / 4096) x 90 + 5 . Error Reporting in PWM The PWM output will tristate when any unmasked error is present (see ERR and ERR2 register descriptions). Error flags are masked via bits within EEPROM 0x1E. By default, the BATD error mask is set in EEPROM for all PWM output ICs. This prevents the PWM output from tristating on power-on. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 Allegro MicroSystems, LLC Conf idential Information A1338 Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs MANCHESTER SERIAL INTERFACE To facilitate addressable device programming when using the unidirectional SENT output mode with no need for additional wiring, the A1338 incorporates a serial interface on the VCC line. (Note: The A1338 may be programmed via the SPI interface, with additional wiring connections. For detailed information on part programming, refer to the A1338 programming manual). This interface allows an external controller to read and write registers in the A1338 EEPROM and volatile memory. The device uses a point-to-point communication protocol, based on Manchester encoding per G.E. Thomas (a rising edge indicates a 0 and a falling edge indicates a 1), with address and data transmitted MSB first. The addressable Manchester code implementation uses the logic states of the SA0 (SPI CS pin) / SA1 (SPI SCLK pin) to set address values for each die. In this way, individual communication with up to four A1338 dies is possible. To prevent any undesired programming of the A1338, the serial interface can be disabled by setting the Disable Manchester bit (0x19 bit 18) to a 1. With this bit set, the A1338 will ignore any Manchester input on VCC. Entering Manchester Communication Mode Transaction Types As shown in Figure 4, the A1338 receives all commands via the VCC pin, and responds to Read commands via the SENT pin. This implementation of Manchester encoding requires the communication pulses be within a high (VMAN(H)) and low (VMAN(L)) range of voltages on the VCC line. Writing to EEPROM is supported by two high-voltage pulses on the VCC line. Each transaction is initiated by a command from the controller; the A1338 does not initiate any transactions. Two commands are recognized by the A1338: Write and Read. Writing to EEPROM When a Write command requires writing to non-volatile EEPROM, after the Write command, the controller must also send two Programming pulses, high-voltage strobes via the VCC pin. These strobes are detected internally, allowing the A1338 to boost the voltage on the EEPROM gates. Refer to the programming manual for specifics on sensor programming and protocol details. Provided the Disable Manchester bit is not set in EEPROM, the A1338 continuously monitors the VCC line for valid Manchester commands. The part takes no action until a valid Manchester Access Code is received. There are two special Manchester code commands used to activate or deactivate the serial interface and specify the output format used during Read operations: 1. Manchester Access Code: Enters Manchester Communication Mode; Manchester code output on the SENT pin. 2. Manchester Exit Code: Returns the SENT pin to normal (angle data) output format. Once the Manchester Communication Mode is entered, the SENT output pin will cease providing angle data, interrupting any data transmission in progress. Write/Read Command Manchester Code ECU VCC A1338 SENT Read Manchester Code GND Figure 4: Top-Level Programming Interface Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Manchester Interface Reference Table 2: Manchester Interface Protocol Characteristics [1] Characteristics Symbol Note Min. Typ. Max. Unit Defined by the input message bit rate sent from the external controller 4 - 50 kbps INPUT/OUTPUT SIGNAL TIMING Bit Rate Bit Time tBIT Bit Time Error Write Delay errTBIT tWRITE(E) Data bit pulse width at 4 kbps 243 250 257 s Data bit pulse width at 100 kbps 9.5 10 10.5 s Deviation in tBIT during one command frame -11 - +11 % VCC < 6.0 V - - - 1/4 x tbit - 3/4 x tbit s Required delay from the end of the second EEPROM Program pulse to the leading edge of a following command frame Delay from the trailing edge of a Read tSTART_READ command frame to the leading edge of the Read Acknowledge frame Read Delay EEPROM PROGRAMMING PULSE EEPROM Programming Pulse Setup Time tsPULSE(E) Delay from last bit cell of write command to start of EEPROM programming pulse 40 - - s Pulse High Time tPULSE(H) Time above minimum pulse voltage 8 10 11 ms tr 10% to 90% of minimum pulse level 300 - - s tf 10% to 90% of minimum pulse level 60 - - s Applied on VCC Line 18 19 19.5 V 0.002 - 50 ms Rise Time Fall Time Pulse Voltage VPULSE tPULSE(f-r) Timing between first pulse dropping below 6 V and 2nd pulse rising above 6 V Manchester Code High Voltage VMAN(H) Applied to VCC line 7.8 - - V Manchester Code Low Voltage VMAN(L) Applied to VCC line - - 6.3 V Minimum Rpullup = 5 k 0.9 x VS - - V Maximum Rpullup = 50 k 0.7 x VS - - V - - 0.2 V Separation Time INPUT SIGNAL VOLTAGE OUTPUT SIGNAL VOLTAGE (APPLIED ON SENT LINE) Manchester Code High Voltage VMAN(H) Manchester Code Low Voltage VMAN(L) [1] Determined 5 k Rpullup 50 k by design. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 SENT Output Mode Angle () The SENT frame may be configured via EEPROM. The A1338 may operate in one of three broadly defined SENT modes (see the A1337/8 Programming Manual for details on SENT modes and settings). * SAE J2716 SENT: Free-streaming SENT frame in accordance with industry specification. * Triggered SENT (TSENT): User-defined sampling and retrieval. * Shared SENT: Allows multiple devices to share a common SENT line. Devices may either be directly addressed (Addressable SENT or ASENT) or sequentially polled (Sequential SENT or SSENT). 4095 (1111 1111 1111) 2048 (1000 0000 0000) 0000 (0000 0000 0000) SENT Data Value (LSB) (A1338LLETR-DD-T, A1338LLETR-T options) The SENT output converts the measured magnetic field angle to a binary value mapped to the Full-Scale Output (FSO) range of 0 to 4095, shown in Figure 5. This data is inserted into a binary pulse message, referred to as a frame, that conforms to the SENT data transmission specification (SAEJ2716 JAN2010). Figure 5: Angle is represented as a 12-bit digital value. VCC 5 V Max Sensor ID = 0 Sensor ID = 1 Sensor ID = 2 Host (ECU) Sensor ID = 3 R C Bus Capacitance Figure 6: Allegro's proprietary SENT protocol allows multiple parts to share one common output bus. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 The duration of a nibble is denominated in ticks. The period of a tick is set by the C_TICK_TIME parameter. The duration of the nibble is the sum of the low-voltage interval plus the high-voltage interval. SENT MESSAGE STRUCTURE Data within a SENT message frame is represented as a series of nibbles, with the following characteristics: * Each nibble is an ordered pair of a low-voltage interval followed by a high-voltage interval. * The low-voltage interval acts as the delimiting state which acts as a boundary between each nibble. The length of this lowvoltage interval is fixed at 5 ticks. * The high-voltage interval performs the job of the information state and is variable in duration in order to contain the data payload of the nibble. * The slew rate of the falling edge may be adjusted using the C_SENT_DRIVE parameter. 0 5 12 0 Ticks 5 27 The parts of a SENT message are arranged in the following required sequence (see Figure 8): 1. Synchronization and Calibration: Flags the start of the SENT message. 2. Status and Communication Nibble: Provides A1338 status and the optional serial data determined by the setting of the SENT_SERIAL parameter. 3. Data: Angle information and optional data. 4. CRC: Error checking. 5. Pause Pulse (optional): Fill pulse between SENT message frames. Table 3: Nibble Composition and Value Ticks Quantity of Ticks Total Binary (4-bit) Value Decimal Equivalent Value 7 12 0000 0 5 8 13 0001 1 5 9 14 0002 2 Figure 7: General Value Formation for SENT 5 21 26 1110 14 0000 (left), 1111 (right) 5 22 27 1111 15 Message Signal Voltage Message Signal Voltage Low High Interval Interval Low Interval Nibble Data Value = 0000 HighVoltage Interval 5 High Interval Nibble Data Value = 1111 SENT_FIXED SENT_FIXED 56 ticks Nibble Name LowVoltage Interval Synchronization and Calibration SENT_FIXED 12 to 27 ticks Status and Communication 12 to 27 ticks Data 1 (MSB) SENT_FIXED SENT_FIXED SENT_FIXED 12 to 27 ticks 12 to 27 ticks Data 6 CRC Pause Pulse (optional) tSENT Figure 8: General Format for SENT Message Frame Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Table 4: EEPROM Registers Map Table with Defaults (Factory-Reserved Registers Not Shown) [1] EADR State 0x17 SENT_CFG 0x18 CUST_CFG1 0x19 CUST_CFG2 0x1E ERM 0x1F CUST2 [1] Bits 23 22 21 20 19 18 ZS SS SM PO IS RES LOCK RES CIS PWM_F DA RES RES 17 16 MAXID MAND 15 SCN_MODE SCRC NS RPMD 14 13 12 DATA_MODE 11 10 9 8 7 6 SENT_MODE 5 4 3 2 TICK_TIME FA 1 0 SENT_DRIVE MISSING_MAG_THRESHOLD AVERAGE MAN2 POL MAN UV ANGLE_OFFSET LBST CVHST GOVF AH AL EU ES TR TRNO IE MAGM BATD CUST_EEP For more details, see Programming Manual. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 17 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Diagnostics The A1338 was designed with ISO 26262:2011 requirements in mind and supports a number of on-chip self diagnostics to enable the host microcontroller to assess the operational status of each die. For example, each die can be user-configured for logic builtin self-test (LBIST) evaluation to ensure the digital circuits are operational. Upon completion of an LBIST operation, the A1338 will set a pass/fail LBIST status flag in the device error (ERR) register. Each A1338 die also supports several diagnostic features and status flags, accessible via a SPI read of the ERR register, to let the user know if any issues are present with the A1338 or associated magnetic system, as shown in Table 5. In addition, each die on the A1338 supports an on-chip userinitiated diagnostic (CVH Self-Test) mode that tests the entire signal path, including the front end CVH sensing circuitry. USER-INITIATED DIAGNOSTICS Each die on the A1338 can independently be controlled by a microcontroller to enter its CVH Self-Test mode via SPI or SENT. When a CVH Self-Test mode operation is requested by the microcontroller, the respective die initiates a test mode sequence whereby it sequentially applies an internal constant bias current to every contact element in the CVH ring. As each element in the CVH ring is sequentially biased, an angle measurement is calculated. The time to complete one revolution around the CVH ring and calculate and store incremental angle measurements is tCVHST. Table 5: Diagnostic Capabilities Diagnostic/ Protection Description Output State Loss of VCC Determine if battery power was lost. BATD Error flag is set; see ERR register table. Reverse VCC Condition Current Limiting (VCCx pin). Output Below GND. MISO/SENT/PWM Short to VCC Current Limiting (MISOx pin). MISO/SENT/PWM Line: Pulled up to V-pullup. Should not be tied to VCC if VCC > 5.5 V. MISO/SENT/PWM Short to Ground Current Limiting (MISOx pin). MISO/SENT/PWM Line: Pulled up to GND. Logic Built-In Self-Test (LBIST) 70% coverage for 10 ms BIST of all digital circuitry. Error Flags set in SPI message when errors are detected; see ERR2 Register table. Signal Path Diagnostics User controlled advanced CVH and full signal path diagnostics. Error Flags set in SPI message when errors are detected; see ERR2 Register table. Internal Error Monitors digital logic for proper function. IERR Error flag is set; see ERR Register table. Missing Magnet Monitors magnet field level in case of mechanical failure. MAGM Error flag is set; see ERR Register table. EEPROM Error Detection and Correction Detection of single and dual bit error, and correction of single bit error. Error flags set in SPI message when errors are detected or corrected; see ERR Register table. VCC Low Flag Asserted when VCC < VUVLOTH. Bit 2 of SPI Output on MISO is set high. See Programming manual for more details. Temperature Out of Range Die temperature has exceeded acceptable range. See ERR Register table for more details. Redundancy Dual-die version of the A1338 provides redundant sensors in the same package. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 18 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 SERIAL INTERFACE STRUCTURE The serial interface contains the Primary Serial Interface (PSI) registers and the restricted Extended Addressing registers. The PSI fields are used by the host for routine communication with the A1338, such as retrieving current angle and turns count, error, and status data, and managing certain configuration settings. For information on extended addressing and EEPROM access, see the A1338 programming manual. Table 6: Primary Serial Interface Registers (Reserved Registers Not Shown) Address (Hex) Name (Symbol) 0x00 Angle Output (ANG) Usage 0x04 Error (ERR1) Read out error flags 0x05 Error (ERR2) Read out error flags Read out current angle (Note: 12-bit Angle Output located MSB first, in bits12:1; Bit0 is always `0') 0x08 Control (CTRL) Read or write configuration commands 0x0F Key Code (KEY) Write the Key Code to enable access to Extended Addressing registers Table 7: Primary Serial Interface Registers Bits Map (Reserved Registers Not Shown) Serial Address Register Symbol 0x00 ANG 0x04 Addressed Byte (MSB) 12 11 10 9 8 7 ERR - - - - - - 0X05 ERR2 - - - - - 0x08 CTRL - - - - - 0x0F KEY - - - - - 6 5 4 3 2 1 0 EEP2 EEP1 TMP RES IERR MAGM BATD - MANER RES3 LBIST CVHST RES2 RES1 RES0 - - - STS TRST RPM TEN ERST ANGLE OUTPUT (12:1) 0 KEY_CODE Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 19 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 ANG (Angle Output) Register Address: 0x00 Address Bit 0x00 12 11 10 9 8 Name 7 6 5 4 3 2 1 ANGLE_OUTPUT 0 - R/W R R R R R R R R R R R R R Value 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0 Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 Stores data on current angle reading. ANGLE_OUTPUT [12:1] Current Angle Most recent angle reading. Value is unsigned, stored in bits 12:1 (bit 0 defaults to 0). As the target turns, the angle value increases or decreases according to the rotational polarity setting in EEPROM (CUST_CFG2 register, POL bit). Bit Value 12:1 0/1 Description Current angle reading. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 20 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 ERR (Error) Register Address: 0x04 Address 0x04 Bit 12 11 10 9 8 7 6 5 4 3 2 1 0 Name - - - - - - EEP2 EEP1 TMP RES IERR MAGM BATD R/W - - - - - - R R R R R R R Value X X X X X X 0/1 0/1 0/1 0/1 0/1 0/1 0/1 Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 Error register. Indicates various current error conditions. When set, can only be cleared via the CTRL register ERST field, hard reset, or power-on reset (see BATD for exception). If any of the error bits are asserted, the error flag on the serial interface will be asserted. Masking an error bit will prevent the bit from asserting the serial interface error flag, but the error bit may still be asserted in this register. EEP2 [6] EEPROM Error Flag 2 IERR [2] Internal Error Uncorrectable dual-bit EEPROM error flag. Bit 6 Value Description 0 Error condition not present. 1 Error condition present. EEP1 [5] EEPROM Error Flag 1 5 Value Description 0 Error condition not present. 1 Error condition present. TMP [4] Temperature Out of Range This bit indicates an error condition when the die temperature has exceeded the acceptable range. Bit 4 Value 2 Value Description 0 No digital logic timer error has been detected. 1 Digital logic timer error has been detected. Monitors target magnet field level to detect field loss due to mechanical failure in the application. Missing Magnet Field Threshold can be customer programmed by writing to EEPROM Address 0x18, Bits 10:0 (MISSING_MAG_THRESHOLD). Allegro programs this to a default value of 100 G, but the customer can readjust this field if they prefer. Bit 1 Description 0 Error condition not present. 1 Error condition present. RES [3] Reserved Bit MAGM [1] Target Magnet Loss Corrected single-bit EEPROM error flag. Bit This bit is set to 1 if an internal logic error condition has been detected. When this bit is set to 1, a general reset is recommended. Value Description 0 Error condition not present. 1 Error condition present. BATD [0] Power Supply Loss Indicates if battery power (VCC supply) was lost. By default also indicates at expected low power events: start-up, power-on reset, and after exiting Transport mode. Before commencing normal operation, must be set to 0 by asserting the ERST bit of the CTRL register (unless field is masked in EEPROM by ERM register BATD field). Bit 0 Value Description 0 Error condition not present. 1 Error condition present. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 21 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 ERR2 (Error2) Register Address: 0x05 Address 0x05 Bit 12 11 10 9 8 7 6 5 4 3 2 1 0 Name - - - - - - MANER RES3 LBIST CVHST RES2 RES1 RES0 R/W - - - - - - R - R R - R R Value X X X X X X 0/1 - 0/1 0/1 - 0/1 0/1 Reset 0 0 0 0 0 0 0 - 0 0 - 0 1 Error register. Indicates various current error conditions. When set, can only be cleared via the CTRL register ERST field, hard reset, or power-on reset (see BATD for exception). If any of the error bits are asserted, the error flag on the serial interface will be asserted. Masking an error bit will prevent the bit from asserting the serial interface error flag, but the error bit may still be asserted in this register. MANER [6] Manchester/SENT Error Flag Indicates Manchester/SENT Error. Bit 6 Value Description 0 Error condition not present. 1 Error condition present. RES2 [2] Factory Reserved Bit RES1 [1] Factory Reserved Bit RES0 [0] Factory Reserved Bit RES3 [5] Factory Reserved Bit LBIST [4] LBIST Error Flag This bit indicates that the Logic Built-In Self-Test (LBIST) failed. Bit 4 Value Description 0 Error condition not present. 1 Error condition present. CVHST [3] Circular Vertical Hall Self-Test This bit indicates that the CVH Built-In Self-Test (CVHST) failed. Bit 3 Value Description 0 Error condition not present. 1 Error condition present. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 22 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 CTRL (Control) Register Address: 0x08 Address 0x08 Bit 7 6 5 Name - - R/W - - Value X Reset 0 4 3 2 1 0 - STST RES1 RPM RES0 ERST - RW1C - R/W R/W RW1C X X X X 0/1 0/1 0/1 0 0 0 0 0 0 0 Initialization and operation configuration control command settings. RW1C: When a 1 is written to the field, the command is immediately executed, and the value returns to zero. When Reading the field, this type of field will always read back 0. STS [4] Self-Test Start Commands the A1338 to begin Self-Test(s). Which self-test is run, is determined by the U_INIT_ST field within EEPROM. There are two self-tests: 1. Logic Built-In Self-Test (LBIST): Verifies digital gate integrity. This is a modified version of digital scan testing. Requires approximately 10 ms to run during which time no angle readings can take place 2. CVH Self-Test: Test of the front end transducer and signal path. Requires approximately 40 ms to compete, during which time angle readings are not available. Bit 4 Value RES0 [1] Reserved ERST [0] Error Flags Reset A feature to clear the values in the ERR register (0x04). Bit 0 Value Description 0 ERR register not cleared. 1 ERR register cleared. Description 0 Does not trigger Self-Test. 1 Self-Test is triggered based on pre-selected options in the "U_INIT_ST" field of EEPROM. RES1 [3] Reserved RPM [2] RPM Operating Mode (see Programming Manual) This field is populated on power-up by the EEPROM field RPMD. This field can be written during operation to temporarily override the EEPROM. On the next power cycle, this field will reset to the value determined by the EEPROM field RPMD. This bit must be a `1' to enable internal averaging. Bit 2 Value Description 0 Internal Averaging not allowed. 1 Internal Averaging allowed. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 23 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Normal Operation Diagnostic Initiated Over SPI or SENT Bus? Yes No Signal Path Test Logic BIST IC applies internal test vectors to IC logic and detects logic circuit response. (Angle output lost during test for duration of Logic BIST test.) Bit asserted in register to inform user of pass or fail condition. User must read register via SPI interface. A1338 enters CVH Self-Test mode and measures delta angle over all 64 contacts of the CVH ring. (Angle output lost for the duration of test) Yes All CVH Delta Measurements = Theta degrees? Bit asserted in register to inform user of pass condition. User must read flag via SPI interface, or SENT interface, or PWM interfaces. No Bit asserted in register to inform user of fail condition. User must read flag via SPI interface, or SENT interface, or PWM interfaces. Figure 9: User-Interface Diagnostic Diagram Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 24 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Serial Interface Description APPLICATION INFORMATION The A1338 features SPI, SENT, and PWM interfaces. The following figures show some typical application circuits for using the A1338 with these interfaces. Calculating Target Zero-Degree Angle When shipped from the factory, the default angle value when oriented as shown in Figure 10, is approximately 21 (201 on the second die). In some cases, the end user may want to program an angle offset in the A1338 to compensate for variation in magnetic assemblies, or for applications where absolute system level readings are required. The internal algorithm for computing the output angle is as follows: AngleOUT = AngleRAW - Reference Angle . (3) The procedure to "zero out" the A1338 is quite simple. During final application calibration and programming, position the magnet above the A1338 in the required zero-degree position, and read the angle from the A1338 using the SPI interface (AngleOUT). From this angle, the Reference Angle required to program the A1338 can be computed as follows: Reference Angle = AngleOUT . (4) Bypass Pins Usage The bypass pins are required for proper operation of the device. A 0.1 F capacitor should be placed in very close proximity to each of the bypass pins. When using the SPI communication protocol, the A1338 has the ability to support host microcontroller inputs with Voltage Input High (VIH) thresholds of 2 V (minimum). This option only requires BYP1 to be populated with a 0.1 F capacitor. By using an optional second bypass capacitor on the BYP2 pins, the A1338 can also support host microcontroller inputs with Voltage Input High (VIH) thresholds of 2.5 V (minimum). This option requires that both BYP1 and BYP2 pins be populated with 0.1 F Target rotation axis Target poles aligned with A1338 elements Target alignment for default angle setting * Target rotation axis intersects primary die * Sets primary die 21 default point * Sets secondary die 201 default point (Example shows element E1 as primary die element E2 as secondary die) S S N E1 Pin 1 E1 N E2 E2 Figure 10: Orientation of Magnet Relative to Primary and Secondary Die 24 Hall element E1 location Hall element E2 location 1 Figure 11: Hall Element Located Off-Center within the Device Body (refer to the Package Outline Drawing for reference dimensions) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 25 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs capacitors, and that the appropriate EEPROM configuration bit be enabled. Contact Allegro for availability of parts with elevated SPI output levels. The bypass pins are not intended to be used to source external components. To assist with PCB layout, see the Operating Characteristics table for output voltage and current requirements. Changing Sampling Modes 1600 1400 Magnetic Field (G) A1338 1200 1000 800 NdFe30 600 SmCo24 400 The A1338 features a High RPM sampling mode and a Low RPM sampling mode. The default power-on state of the A1338 is loaded from EEPROM. To configure the A1338 to Low RPM mode, set the Operating mode to Low RPM mode by writing a logic 1 to bit 2 (RPM) of the configuration commands (CTRL) register, via the SPI interface. 200 0 Ceramic (Ferrite) 0.5 2.5 4.5 6.5 8.5 Air Gap (mm) Magnetic Target Requirements Figure 12: Magnetic Field versus Air Gap for a magnet 6 mm The A1338 is designed to operate with magnets constructed with a variety of magnetic materials, cylindrical geometries, and field strengths, as shown in Table 8. Contact Allegro for more detailed information on magnet selection and theoretical error. Allegro can provide similar curves for customer application magnets upon request. Larger magnets are recommended for applications that require optimized accuracy performance. in diameter and 2.5 mm thick. Table 8: Target Magnet Parameters Diameter (mm) 13 Thickness (mm) Neodymium (bonded) 15 4 Neodymium (sintered)* 10 2.5 Neodymium (sintered) 8 3 Neodymium / SmCo 6 2.5 12 11 10 Angle Error () Magnetic Material 14 9 8 7 6 5 4 Thickness S N 3 2 1 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Eccentricity of SOC Chip Relative to Magnet Rotation Axis (mm) Diameter Figure 13: Angle Error versus Eccentricity *A sintered Neodymium magnet with 10 mm (or greater) diameter and 2.5 mm thickness is the recommended magnet for redundant applications. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 26 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Redundant Applications and Alignment Error System Timing and Error The A1338 is designed to be used in redundant, on-axis applications with a single magnet spinning over the two separate dies that are mounted side-by-side in the same package. One challenge with this configuration is correctly lining up the magnet with the device package, so it is important to be aware of the physical separation of the two dies. The A1338 is a digital system, and therefore takes angle samples at a fixed sampling rate. When using a sensing device with a fixed sampling rate to sample a continuously moving target, there will be error introduced that can be simply calculated with the sampling rate of the device and the speed at which the magnetic signal is changing. In the case of the A1338, the input signal is rotating at various speeds, and the sampling rate of the A1338 is fixed at ANG . The calculation would be: Figure 14 illustrates the behavior of alignment error when using a O10 mm x 2.5 mm Neodymium magnet that is located 2.7 mm above the branded face of the package. The curve shows the relationship between absolute angle error present on the output of the die versus eccentricity of the die relative to the rotation axis of the magnet. The curve is the same for both dies in the package. ANG (s) x angular velocity ( / s) . (5) So the faster the magnetic object is spinning, the further behind in angle the output signal will seem for a fixed sampling rate. The curve provides guidance to determine what the optimal magnet placement should be for a given application. For example, given that the maximum spacing between the two dies is 1 mm, if the center of the magnet rotation is placed at the midpoint between the two dies, each die will have a maximum eccentricity of 0.5 mm. For applications with reduced accuracy requirements, considering one die the primary and the other die the secondary, the magnet axis of rotation could be positioned directly above the primary die, and thus offset 1 mm from the secondary die, yielding zero alignment error on the primary die, and approximately 1 of error on the secondary die, relative to the primary die, due to geometric mismatch. dAXIAL1 dAXIAL2 Target rotation axis Example of equal eccentricity: Target rotation axis centered between both dies Target counterclockwise rotation (Minus counts) dAXIAL1 = 0 Example of unequal eccentricity: Target rotation axis centered over primary die (either die may be used as primary) dAXIAL2 Target clockwise rotation (Plus counts) Eccentricity of secondary die (measured from target rotation axis intersect, to secondary die) Figure 14: Demonstration of Magnet to Sensing Element Eccentricity Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 27 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 CHARACTERISTIC PERFORMANCE DATA 2 1.8 1.6 1.6 1.4 1.4 1.2 1 0.8 0.6 1.2 1 0.8 0.6 0.4 0.4 0.2 0.2 0 -40 -20 0 20 40 60 80 Temperature (C) 100 120 0 -40 140 Figure 15: Angle Error over Temperature (300 G) 1.5 -20 0 20 40 60 80 Temperature (C) 100 120 140 Figure 16: Angle Drift Relative to 25C (300 G) 25C 150C 1 -40C 25C 150C 0.8 1 Noise (degrees) Peak Angle Error (degrees) Mean 3 Sigma 1.8 Drift in Degrees Angle Error in Degrees 2 Mean 3 Sigma 0.5 0.6 0.4 0.2 0 300 400 500 600 700 800 Field Strength in Gauss 900 Figure 17: Angle Error over Field Strength 1000 0 300 400 500 600 700 Field Strength in Gauss 800 900 Figure 18: Typical Three Sigma Angle Noise Over Field Strength Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 28 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 25 1.0 -40C 25C 150C 0.8 15 Noise in degrees Frequency (%) 20 Mean 3 Sigma 10 5 0 0.4 0.2 0 0.3 0.6 0.9 1.2 0 -50 1.5 0 50 100 150 Noise in degrees Ambient Temperature in C Figure 19: Noise Distribution over Temperature (3 , 300 G) Figure 20: Noise Performance over Temperature (3 , 300 G) 15 14 -40C 25C 150C -40C 25C 150C 12 10 Count (%) 10 Count (%) 0.6 5 8 6 4 2 0 6 7 8 ICC in mA 9 Figure 21: ICC Distribution over Temperature (ICC per die, VCC = 3.7 V) 10 0 6 7 8 ICC in mA 9 10 Figure 22: ICC Distribution over Temperature (ICC per die, VCC = 16 V) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 29 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 EMC Reduction For applications with stringent EMC requirements, a 100 resistance should be added to the supply for the device in order to suppress noise. A recommended circuit is shown in Figure 23. VCC RSPLY 0.1 F 0.1 F 0.1 F BYP1_1 Host Microprocessor (Optional) Tachometer 100 0.1 F BYP2_1* VCC_1 VCC_2 CS_1 SCLK_1 MOSI_1 MISO_1 BIAS_1 Tachometer (Optional) 100 CS_2 SCLK_2 MOSI_2 MISO_2 BIAS_2 GNDA_1 BYP1_2 0.1 F BYP2_2* PWM_1/SENT_1 Target Magnet A1338 (Dual-Die Version) PWM_2/SENT_2 GNDA_2 GNDD_1 GNDD_2 Figure 23: Typical application diagram (dual-die version) with EMC suppression resistor, RSPLY , on supply line. *Secondary bypass capacitors only required when using Elevated SPI Output Voltage. Contact Allegro for availability. 24 14 Hall element location Hall element E1 location 1 Hall element E2 location 1 Figure 24: Hall element located off-center within the device body; refer to the Package Outline Drawing for reference dimensions Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 30 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 PACKAGE OUTLINE DRAWINGS For Reference Only - Not for Tooling Use (Reference MO-153 AB-1) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown E 5.00 0.10 0.45 8 0 14 14 0.20 0.09 0.65 1.70 D 4.40 0.10 6.40 BSC 2.20 A 1 2 1.00 REF 1.62 16x SEATING PLANE 0.10 C 1 2 0.25 BSC Branded Face 0.30 0.19 6.00 0.60 +0.15 -0.10 C SEATING PLANE B GAUGE PLANE PCB Layout Reference View 1.10 MAX 0.65 BSC 0.15 0.00 A Terminal #1 mark area B Reference land pattern layout (reference IPC7351 TSOP65P640X120-14M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) C Branding scale and appearance at supplier discretion D Hall element, not to scale E Active Area Depth 0.36 mm REF NNNNNNNNNNNN YYWW LLLLLLLLLLLL C Standard Branding Reference View N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number Figure 25: Package LE, 14-Pin TSSOP Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 31 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 For Reference Only - Not for Tooling Use (Reference MO-153 AD) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 7.80 0.10 E D 3.40 D 1.00 0.65 0.45 8 0 24 24 0.20 0.09 E2 D D E1 4.40 0.10 6.40 BSC D 2.20 A 1 1.00 REF 1.65 2 0.25 BSC 24X SEATING PLANE 0.10 C 0.30 0.19 6.10 +0.15 0.60 -0.10 0.65 BSC C 1 2 B PCB Layout Reference View SEATING PLANE GAUGE PLANE 1.20 MAX 0.025 0.05 A Terminal #1 mark area B Reference land pattern layout (reference IPC7351 TSOP65P640X120-25M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) C Branding scale and appearance at supplier discretion D Hall elements (E1, E2), corresponding to respective die; not to scale E Active Area Depth 0.36 mm REF NNNNNNNNNN YYWW LLLLLLLLLL 1 C Standard Branding Reference View N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number Figure 26: Package LE, 24-Pin TSSOP Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 32 Allegro MicroSystems, LLC Conf idential Information Precision, Hall-Effect Angle Sensor IC with SPI, and SENT or PWM Outputs A1338 Revision History Number Date Description - November 18, 2016 Initial release 1 July 13, 2017 2 3 Updated MOSI_1/SCLK_1/ID1_1 and MOSI_2/SCLK_2/ID1_2 pinouts, WAKEx Input Specifications, PWM Output Signal, SENT Output Signal, Figure 12, 13, and 16. January 25, 2018 April 4, 2018 Updated Typical Application Diagram (page 4); Bypass2 Pin Output Voltage characteristic and test conditions (page 7); PWM Carrier Frequency test conditions, Sent Output Signal maximum value, Logical BIST Coverage versus Time (page 8); Effective Resolution typical value, footnotes 8-15 (page 9); Overview, Angle Measurement sections (page 10-11); Manchester Code Low Voltage maximum value (page 14); Table 4 (page 17); Table 5 (page 18); ERR Register Address table and bit 3 detail (page 19); CTRL Register, STS Self-Test Start (page 21); Calculating Target Zero-Degree Angle (page 23); and Figure 22 (page 28). Updated PWM Interface Specifications (page 8); PWM Output section (page 12); EEPROM Registers Map Table (page 17); Serial Interface Structure (pages 19-23); Figures 18 and 20 (pages 28-29). Copyright (c)2018, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro's product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 33