TDA7312
DIGITAL CONTROLLED STEREO AUDIO PROCESSOR
ADVANCE DATA
INPUTMULTIPLEXER:
- 4 STEREOINPUTS
FOURSELECTABLEADDRESSES
TWODIGITAL CONTROL OUTPUTS
INPUT AND OUTPUT FOR EXTERNAL
EQUALIZER OR NOISE REDUCTION SYS-
TEM
VOLUMECONTROL IN 1.25dBSTEPS
TREBLE AND BASS CONTROL
TWOSPEAKERATTENUATORS:
- INDEPENDENT SPEAKERSCONTROL
IN 1.25dB STEPS
- INDEPENDENT MUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL I2C BUS
DESCRIPTION
The TDA7312 is a volume, tone (bass and treble)
balance(Left/Right)processorfor qualityaudioappli-
cations.
Control is accomplished by serial I2C busmicroproc-
essorinterface.
TheAC signalsetting is obtainedby resistor networks
andswitchescombinedwith operationalamplifiers.
Thanks to the used BIPOLAR/CMOS Tecnology,
Low Distortion, Low Noise and Low DC stepping are
obtained.
This isadvanced information on anew product now in development or undergoing evaluation.Details are subject to change without notice.
February 1994
SDIP30
ORDERING NUMBER: TDA7312
PIN CONNECTION (Top view)
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THERMAL DATA
Symbol Description SDIP30 Unit
Rth j-pins Thermal Resistance Junction-pins max 85 °C/W
QUICK REFERENCE DATA
Symbol Parameter Min. Typ. Max. Unit
VSSupply Voltage 6 9 10 V
VCL Max. inputsignal handling 2 Vrms
THD Total Harmonic Distortion V = 1Vrms f = 1KHz 0.01 0.1 %
S/N Signal to Noise Ratio 106 dB
SCChannel Separation f = 1KHz 103 dB
Volume Control 1.25dB step -78.75 0 dB
Bass and Treble Control 2db step -14 +14 dB
Fader and Balance Control 1.25dB step -38.75 0 dB
Mute Attenuation 100 dB
ABSOLUTE MAXIMUMRATINGS
Symbol Parameter Value Unit
VSOperating SupplyVoltage 10.2 V
Tamb Operating Ambient Temperature 0 to 70 °C
Tstg Storage Temperature Range -40 to 150 °C
TEST CIRCUIT
TDA7312
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BLOCK DIAGRAM
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ELECTRICALCHARACTERISTICS (refer to the test circuit Tamb =25°C,VS=9V, RL= 10KΩ,
RG= 600Ω, all controls flat (G = 0), f = 1KHz unlessotherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
SUPPLY
VSSupply Voltage 6 9 10 V
ISSupply Current 8 11 mA
SVR Ripple Rejection 60 80 dB
INPUTSELECTORS
RII Input Resistance Input 1, 2, 3 35 50 70 KΩ
VCL ClippingLevel 2 2.5 Vrms
SIN Input Separation (2) 80 100 dB
RLOutput Load resistance 2 KΩ
eIN Input Noise 2 µV
VOLUMECONTROL
RIV Input Resistance 20 33 50 kΩ
CRANGE Control Range 70 75 80 dB
AVMIN Min. Attenuation -1 0 1 dB
AVMAX Max. Attenuation 70 75 80 dB
ASTEP Step Resolution 0.5 1.25 1.75 dB
EAAttenuation Set Error Av = 0 to -20dB
Av = -20 to -60dB -1.25
-3 0 1.25
2dB
dB
ETTracking Error 2dB
V
DC DC Steps adjacent attenuation steps
From 0dB to Av max 0
0.5 3
7.5 mV
mV
SPEAKERATTENUATORS
Crange Control Range 35 37.5 40 dB
SSTEP Step Resolution 0.5 1.25 1.75 dB
EAAttenuation set error 1.5 dB
AMUTE Output Mute Attenuation 80 100 dB
VDC DC Steps adjacent att. steps
from 0 to mute 0
13
10 mV
mV
BASSCONTROL (1)
Gb Control Range Max. Boost/cut +12 +14 +16 dB
BSTEP Step Resolution 1 2 3 dB
RBInternal Feedback Resistance 34 44 58 KΩ
TREBLE CONTROL (1)
Gt Control Range Max. Boost/cut +13 +14 +15 dB
TSTEP Step Resolution 1 2 3 dB
DIGITALOUTPUTS
VCESAT VOUT = Low IC=1mA 0.2 0.3 V
Ileak I leakage VOUT =V
S10 µA
TDA7312
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ELECTRICALCHARACTERISTICS (continued)
Symbol Parameter Test Condition Min. Typ. Max. Unit
AUDIO OUTPUTS
VOCL ClippingLevel d = 0.3% 2 2.5 Vrms
RLOutput Load Resistance 2 KΩ
CLOutput Load Capacitance 10 nF
ROUT Output resistance 30 75 120 Ω
VOUT DC Voltage Level 4.2 4.5 4.8 V
GENERAL
eNO Output Noise BW = 20-20KHz, flat
output muted
all gains = 0dB 2.5
515
µV
µV
A curve all gains = 0dB 3 µV
S/N Signal to Noise Ratio all gains= 0dB; VO= 1Vrms 106 dB
d Distortion AV=0,V
IN = 1Vrms
AV= -20dB VIN = 1Vrms
VIN = 0.3Vrms
0.01
0.09
0.04
0.1
0.3 %
%
%
Sc Channel Separation left/right 80 103 dB
Total Tracking error AV= 0 to -20dB
-20 to -60 dB 0
01
2dB
dB
BUS INPUTS
VIL Input Low Voltage 1V
V
IH Input High Voltage 3 V
IIN Input Current -5 +5 µA
VOOutputVoltage SDA Acknowledge IO= 1.6mA 0.4 V
ADDRESS PIN (Internal 50KΩpulldown resistor).
Notes:
SDA, SCL,DIG OUT 1, DIG OUT 2 Pinsare high impedancewhen VS=0
(1) Bassand Treble response see attached diagram (fig.16).The center frequency andquality ofthe resonance behaviour can be choosen by
the external circuitry. A standard first order bassresponse can be realized by a standard feedbacknetwork
(2) The selected input is grounded thru the 2.2µF capacitor.
Figure 2: Signalto Noise Ratio vs. Volume
Setting
Figure1: Noisevs. Volume/GainSettings
TDA7312
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Figure3: Distortion & Noise vs. Frequency Figure 4: Distortion & Noise vs. Frequency
Figure5: Distortion vs. LoadResistance
Figure7: Input Separation(L1 →L2, L3, L4)vs.
Frequency
Figure 6: ChannelSeparation(L →R) vs.
Frequency
Figure 8: SupplyVoltage Rejection vs.
Frequency
TDA7312
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Figure9: Output Clipping Levelvs. Supply
Voltage
Figure11: SupplyCurrent vs. Temperature
Figure 10: QuiescentCurrent vs. SupplyVoltage
Figure13: TypicalTone Response(with the ext.
components indicatedin the test
circuit)
Figure 12: Bass Resistance vs. Temperature
TDA7312
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I2C BUS INTERFACE
Data transmission from microprocessor to the
TDA7312 and viceversa takes place thru the 2
wires I2C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supplyvoltage must beconnected).
DataValidity
As shown in fig. 14, the data on the SDA line
mustbe stable during the high period of the clock.
The HIGH and LOW state of the data line can
only change when the clock signal on the SCL
line is LOW.
Start and Stop Conditions
As shown in fig.15 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop conditionis a LOWto HIGH tran-
sition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred on the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
knowledgebit. The MSB is transferredfirst.
Acknowledge
The master (µP) puts a resistive HIGH level on the
SDA line during the acknowledgeclock pulse (see
fig. 16). The peripheral (audioprocessor) that ac-
knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAline is stableLOWduringthisclockpulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the recep-
tion of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can gen-
erate the STOP information in order to abort the
transfer.
TransmissionwithoutAcknowledge
Avoiding to detect the acknowledge of the audio-
processor, the µP can use a simplier transmis-
sion: simply it waits one clock without checking
the slave acknowledging, and sends the new
data.
This approach of course is less protected from
misworking and decreasesthe noise immunity.
Figure14: Data Validity on the I2CBUS
Figure15: Timing Diagram of I2CBUS
Figure16: Acknowledgeon the I2CBUS
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SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, containing the TDA7312
address(the 8th bit of the byte must be 0). The
TDA7312 mustalways acknowledge at the end
ofeach transmittedbyte.
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
TDA7312 ADDRESS
MSB first byte LSB MSB LSB MSB LSB
S 1 0 0 0 1 ADDR
2ADDR
10ACK DATA ACK DATA ACK P
DataTransferred (N-bytes + Acknowledge)
ACK = Acknowledge
S = Start
P = Stop
SOFTWARE SPECIFICATION
Chip address
1
MSB 0 0 0 1 ADDR
2ADDR
10
LSB
DATA BYTES
MSB LSB FUNCTION
0
1
1
0
0
0
0
0
0
1
1
1
B2
0
1
0
1
1
B1
B1
B1
D2
0
1
B0
B0
B0
D1
C3
C3
A2
A2
A2
S2
C2
C2
A1
A1
A1
S1
C1
C1
A0
A0
A0
S0
C0
C0
Volume control
Speaker ATT L
Speaker ATT R
Audio switch
Bass control
Treble control
Ax = 1.25dB steps; Bx = 10dB steps; Cx =2dB steps; Sx = Input Selector; DX= Dig Out Pins
ADDR2 ADDR1 CHIP ADDRESS
0 0 88 HEX
0 1 8A HEX
1 0 8C HEX
1 1 8E HEX
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SOFTWARE SPECIFICATION (continued)
DATA BYTES (detailed description)
Volume
MSB LSB FUNCTION
0 0 B2 B1 B0 A2 A1 A0 Volume 1.25dB steps
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-1.25
-2.5
-3.75
-5
-6.25
-7.5
-8.75
0 0 B2 B1 B0 A2 A1 A0 Volume 10dB steps
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-10
-20
-30
-40
-50
-60
-70
For examplea volumeof -45dBis given by:
00100100
SpeakerAttenuators
MSB LSB FUNCTION
1
10
00
1B1
B1 B0
B0 A2
A2 A1
A1 A0
A0 Speaker L
Speaker R
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-1.25
-2.5
-3.75
-5
-6.25
-7.5
-8.75
0
0
1
1
0
1
0
1
0
-10
-20
-30
11111 Mute
For exampleattenuationof 25dBon speaker R is given by:
10110100
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Audio Switch
MSB LSB FUNCTION
0 1 0 D2 D1 S2 S1 S0 Audio Switch
1
1
1
1
0
0
1
1
0
1
0
1
Stereo 1
Stereo 2
Stereo 3
Stereo 4
0
1
0
1DIG. OUT 1 = 0
DIG. OUT 1 = 1
DIG. OUT 2 = 0
DIG. OUT 2 = 1
Bass and Treble
0
01
11
10
1C3
C3 C2
C2 C1
C1 C0
C0 Bass
Treble
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
-14
-12
-10
-8
-6
-4
-2
0
0
2
4
6
8
10
12
14
C3 = Sign
For exampleBass at -10dB is obtained by the following8 bit string:
01100010
Status at Poweron Reset
Volume= 78.75dB
Treble= Bass = +2dB
Spkrs Attenuators= Mute
Input = Stereo 1
Dig. OUT 1 = Dig. OUT 2 = 1
TDA7312
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SDIP30 PACKAGE MECHANICAL DATA
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 5.08 0.20
A1 0.51 0.020
A2 3.05 3.81 4.57 0.12 0.15 0.18
B 0.36 0.46 0.56 0.014 0.018 0.022
B1 0.76 0.99 1.40 0.030 0.039 0.055
C 0.20 0.25 0.36 0.008 0.01 0.014
D 27.43 27.94 28.45 1.08 1.10 1.12
E 10.16 10.41 11.05 0.400 0.410 0.435
E1 8.38 8.64 9.40 0.330 0.340 0.370
e 1.78 0.070
e1 10.16 0.400
L 2.54 3.30 3.81 0.10 0.13 0.15
M0°(min.), 15°(max.)
S 0.31 0.012
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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties whichmay result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men-
tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex-
press written approval of SGS-THOMSON Microelectronics.
1994 SGS-THOMSON Microelectronics - All RightsReserved
Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent Rights to use these com-
ponents in an I2C system, provided that the system conforms to the I2C Standard Specificationsas defined by Philips.
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TDA7312
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