HEF4094BT,652 - NEXPERIA - Datasheet.Directory

HEF4094B

8-stage shift-and-store register

Rev. 13 — 14 November 2018 Product data sheet

1. General description

The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with each stage

for strobing data from the serial input to parallel buffered 3-state outputs QP0 to QP7. The parallel

outputs may be connected directly to common bus lines. Data is shifted on positive-going clock

transitions. The data in each shift register stage is transferred to the storage register when the

strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the

output enable (OE) signal is HIGH.

Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B devices.

Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in

cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next

negative going clock edge. This is used for cascading HEF4094B devices when the clock has a

slow rise time.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually

ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

•Fully static operation

•5 V, 10 V, and 15 V parametric ratings

•Standardized symmetrical output characteristics

•Specified from -40 °C to +85 °C and -40 °C to +125 °C

•Complies with JEDEC standard JESD 13-B

3. Ordering information

Table 1. Ordering information

All types operate from -40 °C to +125 °C.

PackageType number

Name Description Version

HEF4094BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

HEF4094BTS SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

HEF4094BTT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

Nexperia HEF4094B

8-stage shift-and-store register

4. Functional diagram

001aaf119

8-STAGE SHIFT

8-BIT STORAGE

3-STATE OUTPUTS

2QS2 10

QS1

QP0

4 5 6 7 14 13 12 11

QP1 QP2 QP3 QP4 QP5 QP6 QP7

STR

Fig. 1. Functional diagram

CP STR

3 1

QP0

QP1

QP2

QP3

QP4

QP5

QP6

QP7

QS1

QS2

001aaf111

Fig. 2. Logic symbol

001aag799

FF 0

LATCH 0

FF 7

LATCH 7

STAGES 1 TO 6STAGE 0 STAGE 7

QP2QP0

D QS2

QS1

LATCH

QP1

QP4

QP3

QP6

QP5 QP7

STR

Fig. 3. Logic diagram

Product data sheet Rev. 13 — 14 November 2018 2 / 17

Nexperia HEF4094B

8-stage shift-and-store register

5. Pinning information

5.1. Pinning

HEF4094B

STR VDD

D OE

CP QP4

QP0 QP5

QP1 QP6

QP2 QP7

QP3 QS2

VSS QS1

aaa-007666

Fig. 4. Pin configuration SOT109-1 (SO16), SOT338-1 (SSOP16) and SOT403-1 (TSSOP16)

5.2. Pin description

Table 2. Pin description

Symbol Pin Description

STR 1 strobe input

D 2 data input

CP 3 clock input

QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output

VSS 8 ground supply voltage

QS1 9 serial output

QS2 10 serial output

OE 15 output enable input

VDD 16 supply voltage

Product data sheet Rev. 13 — 14 November 2018 3 / 17

Nexperia HEF4094B

8-stage shift-and-store register

6. Functional description

Table 3. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = HIGH-impedance OFF-state; NC = no change;

↑ = positive-going transition; ↓ = negative-going transition;

Q6S = the data in register stage 6 before the LOW to HIGH clock transition;

Q7S = the data in register stage 7 before the HIGH to LOW clock transition.

Inputs Parallel outputs Serial outputs

CP OE STR D QP0 QPn QS1 QS2

↑ L X X Z Z Q6S NC

↓ L X X Z Z NC Q7S

↑ H L X NC NC Q6S NC

↑ H H L L QPn -1 Q6S NC

↑ H H H H QPn -1 Q6S NC

↓ H H H NC NC NC Q7S

001aaf117

CLOCK INPUT

DATA INPUT

STROBE INPUT

OUTPUT ENABLE INPUT

INTERNAL Q0S (FF 0)

OUTPUT QP0

INTERNAL Q6S (FF 6)

OUTPUT QP6

SERIAL OUTPUT QS1

SERIAL OUTPUT QS2

Z-state

At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the

QSn outputs.

Fig. 5. Timing diagram

Product data sheet Rev. 13 — 14 November 2018 4 / 17

Nexperia HEF4094B

8-stage shift-and-store register

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).

Symbol Parameter Conditions Min Max Unit

VDD supply voltage -0.5 +18 V

IIK input clamping current VI < -0.5 V or VI > VDD + 0.5 V - ±10 mA

VIinput voltage -0.5 VDD + 0.5 V

IOK output clamping current VO < -0.5 V or VO > VDD + 0.5 V - ±10 mA

II/O input/output current - ±10 mA

IDD supply current - 50 mA

Tstg storage temperature -65 +150 °C

Tamb ambient temperature -40 +125 °C

Ptot total power dissipation SO16, SSOP16 and TSSOP16 [1] - 500 mW

P power dissipation per output - 100 mW

[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.

For (T)SSOP16 package: Ptot derates linearly with 5.5 mW/K above 60 °C.

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VDD supply voltage 3 - 15 V

VIinput voltage 0 - VDD V

Tamb ambient temperature in free air -40 - +125 °C

VDD = 5 V - - 3.75 μs/V

VDD = 10 V - - 0.5 μs/V

Δt/ΔV input transition rise and fall rate

VDD = 15 V - - 0.08 μs/V

Product data sheet Rev. 13 — 14 November 2018 5 / 17

Nexperia HEF4094B

8-stage shift-and-store register

9. Static characteristics

Table 6. Static characteristics

VSS = 0 V; VI = VSS or VDD; unless otherwise specified.

Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °CSymbol Parameter Conditions VDD

Min Max Min Max Min Max Min Max

Unit

5 V 3.5 - 3.5 - 3.5 - 3.5 - V

10 V 7.0 - 7.0 - 7.0 - 7.0 - V

VIH HIGH-level

input voltage

|IO| < 1 μA

15 V 11.0 - 11.0 - 11.0 - 11.0 - V

5 V - 1.5 - 1.5 - 1.5 - 1.5 V

10 V - 3.0 - 3.0 - 3.0 - 3.0 V

VIL LOW-level input

voltage

|IO| < 1 μA

15 V - 4.0 - 4.0 - 4.0 - 4.0 V

5 V 4.95 - 4.95 - 4.95 - 4.95 - V

10 V 9.95 - 9.95 - 9.95 - 9.95 - V

VOH HIGH-level

output voltage

|IO| < 1 μA

15 V 14.95 - 14.95 - 14.95 - 14.95 - V

5 V - 0.05 - 0.05 - 0.05 - 0.05 V

10 V - 0.05 - 0.05 - 0.05 - 0.05 V

VOL LOW-level

output voltage

|IO| < 1 μA

15 V - 0.05 - 0.05 - 0.05 - 0.05 V

VO = 2.5 V 5 V - -1.7 - -1.4 - -1.1 - -1.1 mA

VO = 4.6 V 5 V - -0.64 - -0.5 - -0.36 - -0.36 mA

VO = 9.5 V 10 V - -1.6 - -1.3 - -0.9 - -0.9 mA

IOH HIGH-level

output current

VO = 13.5 V 15 V - -4.2 - -3.4 - -2.4 - -2.4 mA

VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA

VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA

IOL LOW-level

output current

VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA

IOZ OFF-state

output current

QPn output

is HIGH;

VO = 15 V

15 V - 0.4 - 0.4 - 12 - 12 μA

IIinput leakage

current

15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA

5 V - 5 - 5 - 150 - 150 μA

10 V - 10 - 10 - 300 - 300 μA

IDD supply current all valid input

combinations;

IO = 0 A

15 V - 20 - 20 - 600 - 600 μA

CIinput

capacitance

- - - 7.5 - - - - pF

Product data sheet Rev. 13 — 14 November 2018 6 / 17

Nexperia HEF4094B

8-stage shift-and-store register

10. Dynamic characteristics

Table 7. Dynamic characteristics

VSS = 0 V; Tamb = 25 °C; for test circuit see Fig. 10; unless otherwise specified.

Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit

5 V [1] 108 ns + (0.55 ns/pF)CL- 135 270 ns

10 V 54 ns + (0.23 ns/pF)CL- 65 130 ns

CP to QS1;

see Fig. 6

15 V 42 ns + (0.16 ns/pF)CL- 50 100 ns

5 V 78 ns + (0.55 ns/pF)CL- 105 210 ns

10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns

CP to QS2;

see Fig. 6

15 V 32 ns + (0.16 ns/pF)CL- 40 80 ns

5 V 138 ns + (0.55 ns/pF)CL- 165 330 ns

10 V 64 ns + (0.23 ns/pF)CL- 75 150 ns

CP to QPn;

see Fig. 6

15 V 47 ns + (0.16 ns/pF)CL- 55 110 ns

5 V 83 ns + (0.55 ns/pF)CL- 110 220 ns

10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns

tPHL HIGH to LOW

propagation delay

STR to QPn;

see Fig. 7

15 V 27 ns + (0.16 ns/pF)CL- 35 70 ns

5 V [1] 78 ns + (0.55 ns/pF)CL- 105 210 ns

10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns

CP to QS1;

see Fig. 6

15 V 32 ns + (0.16 ns/pF)CL- 40 80 ns

5 V 78 ns + (0.55 ns/pF)CL- 105 210 ns

10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns

CP to QS2;

see Fig. 6

15 V 32 ns + (0.16 ns/pF)CL- 40 80 ns

5 V 123 ns + (0.55 ns/pF)CL- 150 300 ns

10 V 59 ns + (0.23 ns/pF)CL- 70 140 ns

CP to QPn;

see Fig. 6

15 V 47 ns + (0.16 ns/pF)CL- 55 110 ns

5 V 73 ns + (0.55 ns/pF)CL- 100 200 ns

10 V 34 ns + (0.23 ns/pF)CL- 45 90 ns

tPLH LOW to HIGH

propagation delay,

STR to QPn;

see Fig. 7

15 V 27 ns + (0.16 ns/pF)CL- 35 70 ns

5 V [1] 10 ns + (1.00 ns/pF)CL- 60 120 ns

10 V 9 ns + (0.42 ns/pF)CL- 30 60 ns

tttransition time

15 V 6 ns + (0.28 ns/pF)CL- 20 40 ns

5 V - 40 80 ns

10 V - 25 50 ns

tPZH OFF-state to HIGH

propagation delay

OE to QPn;

see Fig. 8

15 V - 20 40 ns

5 V - 40 80 ns

10 V - 25 50 ns

tPZL OFF-state to LOW

propagation delay

OE to QPn;

see Fig. 8

15 V - 20 40 ns

5 V - 75 150 ns

10 V - 40 80 ns

tPHZ HIGH to OFF-state

propagation delay

OE to QPn;

see Fig. 8

15 V - 30 60 ns

5 V - 80 160 ns

10 V - 40 80 ns

tPLZ LOW to OFF-state

propagation delay

OE to QPn;

see Fig. 8

15 V - 30 60 ns

Product data sheet Rev. 13 — 14 November 2018 7 / 17

Nexperia HEF4094B

8-stage shift-and-store register

Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit

5 V 60 30 - ns

10 V 20 10 - ns

tsu set-up time D to CP;

see Fig. 9

15 V 15 5 - ns

5 V +5 -15 - ns

10 V 20 5 - ns

thhold time D to CP;

see Fig. 9

15 V 20 5 - ns

5 V 60 30 - ns

10 V 30 15 - ns

minimum LOW

clock pulse;

see Fig. 6

15 V 24 12 - ns

5 V 40 20 - ns

10 V 30 15 - ns

tWpulse width

minimum HIGH

strobe pulse;

see Fig. 7

15 V 24 12 - ns

5 V 5 10 - MHz

10 V 11 22 - MHz

fmax maximum frequency see Fig. 6

15 V 14 28 - MHz

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).

Table 8. Dynamic power dissipation

VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.

Symbol Parameter VDD Typical formula for PD (μW) where:

5 V PD = 2100 x fi + Σ(fo x CL) x VDD

10 V PD = 9700 x fi + Σ(fo x CL) x VDD

PDdynamic power

dissipation

15 V PD = 26000 x fi + Σ(fo x CL) x VDD

fi = input frequency in MHz,

fo = output frequency in MHz,

CL = output load capacitance in pF,

VDD = supply voltage in V,

Σ(fo x CL) = sum of the outputs.

10.1. Waveforms and test circuit

1/fmax

tPHL

tPLH

GND

VOH

VOL

QPn, QS1 output

CP input VM

001aaf113

tPHL

tPLH

VOH

VOL

QS2 output VM

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 6. Clock to outputs propagation delays, and clock pulse width and maximum frequency

Product data sheet Rev. 13 — 14 November 2018 8 / 17

Nexperia HEF4094B

8-stage shift-and-store register

Table 9. Measurement points

Supply voltage Input Output

VDD VMVMVXVY

5 V to 15 V 0.5VDD 0.5VDD 0.1VDD 0.9VDD

tPHL

tPLH

GND

VOH

VOL

QPn output

STR input VM

001aaj058

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 7. Strobe to output propagation delays, and strobe pulse width, set up and hold times

001aai545

tPLZ

tPHZ

outputs

disabled

outputs

enabled

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

OE input VM

VOL

VOH

GND

tPZL

tPZH

VDD

GND

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 8. 3-state output enable and disable times for OE input

Product data sheet Rev. 13 — 14 November 2018 9 / 17

Nexperia HEF4094B

8-stage shift-and-store register

001aaf115

GND

tsu

VOH

VOL

QPn, QS1, QS2 output

CP input

D input

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 9. Data input data set up and hold times

VMVM

10 %

90 %

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

90 %

10 %

001aaj781

a. Input waveform

001aaj915

VEXT

VDD

VIVO

DUT

b. Test circuit

Test and measurement data is given in Table 10.

Definitions test circuit:

DUT = Device Under Test.

RL = Load resistance;

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig. 10. Test circuit

Table 10. Test data

Supply voltage Input VEXT Load

VDD VItr, tftPHL, tPLH tPHZ, tPZH tPLZ, tPZL CLRL

5 V to 15 V VSS or VDD ≤ 20 ns open VSS VDD 50 pF 1 kΩ

Product data sheet Rev. 13 — 14 November 2018 10 / 17

Nexperia HEF4094B

8-stage shift-and-store register

11. Application information

Some examples of applications for the HEF4094B are:

•Serial-to-parallel data conversion

•Remote control holding register

001aae666

DIGITALLY CONTROLLED

EQUIPMENT

(REQUIRES CONTINUOUS

DIGITAL CONTROL)

CONTROL

AND

SYNC

CIRCUITRY

data clock

from remote

control panel

HEF4094B

QP0

STR

D QS2

QP7

DIGITALLY CONTROLLED

EQUIPMENT

HEF4094B

QP0

STR

D QS2

QP7

DIGITALLY CONTROLLED

EQUIPMENT

HEF4094B

QP0

STR

QP7

Fig. 11. Remote control holding register

Product data sheet Rev. 13 — 14 November 2018 11 / 17

Nexperia HEF4094B

8-stage shift-and-store register

12. Package outline

w M

detail X

v M A

(A )

pin 1 index

UNIT A

max. A

1 A

2 A

3 b

p c D

(1) E

(1) (1)

e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.39

0.38

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.020

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Fig. 12. Package outline SOT109-1 (SO16)

Product data sheet Rev. 13 — 14 November 2018 12 / 17

Nexperia HEF4094B

8-stage shift-and-store register

UNIT A

1 A

2 A

3 b

p c D

(1) E

(1) e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05

1.80

1.65 0.25 0.38

0.25

0.20

0.09

6.4

6.0

5.4

5.2 0.65 1.25

7.9

7.6

1.03

0.63

0.9

0.7

1.00

0.55

0.13 0.2 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT338-1 99-12-27

03-02-19

(1)

w M

v M A

1 8

16 9

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

max.

Fig. 13. Package outline SOT338-1 (SSOP16)

Product data sheet Rev. 13 — 14 November 2018 13 / 17

Nexperia HEF4094B

8-stage shift-and-store register

UNIT A

1 A

2 A

3 b

p c D

(1) E (2) (1)

e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3 0.65 6.6

6.2

0.4

0.3

0.40

0.06

0.13 0.1 0.2 1

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT403-1 MO-153 99-12-27

03-02-18

w M

0.25

1 8

16 9

detail X

(A )

v M A

0 2.5 5 mm

scale

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

max.

1.1

pin 1 index

Fig. 14. Package outline SOT403-1 (TSSOP16)

Product data sheet Rev. 13 — 14 November 2018 14 / 17

Nexperia HEF4094B

8-stage shift-and-store register

13. Revision history

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF4094B v.13 20181114 Product data sheet - HEF4094B v.11

Modifications: •The format of this data sheet has been redesigned to comply with the identity guidelines of

Nexperia.

•Legal texts have been adapted to the new company name where appropriate.

•Fig. 5 corrected.

HEF4094B v.12 20160325 Product data sheet - HEF4094B v.11

Modifications: •Type number HEF4094BP (SOT38-4) removed.

HEF4094B v.11 20130829 Product data sheet - HEF4094B v.10

Modifications: •Table 4: Table note corrected (errata).

HEF4094B v.10 20130625 Product data sheet - HEF4094B v.9

Modifications: •added type number HEF4094BTT.

HEF4094B v.9 20111116 Product data sheet - HEF4094B v.8

Modifications: •Table 6: IOH minimum values changed to maximum

HEF4094B v.8 20100402 Product data sheet - HEF4094B v.7

HEF4094B v.7 20091216 Product data sheet - HEF4094B v.6

HEF4094B v.6 20091103 Product data sheet - HEF4094B v.5

HEF4094B v.5 20090728 Product data sheet - HEF4094B v.4

HEF4094B v.4 20081030 Product data sheet - HEF4094B_CNV v.3

HEF4094B_CNV v.3 19950101 Product specification - HEF4094B_CNV v.2

HEF4094B_CNV v.2 19950101 Product specification - -

Product data sheet Rev. 13 — 14 November 2018 15 / 17

Nexperia HEF4094B

8-stage shift-and-store register

14. Legal information

Data sheet status

Document status

[1][2]

Product

status [3]

Definition

Objective [short]

data sheet

Development This document contains data from

the objective specification for

product development.

Preliminary [short]

data sheet

Qualification This document contains data from

the preliminary specification.

Product [short]

data sheet

Production This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

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with the same product type number(s) and title. A short data sheet is

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detailed and full information. For detailed and full information see the relevant

full data sheet, which is available on request via the local Nexperia sales

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full data sheet shall prevail.

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data sheet shall define the specification of the product as agreed between

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the customer’s own risk.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using Nexperia products, and Nexperia accepts no liability for

any assistance with applications or customer product design. It is customer’s

sole responsibility to determine whether the Nexperia product is suitable

and fit for the customer’s applications and products planned, as well as

for the planned application and use of customer’s third party customer(s).

Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Nexperia does not accept any liability related to any default, damage, costs

or problem which is based on any weakness or default in the customer’s

applications or products, or the application or use by customer’s third party

customer(s). Customer is responsible for doing all necessary testing for the

customer’s applications and products using Nexperia products in order to

avoid a default of the applications and the products or of the application or

use by customer’s third party customer(s). Nexperia does not accept any

liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — Nexperia products are

sold subject to the general terms and conditions of commercial sale, as

published at http://www.nexperia.com/profile/terms, unless otherwise agreed

in a valid written individual agreement. In case an individual agreement is

concluded only the terms and conditions of the respective agreement shall

apply. Nexperia hereby expressly objects to applying the customer’s general

terms and conditions with regard to the purchase of Nexperia products by

customer.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific Nexperia product is automotive qualified, the

product is not suitable for automotive use. It is neither qualified nor tested in

accordance with automotive testing or application requirements. Nexperia

accepts no liability for inclusion and/or use of non-automotive qualified

products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards,

customer (a) shall use the product without Nexperia’s warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

Nexperia’s specifications such use shall be solely at customer’s own risk,

and (c) customer fully indemnifies Nexperia for any liability, damages or failed

product claims resulting from customer design and use of the product for

automotive applications beyond Nexperia’s standard warranty and Nexperia’s

product specifications.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

Product data sheet Rev. 13 — 14 November 2018 16 / 17

Nexperia HEF4094B

8-stage shift-and-store register

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Ordering information....................................................1

4. Functional diagram.......................................................2

5. Pinning information......................................................3

5.1. Pinning.........................................................................3

5.2. Pin description............................................................. 3

6. Functional description................................................. 4

7. Limiting values............................................................. 5

8. Recommended operating conditions..........................5

9. Static characteristics....................................................6

10. Dynamic characteristics............................................ 7

10.1. Waveforms and test circuit........................................ 8

11. Application information............................................11

12. Package outline........................................................ 12

13. Revision history........................................................15

14. Legal information......................................................16

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 14 November 2018

Product data sheet Rev. 13 — 14 November 2018 17 / 17