1
®
FN8229.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL90461
Digitally Controlled Potentiometer (XDCP™)
Single Volatile 32-Tap XDCP
The Intersil ISL90461 is a digitally controlled potentiometer
(XDCP). Configured as a variable resistor, the device
consists of a resistor array, wiper switches, a control section,
and volatile memory. The wiper position is controlled by a 2-
pin Up /Down interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS and U/D inputs.
The device can be used in a wide variety of applications
including:
• LCD contrast control
• Parameter and bias adjustments
• Industrial and Automotive Control
• Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
• Laser Diode driver biasing
• Gain control and offset adjustment
Features
• Volatile solid-state potentiometer
• 2-pin UP/DN interface
• DCP terminal voltage, 2.7V to 5.5V
• Tempco 35 ppm/°C typical
• 32 wiper tap points
• Low power CMOS
- Active current, 25µA max.
- Supply current 0.3µA
• Available RTOTAL values = 10kΩ, 50kΩ, 100kΩ
• Temperature Range -40°C to +85°C
• Packages
- 6 Ld SC-70, SOT-23
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
ISL90461
(SOT-23, SC-70)
TOP VIEW
VDD
GND
U/D CS
RL
RH
Ordering Information
PART NUMBER PART MARKING RTOTAL (K) TEMP RANGE (°C) PACKAGE PKG. DWG. #
ISL90461WIE627-TK AJP 10 -40 to +85 6 Ld SC-70 P6.049
ISL90461WIE627Z-TK (See Note) DEE -40 to +85 6 Ld SC-70 (Pb-free) P6.049
ISL90461WIH627-TK AJY -40 to +85 6 Ld SOT-23 P6.064
ISL90461WIH627Z-TK (See Note) DEF -40 to +85 6 Ld SOT-23 (Pb-free) P6.064
ISL90461UIE627-TK AJR 50 -40 to +85 6 Ld SC-70 P6.049
ISL90461UIE627Z-TK (See Note) DEC -40 to +85 6 Ld SC-70 (Pb-free) P6.049
ISL90461UIH627-TK AKA -40 to +85 6 Ld SOT-23 P6.064
ISL90461UIH627Z-TK (See Note) DED -40 to +85 6 Ld SOT-23 (Pb-free) P6.064
ISL90461TIE627-TK AJQ 100 -40 to +85 6 Ld SC-70 P6.049
ISL90461TIE627Z-TK (See Note) DEA -40 to +85 6 Ld SC-70 (Pb-free) P6.049
ISL90461TIH627-TK AJZ -40 to +85 6 Ld SOT-23 P6.064
ISL90461TIH627Z-TK (See Note) DEB -40 to +85 6 Ld SOT-23 (Pb-free) P6.064
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020
Data Sheet October 14, 2005
2FN8229.3
October 14, 2005
Block Diagram
CONTROL
AND
MEMORY
UP/DOWN
(U/D)
DEVICE SELECT
(CS)
GND (GROUND)
RH
RL
GENERAL
VCC
Pin Descriptions
6-PIN SYMBOL DESCRIPTION
1 VDD Supply voltage
2 GND Ground
3U/D
Up - Down
4 CS Chip select
5 RL Low terminal
6 RH High terminal/ Wiper terminal
ISL90461
3FN8229.3
October 14, 2005
Equivalent Circuit
Absolute Maximum Ratings Recommended Operating Conditions
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, U/D and VCC
with respect to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . . 300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Power rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mW
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Potentiometer Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL PARAMETER TEST CONDITIONS/NOTES MIN
TYP
(Note 4) MAX UNIT
RTOT End to end resistance W version 8 10 12 kΩ
U version 405060kΩ
T version 80 100 120 kΩ
VRRH, RL terminal voltages 0 VCC V
Noise Ref: 1kHz -120 dBV
RWWiper Resistance 600 Ω
IWWiper Current 0.6 mA
Resolution 132Taps
Absolute linearity (Note 1) RH(n)(actual) -R
H(n)(expected) ±1 MI
(Note 3)
Relative linearity (Note 2) RH(n+1) -[R
H(n)+MI]±0.5MI
(Note 3)
RTOTAL temperature coefficient ±35 ppm/°C
CH/CL/CWPotentiometer capacitances See equivalent circuit 10/10/25 pF
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (RH(n)(actual) - RH(n)(expected)) = ±1 Ml Maximum.
n = 1 .. 29 only
2. Relative linearity is a measure of the error in step size between taps = RH(n+1) -[R
H(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only.
3. 1 Ml = Minimum Increment = RTOT/31.
4. Typical values are for TA = 25°C and nominal supply voltage.
CHCL
RW
RTOTAL
CW
RHRL
ISL90461
4FN8229.3
October 14, 2005
DC Electrical Specifications Over recommended operating conditions unless otherwise specified.
SYMBOL PARAMETER TEST CONDITIONS MIN
TYP
(Note 4) MAX UNIT
ICC VCC active current (Increment) CS = 0V, U/D = fclock = 1MHz and VCC =3V 25 µA
ISB Standby supply current CS = VCC, U/D = GND or VCC = 3V 0.3 1 µA
ILI CS input leakage current VIN = GND to VCC ±1 µA
VIH CS, U/D input HIGH voltage VCC x 0.7 V
VIL CS, U/D input LOW voltage VCC x 0.3 V
CIN CS, U/D input capacitance VCC = 3V, VIN = VSS, TA= 25°C, f = 1MHz 10 pF
Timing Specifications (Over recommended operating conditions unless otherwise specified)
SYMBOL PARAMETER MIN TYP (Note 4) MAX UNIT
tCU U/D to CS setup 25 ns
tCI CS to U/D setup 50 ns
tIC CS to U/D hold 25 ns
tlL U/D LOW period 300 ns
tlH U/D HIGH period 300 ns
fTOGGLE Up/Down toggle Rate 1 MHz
tSETTLE Output settling time 1 µs
CS
U/D
RH - RL
tCU
tCI
tIL
tIH
tIC
tSETTLE
FIGURE 1. SERIAL INTERFACE TIMING DIAGRAM, INCREMENT
ISL90461
5FN8229.3
October 14, 2005
Pin Descriptions
RH and RL
The ISL90461 contains a digital potentiometer configured as
a variable resistor. The wiper of the potentiometer is tied to
one end of the potentiometer at terminal RH, and the RL pin
is the other terminal of the potentiometer. The resistance
from the RH pin to the RL pin will vary with the potentiometer
setting. At the highest setting the resistance will be
maximum (Rtot) and at the lowest setting it will be minimum.
As the wiper position is incremented, the wiper will move
from the Low terminal to the High terminal.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in volatile memory when CS
is returned HIGH. When CS is high, the device is placed in
low power standby mode.
Principles of Operation
There are two sections of the ISL90461: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single
electronic switch connecting a point on the resistor array to
the wiper output. The resistor array is comprised of 31
individual resistors connected in series. At either end of the
array and between each resistor is an electronic switch that
transfers the connection at that point to the wiper. The wiper
is connected to the RH terminal, forming a variable resistor
from RH to RL.
The direction of the wiper movement is defined when the
device is selected. If during CS transition from High to Low
the U/D input is LOW, the wiper will move down on each
rising edge of U/D toggling. Similarly, the wiper will move up
on each rising edge of U/D toggling if, during CS transition
from High to Low, the U/D input is High.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for tSETTLE (U/D to RH change). The
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
CS
U/D
RH - RL
tCU
tCI
tIL
tIH
tIC
tSETTLE
FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM, DECREMENT
ISL90461
6FN8229.3
October 14, 2005
ISL90461
Small Outline Transistor Plastic Packages (SC70-6)
D
e1
E
C
L
e
b
C
L
A2
AA1
C
L
0.20 (0.008) M
0.10 (0.004) C
C
-C-
SEATING
PLANE
123
456 E1
C
L
C
VIEW C
VIEW C
L
R1
R
4X θ1
4X θ1
GAUGE PLANE
L1
SEATING
αL2
C
PLANE
c
BASE METAL
WITH
c1
b1
PLATING
b
P6.049
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.031 0.043 0.80 1.10 -
A1 0.000 0.004 0.00 0.10 -
A2 0.031 0.039 0.00 1.00 -
b 0.006 0.012 0.15 0.30 -
b1 0.006 0.010 0.15 0.25
c 0.003 0.009 0.08 0.22 6
c1 0.003 0.009 0.08 0.20 6
D 0.073 0.085 1.85 2.15 3
E 0.071 0.094 1.80 2.40 -
E1 0.045 0.053 1.15 1.35 3
e 0.0256 Ref 0.65 Ref -
e1 0.0512 Ref 1.30 Ref -
L 0.010 0.018 0.26 0.46 4
L1 0.017 Ref. 0.420 Ref.
L2 0.006 BSC 0.15 BSC
N6 65
R 0.004 - 0.10 -
R1 0.004 0.010 0.15 0.25
α0o8o0o8o-
Rev. 2 9/03
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
7
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8229.3
October 14, 2005
ISL90461
Small Outline Transistor Plastic Packages (SOT23-6)
D
e1
E
C
L
e
b
C
L
A2
AA1
C
L
0.20 (0.008) M
0.10 (0.004) C
C
-C-
SEATING
PLANE
123
456 E1
C
L
C
VIEW C
VIEW C
L
R1
R
4X θ1
4X θ1
GAUGE PLANE
L1
SEATING
αL2
C
PLANE
c
BASE METAL
WITH
c1
b1
PLATING
b
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.036 0.057 0.90 1.45 -
A1 0.000 0.0059 0.00 0.15 -
A2 0.036 0.051 0.90 1.30 -
b 0.012 0.020 0.30 0.50 -
b1 0.012 0.018 0.30 0.45
c 0.003 0.009 0.08 0.22 6
c1 0.003 0.008 0.08 0.20 6
D 0.111 0.118 2.80 3.00 3
E 0.103 0.118 2.60 3.00 -
E1 0.060 0.068 1.50 1.75 3
e 0.0374 Ref 0.95 Ref -
e1 0.0748 Ref 1.90 Ref -
L 0.014 0.022 0.35 0.55 4
L1 0.024 Ref. 0.60 Ref.
L2 0.010 Ref. 0.25 Ref.
N6 65
R 0.004 - 0.10 -
R1 0.004 0.010 0.10 0.25
α0o8o0o8o-
Rev. 3 9/03
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC-74 and JEDEC MO178AB.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
