Low Voltage 1.65 V to 3.6 V, Bidirectional
Logic Level Translation, Bypass Switch
Data Sheet ADG3233
Rev. C Document Feedback
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FEATURES
Operates from 1.65 V to 3.6 V supply rails
Bidirectional level translation, unidirectional signal path
8-lead SOT-23 and MSOP packages
Bypass or normal operation
Short circuit protection
APPLICATIONS
JTAG chain bypassing
Daisy-chain bypassing
Digital switching
FUNCTIONAL BLOCK DIAGRAM
A1 Y1
Y2
A2
GND
ADG3233
V
CC1
V
CC2
V
CC1
V
CC1
V
CC1
V
CC2
V
CC2
EN
0
1
03297-001
Figure 1.
GENERAL DESCRIPTION
The ADG32331 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V. It
operates from two supply voltages, allowing bidirectional level
translation, that is, it translates low voltages to higher voltages
and vice versa. The signal path is unidirectional, meaning data
may only flow from A Y.
This type of device may be used in applications that require a
bypassing function. It is ideally suited to bypassing devices in
a JTAG chain or in a daisy-chain loop. One switch could be
used for each device or a number of devices, thus allowing
easy bypassing of one or more devices in a chain. This may
be particularly useful in reducing the time overhead in testing
devices in the JTAG chain or in daisy-chain applications where
the user does not wish to change the settings of a particular device.
The bypass switch is packaged in two of the smallest footprints
available for its required pin count. The 8-lead SOT-23 package
requires only 2.9 mm × 2.8 mm board space, while the MSOP
package occupies approximately 3 mm × 4.9 mm board area.
PRODUCT HIGHLIGHTS
1. Bidirectional level translation matches any voltage level
from 1.65 V to 3.6 V.
2. The bypass switch offers high performance and is fully
guaranteed across the supply range.
3. Short circuit protection.
4. Tiny 8-lead SOT-23 package and 8-lead MSOP.
Table 1. Truth Table
EN Signal Path Function
L A1 Y2, Y1 VCC1 Enable bypass mode
H A1 Y1, A2 Y2 Enable normal mode
1 U.S. Patent Number: 7,369,385 B2.
ADG3233 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Test Wavefor ms ............................................................................. 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 13
A1 and EN Input ........................................................................ 13
Normal Operation ...................................................................... 13
Bypass Operation ....................................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
REVISION HISTORY
4/15Rev. B to Rev. C
Changes to Table 4 ............................................................................ 7
Changes to Ordering Guide .......................................................... 16
7/13Rev. A to Rev. B
Changes to Table 1 ............................................................................ 1
7/11Rev. 0 to Rev. A
Changes to Patent Number, General Description Section, and
Product Highlights Section ............................................................. 1
Changes to VCC = VCC1 = VCC2 = 2.5 V ± 0.2 V, ENABLE Time
EN Y1, Table 2 ............................................................................. 4
Changes to Table 3 ............................................................................ 6
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
5/03Revision 0: Initial Version
Rev. C | Page 2 of 16
Data Sheet ADG3233
SPECIFICATIONS
VCC1 = VCC2 = 1.65 V to 3.6 V, GND = 0 V, all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter1 Symbol Test Conditions/Comments Min Typ2 Max Unit
LOGIC INPUTS/OUTPUTS3 VCC2 = 1.65 V to 3.6 V, GND = 0 V
Input High Voltage4 VIH VCC1 = 3.0 V to 3.6 V 1.35 V
VCC1 = 2.3 V to 2.7 V 1.35 V
VCC1 = 1.65 V to 1.95 V 0.65 × VCC V
Input Low Voltage4 VIL VCC1 = 3.0 V to 3.6 V 0.8 V
VCC1 = 2.3 V to 2.7 V 0.7 V
V
CC1
= 1.65 V to 1.95 V
0.35 × V
CC
V
Output High Voltage (Y1) VOH IOH = −100 µA, VCC1 = 3.0 V to 3.6 V 2.4 V
IOH = −100 µA, VCC1 = 2.3 V to 2.7 V 2.0 V
IOH = −100 µA, VCC1 = 1.65 V to 1.95 V VCC − 0.45 V
IOH = −4 mA, VCC1 = 2.3 V to 2.7 V 2.0 V
IOH = −4 mA, VCC1 = 1.65 V to 1.95 V VCC0.45 V
IOH = −8 mA, VCC1 = 3.0 V to 3.6 V 2.4 V
Output Low Voltage (Y1) VOL IOL = 100 µA, VCC1 = 3.0 V to 3.6 V 0.40 V
IOL = 100 µA, VCC1 = 2.3 V to 2.7 V 0.40 V
IOL = 100 µA, VCC1 = 1.65 V to 1.95 V 0.45 V
IOL = 4 mA, VCC1 = 2.3 V to 2.7 V 0.40 V
IOL = 4 mA, VCC1 = 1.65 V to 1.95 V 0.45 V
IOL = 8 mA, VCC1 = 3.0 V to 3.6 V 0.40 V
LOGIC OUTPUTS3 VCC1 = 1.65 V to 3.6 V, GND = 0 V
Output High Voltage (Y2)
V
OH
I
OH
= −100 µA, V
CC2
= 3.0 V to 3.6 V
2.4
V
IOH = −100 µA, VCC2 = 2.3 V to 2.7 V 2.0 V
IOH = −100 µA, VCC2 = 1.65 V to 1.95 V VCC − 0.45 V
IOH = −4 mA, VCC2 = 2.3 V to 2.7 V 2.0 V
IOH = −4 mA,VCC2 = 1.65 V to 1.95 V VCC0.45 V
IOH = −8 mA, VCC2 = 3.0 V to 3.6 V 2.4 V
Output Low Voltage (Y2) VOL IOL = 100 µA, VCC2 = 3.0 V to 3.6 V 0.40 V
IOL = 100 µA, VCC2 = 2.3 V to 2.7 V 0.40 V
IOL = 100 µA, VCC2 = 1.65 V to 1.95 V 0.45 V
IOL = 4 mA, VCC2 = 2.3 V to 2.7 V 0.40 V
IOL = 4 mA, VCC2 = 1.65 V to 1.95 V 0.45 V
I
OL
= 8 mA, V
CC2
= 3.0 V to 3.6 V
0.40
V
SWITCHING CHARACTERISTICS 4, 5
VCC = VCC1 = VCC2 = 3.3 V ± 0.3 V
Propagation Delay, t
PD
A1
Y1 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 3.5 5.4 ns
A2
Y2 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 3.5 5.4 ns
A1
Y2 Bypass Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 4 6.5 ns
ENABLE Time EN
Y1 tEN CL = 30 pF, VT = VCC/2 4 6 ns
DISABLE Time EN Y1 tDIS CL = 30 pF, VT = VCC/2 2.8 4 ns
ENABLE Time EN
Y2 tEN CL = 30 pF, VT = VCC/2 4.5 6.5 ns
DISABLE Time EN
Y2 tDIS CL = 30 pF, VT = VCC/2 4 6.5 ns
Rev. C | Page 3 of 16
ADG3233 Data Sheet
Parameter1 Symbol Test Conditions/Comments Min Typ2 Max Unit
VCC = VCC1 = VCC2 = 2.5 V ± 0.2 V
Propagation Delay, tPD
A1
Y1 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 4.5 6.2 ns
A2
Y2 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 4.5 6.2 ns
A1
Y2 Bypass Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 4.5 6.5 ns
ENABLE Time EN
Y1 tEN CL = 30 pF, VT = VCC/2 5 7.2 ns
DISABLE Time EN
Y1 tDIS CL = 30 pF, VT = VCC/2 3.2 4.7 ns
ENABLE Time EN Y2 tEN CL = 30 pF, VT = VCC/2 5 7.7 ns
DISABLE Time EN Y2 tDIS CL = 30 pF, VT = VCC/2 4.8 7.2 ns
VCC = VCC1 = VCC2 = 1.8 V ± 0.15 V
Propagation Delay, tPD
A1
Y1 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 6.7 10 ns
A2
Y2 Normal Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 6.5 10 ns
A1
Y2 Bypass Mode tPHL, tPLH CL = 30 pF, VT = VCC/2 6.5 10.25 ns
ENABLE Time EN Y1 tEN CL = 30 pF, VT = VCC/2 7 10.5 ns
DISABLE Time EN
Y1 tDIS CL = 30 pF, VT = VCC/2 4.4 6.5 ns
ENABLE Time EN
Y2 tEN CL = 30 pF, VT = VCC/2 7 12 ns
DISABLE Time EN Y2 tDIS CL = 30 pF, VT = VCC/2 6.5 10.5 ns
Input Leakage Current II 0 ≤ VIN 3.6 V ±1 µA
Output Leakage Current IO 0 ≤ VIN3.6 V ±1 µA
POWER REQUIREMENTS
Power Supply Voltages VCC1 1.65 3.6 V
VCC2 1.65 3.6 V
Quiescent Power Supply Current ICC1 Digital inputs = 0 V or VCC 2 µA
I
CC2
Digital inputs = 0 V or V
CC
2
µA
Increase in ICC per Input ΔICC1 VCC = 3.6 V, one input at 3.0 V; others at
VCC or GND
0.75 µA
1 Temperature range is as follows: B Version: −40°C to +85°C.
2 All typical values are at VCC = VCC1 = VCC2, TA = 25°C, unless otherwise stated.
3 VIL and VIH levels are specified with respect to VCC1, VOH, and VOL levels for Y1 are specified with respect to VCC1, and VOH, and VOL levels are specified for Y2 with respect to
VCC2.
4 Guaranteed by design, not subject to production test.
5 See the Test Waveforms section.
Rev. C | Page 4 of 16
Data Sheet ADG3233
Rev. C | Page 5 of 16
TEST WAVEFORMS
INPUT
OUTPUT
V
CC1
0V
V
T
tPLH tPHL
V
T
V
OH
V
OL
03297-032
Figure 2. Propagation Delay
EN
Y1
(A1 AT GND)
V
CC1
0V
V
T
V
T
V
T
t
DIS
t
EN
V
OH
V
OL
03297-033
Figure 3. Y1 Enable and Disable Times
EN
A1
V
CC1
V
CC1
V
CC1
0V
0V
0V
V
T
V
T
t
DIS
t
EN
V
T
V
OL
V
OLH
03297-034
A2
Y2
Figure 4. Y2 Enable and Disable Times
ADG3233 Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC to GND 0.3 V to +4.6 V
Digital Inputs to GND 0.3 V to +4.6 V
A1, EN 0.3 V to +4.6 V
A2 0.3 V to VCC1 + 0.3 V
DC Output Current 25 mA
Operating Temperature Range
Industrial (B Version) 40°C to +85°C
Storage Temperature Range 65°C to +150°C
Junction Temperature 150°C
8-Lead MSOP
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 43°C/W
θJA Thermal Impedance 211°C/W
Lead Temperature, Soldering (10 sec) 300°C
IR Reflow, Peak Temperature (<20 sec) 235°C
Soldering (Pb-Free)
260(+0/−5)°C
Time at Peak Temperature 20 sec to 40 sec
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating may be applied at any one
time.
ESD CAUTION
Rev. C | Page 6 of 16
Data Sheet ADG3233
Rev. C | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VCC1 1
A1 2
A2 3
EN 4
VCC2
8
Y17
Y26
GND5
ADG3233
TOP VIEW
(Not to Scale)
03297-002
Figure 5. 8-Lead SOT-23 Package (RJ-8)
EN
V
CC2 1
Y1
2
Y2
3
GND
4
V
CC1
8
A1
7
A2
6
5
ADG3233
TOP VIEW
(Not to Scale)
03297-003
Figure 6. 8-Lead MSOP Package (RM-8)
Table 4. Pin Function Descriptions
Pin No.
RJ-8 RM-8 Mnemonic Description
1 8 VCC1 Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V.
8 1 VCC2 Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V.
2 7 A1 Input Referred to VCC1.
3 6 A2 Input Referred to VCC1.
7 2 Y1 Output Referred to VCC1.
6 3 Y2 Output Referred to VCC2. Voltage levels appearing at Y2 will be translated from a VCC1 voltage level to a VCC2
voltage level.
4 5 EN Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode.
5 4 GND Device Ground.
ADG3233 Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
01.5 2.0 2.5 3.0
V
CC1
(V)
I
CC1
(n A)
3.5 4.0
T
A
= 25° C
V
CC2
= 2.5V
V
CC2
= 1.8V
V
CC2
= 3.3V
03297-004
Figure 7. ICC1 vs. VCC1
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
01.5 2.0 2.5 3.0
VCC2 (V)
ICC2 (n A)
3.5 4.0
TA = 25° C
VCC1 = 2. 5V
VCC1 = 1. 8V
VCC1 = 3. 3V
03297-005
Figure 8. ICC2 vs. VCC2
30
25
20
15
10
5
0010 20 30 40 50 60 70 80
TEMPERATURE (°C)
ICC1 (n A)
VCC2 = 3. 3V
VCC1 = 2. 5V
VCC1 = 3. 3V
VCC1 = 1. 8V
03297-006
Figure 9. ICC1 vs. Temperature
30
25
20
15
10
0
–5
5
010 20 30 40 50 60 70 80
TEMPERATURE (°C)
ICC2 (n A)
VCC1 = 3. 3V
VCC2 = 3. 3V
VCC2 = 2. 5V
VCC2 = 1. 8V
03297-007
Figure 10. ICC2 vs. Temperature
2000
1800
1600
1400
1200
1000
800
600
400
200
0
10k 100k 1M 10M 100M
I
CC1
(µA)
FREQUENCY (Hz)
T
A
= 25° C
V
CC1
= V
CC2
= 3.3V
V
CC1
= V
CC2
= 1.8V
03297-008
Figure 11. ICC1 vs. Frequency, Normal Mode
80
70
60
50
40
30
20
10
0
10k 100k 1M 10M 100M
ICC1 A)
FREQUENCY (Hz)
TA = 25° C
VCC1 = VCC2 = 3.3V
VCC1 = VCC2 = 1.8V
03297-009
Figure 12. ICC1 vs. Frequency, Bypass Mode
Rev. C | Page 8 of 16
Data Sheet ADG3233
2000
1800
1600
1400
1200
1000
800
600
400
200
0
10k 100k 1M 10M 100M
ICC2 A)
FREQUENCY (Hz)
TA = 25° C
VCC1
= V
CC2
= 3.3V
VCC1 = VCC2 = 1.8V
03297-010
Figure 13. ICC2 vs. Frequency, Normal Mode
2000
1800
1600
1400
1200
1000
800
600
400
200
0
10k 100k 1M 10M 100M
I
CC2
(µA)
FREQUENCY (Hz)
T
A
= 25° C
V
CC1
= V
CC2
= 3.3V
V
CC1
= V
CC2
= 1.8V
03297-011
Figure 14. ICC2 vs. Frequency, Bypass Mode
10
8
6
4
2
1.5 2.0 2.5
SUPPLY (V)
TIME (ns)
3.0 3.5 4.0
0
t
DIS
t
EN
T
A
= 25° C
V
CC1
= V
CC2
03297-012
Figure 15. Y1 Enable, Disable Time vs. Supply
10
8
6
4
2
1.5 2.0 2.5
SUPPLY (V)
TIME (ns)
3.0 3.5 4.0
0
tDIS
TA = 25° C
VCC1 = VCC2
03297-013
tEN
Figure 16. Y2 Enable, Disable Time vs. Supply
6
4
5
3
2
1
–40 –20 0TEMPERATURE (°C)
TIME (ns)
20 40 60 80
0
tDIS
V
CC1
= V
CC2
= 3.3V
03297-014
tEN
Figure 17. Y1 Enable, Disable Time vs. Temperature
6
4
5
3
2
1
–40 –20 0TEMPERATURE (°C)
TIME (ns)
20 40 60 80
0
tDIS
V
CC1
= V
CC2
= 3.3V
03297-015
tEN
Figure 18. Y2 Enable, Disable Time vs. Temperature
Rev. C | Page 9 of 16
ADG3233 Data Sheet
16
14
10
6
2
12
8
4
22 32 52 6242 CAPACITIVE LOAD (pF)
RISE/FALL TI ME (n s)
72 82 92 102
0
VCC1 = 3. 3V
VCC2 = 1. 8V
TA = 25° C
DATA RATE = 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HI GH-TO-LOW TRANSITION
03297-016
Figure 19. Rise/Fall Time vs. Capacitive Load, A1 Y1, A2 Y2
16
14
10
6
2
12
8
4
22 32 52 6242 CAPACITIVE LOAD (pF)
RISE/FALL TI ME (n s)
72 82 92 102
0
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HI GH-TO-LOW TRANSITION
VCC1 = 3. 3V
VCC2 = 1. 8V
TA = 25° C
DATA RATE = 10Mbps
03297-017
Figure 20. Rise/Fall Time vs. Capacitive Load, A1 Y2, Bypass Mode
10
9
5
3
1
7
8
6
4
2
22 32 52 6242 CAPACITIVE LOAD (pF)
RISE/FALL TI ME (n s)
72 82 92 102
0
VCC1 = 1. 8V
VCC2 = 3. 3V
TA = 25° C
DATA RATE = 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HI GH-TO-LOW TRANSITION
03297-018
Figure 21. Rise/Fall Time vs. Capacitive Load, A1 Y1, A2 Y2
10
9
5
3
1
7
8
6
4
2
22 32 52 6242 CAPACITIVE LOAD (pF)
RISE/FALL TI ME (n s)
72 82 92 102
0
VCC1 = 1. 8V
VCC2 = 3. 3V
TA = 25° C
DATA RATE = 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
tPHL, HI GH-TO-LOW TRANSITION
03297-019
Figure 22. Rise/Fall Time vs. Capacitive Load, A1 Y2, Bypass Mode
5
3
1
7
8
6
4
2
22 32 52 6242 CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
72 82 92 102
0
VCC1 = 3. 3V
VCC2 = 3. 3V
TA = 25° C
DATA RATE = 10Mbps
03297-020
t
PLH, LOW-TO-HIGH TRANSITION
t
PHL, HIGH-TO-LOW TRANSITION
Figure 23. Propagation Delay vs. Capacitive Load A1 Y1
5
3
1
7
8
6
4
2
22 32 52 6242 CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
72 82 92 102
0
VCC1 = 3. 3V
VCC2 = 3. 3V
TA = 25° C
DATA RATE = 10Mbps
03297-021
t
PLH, LOW-TO-HIGH TRANSITION
t
PHL, HIGH-TO-LOW TRANSITION
Figure 24. Propagation Delay vs. Capacitive Load A2 Y2
Rev. C | Page 10 of 16
Data Sheet ADG3233
Rev. C | Page 11 of 16
5
3
1
7
8
6
4
2
22 32 52 6242
CAPACITIVE LOAD (pF)
PROPA
G
A
TION DEL
A
Y (ns)
72 82 92 102
0
V
CC1
= 3.3V
V
CC2
= 3.3V
T
A
= 25°C
DATA RATE = 10Mbps
03297-022
t
PLH,
LOW-TO-HIGH TRANSITION
t
PHL,
HIGH-TO-LOW TRANSITION
Figure 25. Propagation Delay vs. Capacitive Load A1 Y2, Bypass Mode
5
3
1
7
8
6
4
2
1.5 2.0 2.5 3.0 3.5
SUPPLY (V)
PROPA
G
A
TION DEL
A
Y (ns)
4.0
0
V
CC1
= V
CC2
T
A
= 25°C
03297-023
t
PLH,
A1 Y1
t
PHL,
A2 Y2
t
PHL,
A1 Y1
t
PLH,
A2 Y2
Figure 26. Propagation Delay vs. Supply, Normal Mode
8
6
4
2
1.5 2.0 2.5 3.0 3.5
SUPPLY (V)
PROPA
G
A
TION DEL
A
Y (ns)
4.0
0
V
CC1
= V
CC2
T
A
= 25°C
03297-024
t
PHL,
A1 Y2
t
PLH,
A1 Y2
Figure 27. Propagation Delay vs. Supply, Bypass Mode
–40 –20 0
TEMPERATURE (°C)
20 40 60 80
03297-025
VCC1 = VCC2 = 3.3V
t
PLH,A1 Y1
t
PHL,A2 Y2
2.5
1.5
0.5
3.5
4.0
3.0
2.0
1.0
PROPA
G
A
TION DEL
A
Y (ns)
0
t
PLH,A2 Y2
t
PHL,A1 Y1
Figure 28. Propagation Delay vs. Temperature, Normal Mode
–40 –20 0
TEMPERATURE (°C)
20 40 60 80
03297-026
VCC1 = VCC2 = 3.3V
4
3
2
1
PROPA
G
A
TION DEL
A
Y (ns)
0
t
PHL,A1 Y2
t
PLH,A1 Y2
Figure 29. Propagation Delay vs. Temperature, Bypass Mode
CH1 1.00V CH2 500mV
CH3 1.00VCH4 1.00V
M5.00ns CH1 1.48V
3
2
4
1
EN = HIGH
T
A
= 25°C
DATA RATE = 10MHz
A1
Y1
3.3V
3.3V
1.8V
A2
Y2
03297-027
Figure 30. Normal Mode VCC1 = 3.3 V, VCC2 = 1.8 V
ADG3233 Data Sheet
CH2 1.00VΩ CH2 500mV M5.00ns CH2 1. 47V
3
2
A1 3.3V
1.8V
Y2
03297-028
DATA RATE = 10M Hz
TA = 25° C
Figure 31. Bypass Mode, VCC1 = 3.3 V, VCC2 = 1.8 V
CH1 1.00V CH2 2.00V
CH3 5.00VΩ CH4 1.00VΩ M5.00ns CH1 1. 48V
3
2
4
1
DATA RATE = 10M Hz
T
A
= 25° C
A1
Y1
3.3V
3.3V
1.8V
1.8V
A2
Y2
03297-029
Figure 32. Normal Mode, VCC1 = 1.8 V, VCC2 = 3.3 V
CH1 1.00V CH2 2.00V
CH3 1.00VΩ M5.00ns CH3 900mV
3
2
1
DATA RATE = 10M Hz
T
A
= 25° C
A1
Y2
Y1
3.3V
1.8V
1.8V
03297-030
Figure 33. Bypass Mode, VCC1 = 1.8 V, VCC2 = 3.3 V
0 5 CURRENT ( mA)
10 15 20
03297-031
V
CC
= 3.3V
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= 2.5V
V
CC
= 1.8V
V
CC
= 1.8V
SOURCE
SINK
2.5
1.5
0.5
3.5
3.0
2.0
1.0
VOLTAGE (V)
0
V
CC
= V
CC1
= V
CC2
T
A
= 25° C
Figure 34. Y1 and Y2 Source and Sink Current
Rev. C | Page 12 of 16
Data Sheet ADG3233
Rev. C | Page 13 of 16
THEORY OF OPERATION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V. It
operates from two supply voltages, allowing bidirectional level
translation, that is, it translates low voltages to higher voltages
and vice versa. The signal path is unidirectional, meaning data
may only flow from A Y.
A1 AND EN INPUT
The A1 and enable (EN) inputs have VIL/VIH logic levels so that
the part can accept logic levels of VOL/VOH from Device 0 or the
controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1, EN) are
capable of accepting inputs outside the VCC1 supply range. For
example, the VCC1 supply applied to the bypass switch could be
1.8 V while Device 0 could be operating from a 2.5 V or 3.3 V
supply rail, there are no internal diodes to the supply rails, so
the device can handle inputs above the supply but inside the
absolute maximum ratings.
NORMAL OPERATION
Figure 35 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 Y1 and A2 Y2.
The device will level translate the signal applied to A1 to a VCC1
logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which
will have standard VOL/VOH levels for VCC1 supplies. The signal
is then passed through Device 1 and back to the A2 input pin
of the bypass switch.
The logic level inputs of A2 are with respect to the VCC1 supply.
The signal will be level translated from VCC1 to VCC2 and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the VCC2 supply.
V
CC2
V
CC1
V
CC0
SIGNAL INPUT
A1
A2
Y1
Y2
LOGIC 1
SIGNAL OUTPUT
DEVICE 0 DEVICE 1 DEVICE 2
VCC2
VCC1
03297-035
EN
BYPASS SWITCH
Figure 35. Bypass Switch in Normal Mode
ADG3233 Data Sheet
Rev. C | Page 14 of 16
BYPASS OPERATION
Figure 36 illustrates the device as used in bypass mode. The
signal path is now from A1 directly to Y2, thus bypassing
Device 1 completely. The signal will be level translated to a VCC2
logic level and available on Y2, where it may be applied directly
to the input of Device 2. In bypass mode, Y1 is pulled up to VCC1.
The three supplies in Figure 35 and Figure 36 may be any
combination of supplies, that is., VCC0, VCC1, and VCC2 may be
any combination of supplies, for example, 1.8 V, 2.5 V, and 3.3 V.
V
CC2
V
CC1
V
CC0
SIGNAL INPUT
EN
A1
A2
Y1
Y2
LOGIC 0
SIGNAL OUTPUT
DEVICE 0 DEVICE 1
BYPASS SWITCH
DEVICE 2
VCC2
VCC1
03297-036
Figure 36. Bypass Switch in Bypass Mode
Data Sheet ADG3233
Rev. C | Page 15 of 16
OUTLINE DIMENSIONS
COM P LI ANT T O JE DE C S TANDARDS M O-187-AA
0.80
0.55
0.40
4
8
1
5
0.65 BS C
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 37. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-178-BA
SEATING
PLANE
1.95
BSC
0.65 BSC
0.60
BSC
76
1234
5
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0
.15 MAX
0
.05 MIN
1.45 MAX
0.95 MIN
0.22 MAX
0.08 MIN
0.38 MAX
0.22 MIN
0.60
0.45
0.30
PIN 1
INDICATOR
8
12-16-2008-A
Figure 38. 8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
ADG3233 Data Sheet
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Branding
Package Option
ADG3233BRJ-REEL7 40°C to +85°C 8-Lead SOT-23 W1B RJ-8
ADG3233BRJZ-REEL7 40°C to +85°C 8-Lead SOT-23 S1S RJ-8
ADG3233BRMZ 40°C to +85°C 8-Lead MSOP S1S RM-8
1 Z = RoHS Compliant Part.
©20032015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03297-0-4/15(C)
Rev. C | Page 16 of 16