1www.pericom.com 03/27/13
Features
• PhasejitterlterforPCIe®2.0application
• FourPairsofDifferentialClocks
• Lowskew<50ps
• Lowjitter<50pscycle-to-cycle
• <1psadditiveRMSphasejitter
• OutputEnableforalloutputs
• OutputstristatecontrolviaSMBus
• ProgrammablePLLBandwidth
• 100MHzPLLModeoperation
• 100-400MHzBypassModeoperation
• 3.3VOperation
• Packaging(Pb-freeandGreen):
→28-PinSSOP(H28)
→28-PinTSSOP(L28)
PI6C20400A
Description
PericomSemiconductor'sPI6C20400AisaPCIe®2.0compliant
high-speed, low-noise differential clock buffer designed to be
companiontoPI6C410BS.Thedevicedistributesthedifferential
SRCclockfromPI6C410BStofourdifferentialpairsofclock
outputs either with or without PLL. The clock outputs are
controlledbyinputselectionofSRC_STOP#,PWRDWN#and
SMBus, SCLK and SDA. When input of either SRC_STOP#
or PWRDWN# is low, the output clocks are Tristated. When
PWRDWN#islow,theSDAandSCLKinputsmustbeTri-stated.
Block Diagram
1:4 Clock Driver for Intel PCIe® Chipsets
Pin Conguration
OUT0
OUT0#
OUT1
OUT1#
OUT2
OUT2#
OUT3
OUT3#
DIV
Output
Control
SMBus
Controller
PLL
PLL_BW#
SRC
SRC#
PLL/BYPASS#
SCLK
SDA
OE_INV
OE_0 & OE_3
SRC_STOP#
PWRDWN#
VDD_A
VSS_A
IREF
OE_INV
VDD
OUT3
OUT3#
OE_3
OUT2
OUT2#
VDD
PLL_BW#
SRC_STOP#
PWRDWN#
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VDD
SRC
SRC#
VSS
VDD
OUT0
OUT0#
OE_0
OUT1
OUT1#
VDD
PLL/BYPASS#
SCLK
SDA
14-0195
2
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Pin Descriptions
Pin Name Type Pin No Description
SRC&SRC# Input 2,3 0.7VDifferentialSRCinputfromPI6C410clocksynthesizer
OE_0&OE_3 Input 8,21
3.3VLVTTLinputforenablingoutputs,activehigh.
OE_0forOUT0/OUT0#
OE_3forOUT3/OUT3#
OE_INV Input 25
3.3VLVTTLinputforinvertingtheOE,SRC_STOP#and
PWRDWN#pins.
When0=samestage
When1=OE_0,OE_3,SRC_STOP#,PWRDWN#inverted.
OUT[0:3]&OUT[0:3]# Output 6,7,9,10,19,20,
22,23 0.7VDifferentialoutputs
PLL/BYPASS# Input 12 3.3VLVTTLinputforselectingfan-outofPLLoperation.
SCLK Input 13 SMBuscompatibleSCLOCKinput
SDA I/O 14 SMBuscompatibleSDATA
IREF Input 26 Externalresistorconnectiontosetthedifferentialoutputcurrent
SRC_STOP# Input 16 3.3VLVTTLinputforSRCstop,activelow
PLL_BW# Input 17 3.3VLVTTLinputforselectingthePLLbandwidth
PWRDWN# Input 15 3.3VLVTTLinputforPowerDownoperation,activelow
VDD Power 1,5,11,18,24 3.3VPowerSupplyforOutputs
VSS Ground 4 GroundforOutputs
VSS_A Ground 27 GroundforPLL
VDD_A Power 28 3.3VPowerSupplyforPLL
Serial Data Interface (SMBus)
ThispartisaslaveonlySMBusdevicethatsupportsindexedblockreadandindexedblockwriteprotocolusingasingle7-bit
addressandread/writebitasshownbelow.
Address Assignment
A6 A5 A4 A3 A2 A1 A0 W/R
1101 1 1 0 0/1
Data Protocol
1bit 7bits 1 1 8bits 18bits 18bits 18bits 11bit
Start
bit
Slave
Addr R/W Ack Register
offset Ack
Byte
Count
=N
Ack Data
Byte0 Ack …
Data
ByteN
-1
Ack Stop
bit
Notes:
1. Registeroffsetforindicatingthestartingregisterforindexedblockwriteandindexedblockread.ByteCountinwritemodecannotbe0.
14-0195
3
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Data Byte 0: Control Register
Bit Descriptions Type Power Up Condition Output(s) Affected Source
Pin
0
OutputsMode
0=Divideby2
1=Normal
RW 1=Normal OUT[0:3],OUT[0:3]# NA
1
PLL/BYPASS#
0=Fanout
1=PLL
RW 1=PLL OUT[0:3],OUT[0:3]# NA
2
PLLBandwidth
0=HighBandwidth,
1=LowBandwidth
RW 1=Low OUT[0:3],OUT[0:3]# NA
3Reserved NA
4 Reserved NA
5 Reserved NA
6
SRC_STOP#
0=Drivenwhenstopped
1=Tristate
RW 0=Drivenwhenstopped OUT[0:3],OUT[0:3]# NA
7
PWRDWN#
0=Drivenwhenstopped
1=Tristate
RW 0=Drivenwhenstopped OUT[0:3],OUT[0:3]# NA
Data Byte 1: Control Register
Bit Descriptions Type Power Up Condition Output(s) Affected Source
Pin
0 Reserved NA
1OUTPUTSenable
1=Enabled
0=Disabled
RW 1=Enabled OUT0,OUT0# NA
2RW 1=Enabled OUT1,OUT1# NA
3Reserved NA
4 Reserved NA
5 OUTPUTSenable
1=Enabled
0=Disabled
RW 1=Enabled OUT2,OUT2# NA
6RW 1=Enabled OUT3,OUT3# NA
7 Reserved NA
14-0195
4
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Data Byte 2: Control Register
Bit Descriptions Type Power Up Condition Output(s) Affected Source
Pin
0 Reserved NA
1AllowcontrolofOUTPUTSwith
assertionofSRC_STOP#
0=Freerunning
1=StoppedwithSRC_Stop#
RW 0=Freerunning OUT0,OUT0# NA
2RW 0=Freerunning OUT1,OUT1# NA
3Reserved NA
4 Reserved NA
5 AllowcontrolofOUTPUTSwith
assertionofSRC_STOP#
0=Freerunning
1=StoppedwithSRC_Stop#
RW 0=Freerunning OUT2,OUT2# NA
6RW 0=Freerunning OUT3,OUT3# NA
7 Reserved NA
Data Byte 3: Control Register
Bit Descriptions Type Power Up Condition Output(s) Affected Source
Pin
0
Reserved
RW
1RW
2RW
3RW
4RW
5RW
6RW
7RW
Data Byte 4: Pericom ID Register
Bit Descriptions Type Power Up Condition Output(s) Affected Pin
0
PericomID
R 0 NA NA
1R 0 NA NA
2 R 0 NA NA
3R 0 NA NA
4 R 0 NA NA
5 R 1NA NA
6 R 0 NA NA
7 R 0 NA NA
14-0195
5
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Functionality
PWRDWN# OUT OUT# SRC_Stop# OUT OUT#
1Normal Normal 1Normal Normal
0 IREF×2orFloat Low 0 IREF×6orFloat Low
Power Down (PWRDWN# assertion)
Figure 1. Power down sequence
Power Down (PWRDWN# De-assertion)
Figure 2. Power down de-assert sequence
PWRDWN#
OUT#
OUT
PWRDWN#
OUT
OUT#
Tdrive_PwrDwn#
<300us, >200mV
Tstable
<1ms
14-0195
6
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Current-mode output buffer characteristics of OUT[0:3], OUT[0:3]#
Figure 9. Simplied diagram of current-mode output buffer
Differential Clock Buffer characteristics
Symbol Minimum Maximum
RO3000Ω N/A
ROS unspecied unspecied
VOUT N/A 850mV
Current Accuracy
Symbol Conditions Conguration Load Min. Max.
IOUT VDD=3.30±5% RREF=475Ω1%
IREF=2.32mA
Nominaltestloadforgiven
conguration
-12%
INOMINAL
+12%
INOMINAL
Note:
1. INOMINALreferstotheexpectedcurrentbasedonthecongurationofthedevice.
Differential Clock Output Current
Board Target Trace/Term Z Reference R, Iref = VDD/(3xRr) Output Current VOH @ Z
100Ω
(100Ωdifferential≈15%couplingratio)
RREF=475Ω1%,
IREF=2.32mA IOH=6xIREF 0.7V@50
0V
IOUT
0.85V
Slope ~ 1/Rs
RO
ROS
VOUT = 0.85V max
Iout
V
DD
(3.3V ± 5%)
14-0195
7
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Absolute Maximum Ratings (Overoperatingfree-airtemperaturerange)
Symbol Parameters Min. Max. Units
VDD_A 3.3VCoreSupplyVoltage -0.5 4.6
V
VDD 3.3VI/OSupplyVoltage -0.5 4.6
VIH InputHighVoltage 4.6
VIL InputLowVoltage -0.5
Ts StorageTemperature -65 150 °C
VESD ESDProtection 2000 V
Note:
1. Stressbeyondthoselistedunder“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.
DC Electrical Characteristics (VDD=3.3±5%,VDD_A=3.3±5%)
Symbol Parameters Condition Min. Max. Units
VDD_A 3.3VCoreSupplyVoltage 3.135 3.465
V
VDD 3.3VI/OSupplyVoltage 3.135 3.465
VIH 3.3VInputHighVoltage VDD 2.0 VDD+0.3
VIL 3.3VInputLowVoltage VSS–0.3 0.8
IIL InputLeakageCurrent 0<VIN<VDD -5 +5 µA
VOH 3.3VOutputHighVoltage IOH=-1mA 2.4 V
VOL 3.3VOutputLowVoltage IOL=1mA 0.4
IOH OutputHighCurrent IOH=6xIREF,
IREF=2.32mA
12.2 mA
15.6
CIN InputPinCapacitance 2 5 pF
COUT OutputPinCapacitance 6
LPIN PinInductance 7 nH
IDD(BYPASS) PowerSupplyCurrent
(PLLBypass) VDD=3.465V,FCPU=100MHz 90
mA
IDD PowerSupplyCurrent VDD=3.465V Bypassmode 100
FCPU=100MHz PLLmode 130
ISS PowerDownCurrent Drivenoutputs 40
ISS PowerDownCurrent Tristateoutputs 12
TAAmbientTemperature -40 85 °C
14-0195
8
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
AC Switching Characteristics (VDD=3.3±5%,VDD_A=3.3±5%)
Symbol Parameters Min Max. Units Notes
FIN
PLLMode 95 105 MHz
BypassMode 100 400 MHz
Trise/Tfall RiseandFallTime(measuredbetween0.175Vto0.525V) 175 700 ps 2
DTrise/
DTfall RiseandFallTimeVariation 125 ps 2
Tpd
PLLMode ±250 ps
Non-PLLMode 2.5 6.5 ns
Tjitter Cycle–CycleJitter 50 ps 3,4
VHIGH VoltageHighincludingovershoot 660 1150 mV 2
VLOW VoltageLowincludingundershoot -300 mV 2
Vcross Absolutecrossingpointvoltages 250 550 mV 2
DVcross TotalVariationofVcrossoveralledges 140 mV 2
TDC DutyCycle 45 55 % 3
Tjadd AdditiveRMSphasejitterforPCIe2.0 <0 1ps 5
Notes:
1. TestcongurationisRs=33.2Ω,Rp=49.9Ω,and2pF.
2. MeasurementtakenfromSingleEndedwaveform.
3. MeasurementtakenfromDifferentialwaveform.
4. MeasurementtakenusingM1datacaptureanalysistool.
5. AdditivejitteriscalculatedfrominputandoutputRMSphasejitterbyusingPCIe2.0lter.(Tjadd=√(outputjitter)2–(inputjitter)2
Conguration Test Load Board Termination
475Ω
1%
49.9Ω
1%
Rp
49.9Ω
1%
Rp
33Ω
5%
Rs
33Ω
5%
Rs
PI6C20400A
TLA
TLB
OUT
OUT#
2pF
5%
2pF
5%
14-0195
9
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Packaging Mechanical: 28-Pin SSOP (H)
1
: 28-Pin, 209-Mil Wide, SSOPNOITPIRCSED
:EDOC EGAKCAP
1250-DP :# LORTNOC TNEMUCOD F:NOISIVER
80/01/40 :ETAD
H28
08-0143
14-0195
10
PI6C20400A
1:4 Clock Driver for Intel PCIe® Chipsets
www.pericom.com 03/27/13
Ordering Information(1-3)
Ordering Code Package Code Package Description
PI6C20400AHE HE 28-pin,209-milwide,SSOP,Pb-FreeandGreen
PI6C20400ALE LE 28-pin,173-milwide,TSSOP,Pb-FreeandGreen
Notes:
1. Thermalcharacteristicscanbefoundonthecompanywebsiteatwww.pericom.com/packaging/
2. E=Pb-freeandGreen
3. AddinganXsufx=Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
PCIe® , and the PCI EXPRESS design mark® are trademarks of PCI-SIG® (www.pcisig.com)
Packaging Mechanical: 28-Pin TSSOP (L)
1
DESCRIPTION: 28-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
DOCUMENT CONTROL NO.
PD - 1313
REVISION: D
DATE: 03/09/05
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335
• www.pericom.com
.378
.386
.047
1.20
.002
.006
SEATING
PLANE
.0256
BSC
.018
.030
.252
BSC
1
28
.169
.177
0.05
0.15
6.4
0.45
0.75
0.09
0.20
4.3
4.5
9.6
9.8
0.65 0.19
0.30
.007
.012
.004
.008
Max
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AE
14-0195