© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 10 1Publication Order Number:
1N5817/D
1N5817, 1N5818, 1N5819
1N5817 and 1N5819 are Preferred Devices
Axial Lead Rectifiers
This series employs the Schottky Barrier principle in a large area
metal−to−silicon power diode. State−of−the−art geometry features
chrome barrier metal, epitaxial construction with oxide passivation
and metal overlap contact. Ideally suited for use as rectifiers in
low−voltage, high−frequency inverters, free wheeling diodes, and
polarity protection diodes.
Features
•Extremely Low VF
•Low Stored Charge, Majority Carrier Conduction
•Low Power Loss/High Efficiency
•These are Pb−Free Devices*
Mechanical Characteristics:
•Case: Epoxy, Molded
•Weight: 0.4 Gram (Approximately)
•Finish: All External Surfaces Corrosion Resistant and Terminal
Leads are Readily Solderable
•Lead Temperature for Soldering Purposes:
260°C Max for 10 Seconds
•Polarity: Cathode Indicated by Polarity Band
•ESD Ratings: Machine Model = C (>400 V)
Human Body Model = 3B (>8000 V)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SCHOTTKY BARRIER
RECTIFIERS
1.0 AMPERE
20, 30 and 40 VOLTS
Preferred devices are recommended choices for future use
and best overall value.
See detailed ordering and shipping information on page 6 o
f
this data sheet.
ORDERING INFORMATION
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MARKING DIAGRAM
A =Assembly Location
1N581x =Device Number
x= 7, 8, or 9
YY =Year
WW =Work Week
G=Pb−Free Package
A
1N581x
YYWWG
G
(Note: Microdot may be in either location)
AXIAL LEAD
CASE 59
STYLE 1
1N5817, 1N5818, 1N5819
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2
MAXIMUM RATINGS
Rating Symbol 1N5817 1N5818 1N5819 Unit
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
VRRM
VRWM
VR
20 30 40 V
Non−Repetitive Peak Reverse Voltage VRSM 24 36 48 V
RMS Reverse Voltage VR(RMS) 14 21 28 V
Average Rectified Forward Current (Note 1), (VR(equiv) ≤ 0.2 VR(dc), TL = 90°C,
RqJA = 80°C/W, P.C. Board Mounting, see Note 2, TA = 55°C) IO1.0 A
Ambient Temperature (Rated VR(dc), PF(AV) = 0, RqJA = 80°C/W) TA85 80 75 °C
Non−Repetitive Peak Surge Current, (Surge applied at rated load conditions,
half−wave, single phase 60 Hz, TL = 70°C) IFSM 25 (for one cycle) A
Operating and Storage Junction Temperature Range (Reverse Voltage applied) TJ, Tstg −65 to +125 °C
Peak Operating Junction Temperature (Forward Current applied) TJ(pk) 150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL CHARACTERISTICS (Note 1)
Characteristic Symbol Max Unit
Thermal Resistance, Junction−to−Ambient RqJA 80 °C/W
ELECTRICAL CHARACTERISTICS (TL = 25°C unless otherwise noted) (Note 1)
Characteristic Symbol 1N5817 1N5818 1N5819 Unit
Maximum Instantaneous Forward Voltage (Note 2) (iF = 0.1 A)
(iF = 1.0 A)
(iF = 3.0 A)
vF0.32
0.45
0.75
0.33
0.55
0.875
0.34
0.6
0.9
V
Maximum Instantaneous Reverse Current @ Rated dc Voltage (Note 2)(TL = 25°C)
(TL = 100°C)
IR1.0
10 1.0
10 1.0
10
mA
1. Lead Temperature reference is cathode lead 1/32 in from case.
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2.0%.
125
115
105
95
85
75 2015107.05.04.03.0
2.0
TR, REFERENCE TEMPERATURE (
°
C)
VR, DC REVERSE VOLTAGE (VOLTS)
Figure 1. Maximum Reference Temperature
1N5817
40 30 23
60
80
RqJA (°C/W) = 110
125
115
105
95
85
75 2015107.05.0 304.03.0
40 30 23
RqJA (°C/W) = 110
80 60
Figure 2. Maximum Reference Temperature
1N5818
125
115
105
95
85
75 2015107.05.0 304.0 40
RqJA (°C/W) = 110
60
80
Figure 3. Maximum Reference Temperature
1N5819
40
30
23
TR, REFERENCE TEMPERATURE ( C)
°
VR, DC REVERSE VOLTAGE (VOLTS)
VR, DC REVERSE VOLTAGE (VOLTS)
TR, REFERENCE TEMPERATURE (
°
C)
1N5817, 1N5818, 1N5819
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3
NOTE 3. — DETERMINING MAXIMUM RATINGS
Reverse power dissipation and the possibility of thermal
runaway must be considered when operating this rectifier at
reverse voltages above 0.1 VRWM. Proper derating may be
accomplished by use of equation (1).
T
A(max)
=
where TA(max) =
TJ(max) =
PF(AV) =
PR(AV) =
Rq
JA
=
TJ(max) − RqJAPF(AV) − RqJAPR(AV)
Maximum allowable ambient temperature
Maximum allowable junction temperature
(1)
Average forward power dissipation
(125°C or the temperature at which thermal
runaway occurs, whichever is lowest)
Average reverse power dissipation
Junction−to−ambient thermal resistance
Figures 1, 2, and 3 permit easier use of equation (1) by
taking reverse power dissipation and thermal runaway into
consideration. The figures solve for a reference temperature
as determined by equation (2).
T
R
= T
J(max)
− R
qJA
P
R(AV)
(2)
S
ubstituting equation (2) into equation (1) yields:
T
A(max)
= T
R
− Rq
JA
P
F(AV)
(
3)
Inspection of equations (2) and (3) reveals that TR is the
ambient temperature at which thermal runaway occurs or
where TJ = 125°C, when forward power is zero. The
transition from one boundary condition to the other is
evident on the curves of Figures 1, 2, and 3 as a difference
in the rate of change of the slope in the vicinity of 115°C. The
data of Figures 1, 2, and 3 is based upon dc conditions. For
use in common rectifier circuits, Table 1 indicates suggested
factors for an equivalent dc voltage to use for conservative
design, that is: (4)
VR(equiv) = Vin(PK) x F
The factor F is derived by considering the properties of the
various rectifier circuits and the reverse characteristics of
Schottky diodes.
EXAMPLE: Find TA(max) for 1N5818 operated in a
12−volt dc supply using a bridge circuit with capacitive filter
such that IDC = 0.4 A (IF(AV) = 0.5 A), I(FM)/I(AV) = 10, Input
Voltage = 10 V(rms), RqJA = 80°C/W.
Step 1. Find V
R(equiv)
. Read F = 0.65 from Table 1,
Step 1. Find ∴ VR(equiv) = (1.41)(10)(0.65) = 9.2 V.
Step 2. Find TR from Figure 2. Read TR = 109°C
Step 1. Find @ VR = 9.2 V and RqJA = 80°C/W.
Step 3. Find PF(AV) from Figure 4. **Read PF(AV) = 0.5 W
@I(FM)
I(AV) = 10 and IF(AV) = 0.5 A.
Step 4. Find TA(max) from equation (3).
Step 4. Find TA(max) = 109 − (80) (0.5) = 69°C.
*
*Values given are for the 1N5818. Power is slightly lower for the
1
N5817 because of its lower forward voltage, and higher for the
1
N5819.
Circuit
Load
Half W ave
Resistive Capacitive*
Full Wave, Bridge
Resistive Capacitive
Full Wave, Center Tapped*†
Resistive Capacitive
Sine W ave
Square Wave
0.5
0.75
1.3
1.5
0.5
0.75
0.65
0.75
1.0
1.5
1.3
1.5
**Note that VR(PK) ≈ 2.0 Vin(PK).†Use line to center tap voltage for Vin.
Table 1. Values for Factor F
1N5817, 1N5818, 1N5819
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4
7/8
20
40
50
90
80
70
60
30
10 3/45/81/23/81/4 1.01/81
RθJL
, THERMAL RESISTANCE, JUNCTION−TO−LEAD (
°C/W)
BOTH LEADS TO HEATSINK,
EQUAL LENGTH
MAXIMUM
TYPICAL
L, LEAD LENGTH (INCHES)
Figure 4. Steady−State Thermal Resistance
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05 4.02.01.00.80.60.40.2
PF(AV), AVERAGE POWER DISSIPATION (WATTS)
IF(AV), AVERAGE FORWARD CURRENT (AMP)
dc
SQUARE WAVE
TJ ≈ 125°C
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.01
10k2.0k1.0k5002001005020105.02.01.00.50.20.1 5.0k
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
ZqJL(t) = ZqJL • r(t)
Ppk Ppk
tp
t1
TIME
DUTY CYCLE, D = tp/t1
PEAK POWER, Ppk, is peak of
an
equivalent square power pulse.
DTJL = Ppk • RqJL [D + (1 − D) • r(t1 + tp) + r(tp) − r(t1)] where
DTJL = the increase in junction temperature above the lead temperature
r(t) = normalized value of transient thermal resistance at time, t, from Figure 6,
i.e.:
r(t) = r(t1 + tp) = normalized value of transient thermal resistance at time, t1 + tp.
t, TIME (ms)
NOTE 4. — MOUNTING DATA
Data shown for thermal resistance, junction−to−ambient
(RqJA) for the mountings shown is to be used as typical guide-
line values for preliminary engineering, or in case the tie
point temperature cannot be measured.
TYPICAL VALUES FOR RqJA IN STILL AIR
Mounting
Method 1/8 1/4 1/2 3/4
Lead Length, L (in)
RqJA
1
2
3
52
67 65
80 72
87 85
100
°C/W
°C/W
°C/W50
Mounting Method 1
P.C. Board with
1−1/2″ x 1−1/2″
copper surface.
Mounting Method 3
P.C. Board with
1−1/2″ x 1−1/2″
copper surface.
LL
L = 3/8″
BOARD GROUND
PLANE
VECTOR PIN MOUNTING
LL
Mounting Method 2
5
10
20
Sine Wave
I(FM)
I(AV)
= π (Resistive Load)
Capacitive
Loads {
Figure 5. Forward Power Dissipation
1N5817−19
Figure 6. Thermal Response
1N5817, 1N5818, 1N5819
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5
100705.0
30
20
10
7.0
5.0
3.0 207.0 103.02.0 301.0 40
15
5.0
3.0
2.0
0.3
0.2
0.1
403612
30
20
1.0
0.5
0.05
0.03 2416 208.04.0 28032
10
20
7.0
5.0
2.0
0.2
0.3
0.5
0.7
1.0
3.0
0.9 1.0 1.1
0.1
0.07
0.05
0.03
0.02 0.60.50.40.30.2 0.70.1 0.8
NOTE 5. — THERMAL CIRCUIT MODEL
(For heat conduction through the leads)
TA(A) TA(K)
RqS(A) RqL(A) RqJ(A) RqJ(K) RqL(K) RqS(K)
PD
TL(A) TC(A) TJTC(K) TL(K)
vF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
iF, INSTANTANEOUS FORWARD CURRENT (AMP)
Figure 7. Typical Forward Voltage
IFSM, PEAK SURGE CURRENT (AMP)
NUMBER OF CYCLES
Figure 8. Maximum Non−Repetitive Surge Current
IR, REVERSE CURRENT (mA)
VR, REVERSE VOLTAGE (VOLTS)
Figure 9. Typical Reverse Current
TC = 100°C
25°C
1 Cycle
TL = 70°C
f = 60 Hz
Surge Applied at
Rated Load Conditions
1N5817
1N5818
1N5819
TJ = 125°C
100°C
25°C
Use of the above model permits junction to lead thermal re-
sistance for any mounting configuration to be found. For a
given total lead length, lowest values occur when one side of
the rectifier is brought as close as possible to the heatsink.
Terms in the model signify:
TA = Ambient Temperature TC = Case Temperature
TL = Lead Temperature TJ = Junction Temperature
RqS = Thermal Resistance, Heatsink to Ambient
RqL = Thermal Resistance, Lead to Heatsink
RqJ = Thermal Resistance, Junction to Case
PD = Power Dissipation
(Subscripts A and K refer to anode and cathode sides, re-
spectively.) Values for thermal resistance components are:
RqL = 100°C/W/in typically and 120°C/W/in maximum
RqJ = 36°C/W typically and 46°C/W maximum.
75°C
1N5817, 1N5818, 1N5819
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6
NOTE 6. — HIGH FREQUENCY OPERATION
Since current flow in a Schottky rectifier is the result of
majority carrier conduction, it is not subject to junction
diode forward and reverse recovery transients due to
minority carrier injection and stored charge. Satisfactory
circuit analysis work may be performed by using a model
consisting of an ideal diode in parallel with a variable
capacitance. (See Figure 10.)
Rectification efficiency measurements show that
operation will be satisfactory up to several megahertz. For
example, relative waveform rectification efficiency is
approximately 70 percent at 2.0 MHz, e.g., the ratio of dc
power to RMS power in the load is 0.28 at this frequency,
whereas perfect rectification would yield 0.406 for sine
wave inputs. However, in contrast to ordinary junction
diodes, the loss in waveform efficiency is not indicative of
power loss: it is simply a result of reverse current flow
through the diode capacitance, which lowers the dc output
voltage.
10 200.8
70
200
100
50
30
20
10
6.04.02.01.00.6 8.00.4 40
C, CAPACITANCE (pF)
VR, REVERSE VOLTAGE (VOLTS)
Figure 10. Typical Capacitance
TJ = 25°C
f = 1.0 MHz
1N5819
1N5818
1N5817
ORDERING INFORMATION
Device Package Shipping†
1N5817 Axial Lead* 1000 Units / Bag
1N5817G Axial Lead* 1000 Units / Bag
1N5817RL Axial Lead* 5000 / Tape & Reel
1N5817RLG Axial Lead* 5000 / Tape & Reel
1N5818 Axial Lead* 1000 Units / Bag
1N5818G Axial Lead* 1000 Units / Bag
1N5818RL Axial Lead* 5000 / Tape & Reel
1N5818RLG Axial Lead* 5000 / Tape & Reel
1N5819 Axial Lead* 1000 Units / Bag
1N5819G Axial Lead* 1000 Units / Bag
1N5819RL Axial Lead* 5000 / Tape & Reel
1N5819RLG Axial Lead* 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
A
xxx
xxx
YYWW
SCALE 1:1
B
D
K
K
F
F
ADIM MIN MAX MIN MAX
MILLIMETERSINCHES
A4.10 5.200.161 0.205
B2.00 2.700.079 0.106
D0.71 0.860.028 0.034
F−−− 1.27−−− 0.050
K25.40 −−−1.000 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
JEDEC DO−41 OUTLINE SHALL APPLY
4. POLARITY DENOTED BY CATHODE BAND.
5. LEAD DIAMETER NOT CONTROLLED WITHIN F
DIMENSION.
AXIAL LEAD
CASE 59−10
ISSUE U
DATE 15 FEB 2005
GENERIC
MARKING DIAGRAM*
xxx = Specific Device Code
A = Assembly Location
YY = Year
WW = Work Week
A
xxx
xxx
YYWW
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
STYLE 2:
NO POLARITY
STYLE 1 STYLE 2
STYLE 1 STYLE 2
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
POLARITY INDICATOR
OPTIONAL AS NEEDED
(SEE STYLES)
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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DOCUMENT NUMBER:
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