FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2003-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.10
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89480 Series
MB89485/485L/P485/P485L/PV480
■DESCRIPTION
The MB89480 series has been developed as a general-purpose version of the F2MC*-8L family consisting of
proprietary 8-bit single-chip microcontrollers.
In addition to a compact instruction set, th e microcontroller cont ains a va riety of peripheral functions such as 21-
bit timebase timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, 6-bit PPG, LCD controller/
driver, e xte rnal interrupt 1 (edge), external interrupt 2 (level), 10-bit A/D converter, U A RT/SI O, buzz er, watchdog
timer reset.
The MB89480 se ries is designed suitab le f or LCD re mote contro ller as well as in a wide r ange of applications for
consumer product.
*: F2MC is the abbrevia tion of Fujitsu Flexible Microcontroller.
■ FEATURES
• Package used
LQFP package and SH-DIP package for MB89P485/P485L, MB89485 /485L
MDIP package and MQFP package for MB89PV480
• High speed operating capability at low voltage
• Minimum execution time: 0.32 µs at 12.5 MHz (Continued)
DS07-12559-2E
MB89480 Series
2DS07-12559-2E
(Continued)
•F
2MC-8L family CPU core
• Six timers
PWC timer (also usable as an interval timer)
PWM timer
8/16-bit timer/counter x 2
21-bit timebase timer
Watch prescaler
• Programmable pulse generator
6-bit PPG with program-selectable pulse width and period
• External interrupt
Edge detection (selectab le edge) : 4 chann els
Low level interrupt (wake-up function) : 8 channels
• A/D converter (4 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capability
• LCD controller/driver
Max 31 segmen ts ou tp ut x 4 comm o ns
Booster fo r LCD driving (selected by mask option)
•Buzzer
7 frequencie s are selectable by software
• Low-power consumption mode
Stop mode (oscillation stops so as to minimize the current consumption.)
Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)
Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an
extremely low level.)
Sub-clock mode
• Watchdog timer reset
• I/O ports: Max 42 channels
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
Instruction set optimized for controllers
MB89480 Series
DS07-12559-2E 3
■PRODUCT LINEUP
(Continued)
Part number
Parameter MB89485L MB89485 MB89P485L MB89P485 MB89PV480
Classification Mass production products
(mask ROM product) OTP Piggy-back
ROM size 16K x 8-bit (internal ROM) 16K x 8-bit (internal PROM
with read protection) *232K x 8-bit
(external ROM)*1
RAM size 512 x 8-bit 1K × 8-bit
CPU functions
Number of instructions : 136
Instruction bit len gth : 8 bits
Instruction len gt h : 1 to 3 bytes
Data bit length : 1, 8, 16 bits
Minimum execu tio n time : 0.32 µs at 12.5 MHz
Minimum interrupt processing time : 2.88 µs at 12.5 MHz
Ports
I/O ports (CMOS) : 11 pins
N-channel open drain I/O ports : 28 pins
Output ports (N-channel open drain) : 2 pins
Input port : 1 pin
Total : 42 pins
21-bit timebase
timer Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz.
Watchdog timer Reset period (167.8 ms to 335.5 ms) at 12.5 MHz.
Pulse width count
timer
1 channel.
8-bit one-shot timer op eration (s upports unde rflow output , opera ting clock period: 1, 4, 32 t inst,
external).
8-bit reload timer operat ion (supports squar e wave out put, operating clock p eriod: 1, 4, 32 tinst,
external).
8-bit pulse width measurement operation (supports continuous measurement, H width,
L width, rising edge to rising edge, falling edge to falling edge measurement and both edge
measurement).
PWM timer 8-bit reload timer operat ion (supports squar e wave out put, operating clock p eriod: 1, 4, 32 tinst,
external).
8-bit resolution PWM operat ion.
6- bit programmable
pulse generator Can generate square pulse with programmable period.
8/16-bit timer/counter
11, 12
Can be opera ted either as a 2-channel 8 -bit timer/counter (timer 11 and timer 12, each with its
own independent operating clock cycle), or as one 16-bit timer/counter.
In timer 11 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
8/16-bit timer/counter
21, 22
Can be opera ted either as a 2-channel 8 -bit timer/counter (timer 21 and timer 22, each with its
own independent operating clock cycle), or as one 16-bit timer/counter.
In timer 21 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
External interrupt 4 independent channels (selectable edge, interrupt vector, request flag).
8 channels (low level interrupt).
MB89480 Series
4DS07-12559-2E
(Continued)
Note : 1 tinst = one instruction cycle (ex e cution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main cloc k.
■PACKAGE AND CORRESPONDING PR ODUCTS
O : Availabe
X : Not available
Part number
Parameter MB89485L MB89485 MB89P485L MB89P485 MB89PV480
A/D converter 10-bit resolution × 4 channels.
A/D conversion fu nction (conversion time: 60 tinst ).
Supports repeated activation by internal clock.
LCD controller/driver
Common output : 4 (Max)
Segment output : 31 (Max) (selected resistor ladder)
: 26 (Max) (selected booster)
Bias power supp ly pin s : 4
LCD display RAM size : 31 × 4 bits
Dividing resistor/booster : selected by mask option
UART/SIO Synchronous/asynchronous data transfer capability.
(Max baud rate: 97.656 Kbps at 12. 5 MHz).
(7 and 8 bits with parity bit; 8 and 9 bits without parity bit).
Buzzer output 7 frequencies are selectable by software.
Standby mode Sleep mode, stop mode, watch mode, sub-clock mode.
Process CMOS
Operating voltage 2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V 2.7 V to 5.5 V
*1 : Use MBM27C256A as the external ROM.
*2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS.
Part number
Package MB89485/485L MB89P485/P485L MB89PV480
DIP-64P-M01 O O X
FPT-64P-M23 O O X
MDP-64C-P02 X X O
MQP-64C-P01 X X O
MB89480 Series
DS07-12559-2E 5
■DIFFERENCES AMONG PRODUCTS
1. Memory Size
Bef ore e v aluating using the piggyback product, verify its differ ence s fr om the product th at wil l actu ally be use d.
Take particular care on the following point:
• The stack area is set a t the upper limit of the RAM.
2. Current Consumption
• For the MB89PV480, the current consumed by the EPROM mounted in the piggy-back socket is needed to
be included.
• When operating at low speed, the current consumed by the one-time PROM product is greater than that for
the mask ROM product. However, the current consumption is rough ly the same in sleep and stop mode.
• For more informat ion, see “■ ELECTRICAL CHARACTERISTICS”.
3. Oscillation Stabilization Time after Power-on Reset
• For MB89PV480, MB89P485L and MB89485L, there is no power-on stabilization time after power-on reset.
• F or MB89P485, there is power-on stabilization time after power-on reset.
• For MB89485, the power-on stabilization time can be selected.
• For more information, please refer to “■ MASK OPTION”.
MB89480 Series
6DS07-12559-2E
■PIN ASSIGNMENT
(Continued)
COM0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
P40/SEG8
P41/SEG9
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
P10/SEG23/INT10
P11/SEG24/INT11
P12/SEG25/INT12
P13/SEG26/INT13
X0A
X1A
C *2
VSS
Vcc
COM1
P30/COM2
P31/COM3
V3
P27/V2/EC1
P26/V1/TO1
V0/SEG0
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
P22/SO
P21/SCK
P20/PWM
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
AVcc
P17/SE G 30 /AN3 *1
P16/SE G 29 /AN2 *1
P15/SE G 28 /AN1 *1
P14/SE G 27 /AN0 *1
RST
MODE
X1
X0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
(DIP-64P-M01)
(MDP-64C-P02)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: For product other than MB89P485, pin 31 is NC pin.
*3: Pin assignment on package top.
N.C.: As connected internally, do not use.
Pin no. Pin
symbol Pin no. Pin
symbol Pin no. Pin
symbol Pin no. Pin
symbol
65 A15 73 A1 81 O6 89 A8
66 A12 74 A0 82 O7 90 A13
67 A7 75 O1 83 O8 91 A14
68 A6 76 O2 84 CE 92 Vcc
69 A5 77 O3 85 A10
70 A4 78 VSS 86 OE
71 A3 79 O4 87 A11
72 A2 80 O5 88 A9
(TOP VIEW )
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O1
O2
O3
VSS
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O8
O7
O6
O5
O4
65
66
67
68
69
70
71
72
73
74
75
76
77
78
92
91
90
89
88
87
86
85
84
83
82
81
80
79
*3
MB89480 Series
DS07-12559-2E 7
(Continued)
(FPT-64P-M23)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: For product other than MB89P485, pin 23 is NC pin.
P40/SEG8
P41/SEG9
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
P10/SEG23/INT10
P11/SEG24/INT11
P12/SEG25/INT12
P13/SEG26/INT13
X0A
X1A
*2 C
Vss
X0
X1
MODE
RST
*1 P14/SEG27/AN0
*1 P15/SEG28/AN1
*1 P16/SEG29/AN2
*1 P17/SEG30/AN3
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
P22/SO
P21/SCK
P20/PWM
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
AVcc
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM0
Vcc
COM1
P30/COM2
P31/COM3
V3
P27/V2/EC1
P26/V1/TO1
V0/SEG0
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
(TOP VIEW)
MB89480 Series
8DS07-12559-2E
(Continued)
SEG7
P40/SEG8
P41/SEG9
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
P10/SEG23/INT10
P11/SEG24/INT11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
COM0
Vcc
COM1
P30/COM2
P31/COM3
V3
P27/V2/EC1
64
63
62
61
60
59
58
57
56
55
54
53
52
P12/SEG25/INT12
P13/SEG26/INT13
X0A
X1A
*2 C
Vss
X0
X1
MODE
RST
*1 P14/SEG27/AN0
*1 P15/SEG28/AN1
*1 P16/SEG29/AN2
20
21
22
23
24
25
26
27
28
29
30
31
32
85
86
87
88
89
90
91
92
93
77
76
75
74
73
72
71
70
69
94
95
96
65
66
67
68
84
83
82
81
80
79
78
(TOP VIEW)
(MQP-64C-P01)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: Pin 24 is NC pin.
Pin assignment on package top
N.C.: As connected internally, do not use.
Pin
no. Pin
symbol Pin
no. Pin
symbol Pin no. Pin
symbol Pin
no. Pin
symbol
65 N.C. 73 A2 81 N.C. 89 OE
66 VPP 74 A1 82 O4 90 N.C.
67 A12 75 A0 83 O5 91 A11
68 A7 76 N.C. 84 O6 92 A9
69 A6 77 O1 85 O7 93 A8
70 A5 78 O2 86 O8 94 A13
71 A4 79 O3 87 CE 95 A14
72 A3 80 VSS 88 A10 96 VCC
P26/V1/TO1
V0/SEG0
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
P22/SO
P21/SCK
P20/PWM
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
AVcc
P17/SEG30/A N 3 *1
MB89480 Series
DS07-12559-2E 9
■PIN DESCRIPTION
(Continued)
Pin number Pin name I/O
circuit
type Function
SH-DIP*1
MDIP*4MQFP*2QFP*3
33 26 25 X0 AConnection pins for a crystal or other oscillator.
An external clock can be connected to X0. In this case,
leave X1 open.
34 27 26 X1
29 22 21 X0A AConnection pins for a crystal or other oscillator.
An external clock can be connected to X0A. In this case,
leave X1A open.
30 23 22 X1A
35 28 27 MODE B Input pin for setting the memory access mode.
Connect directly to VSS.
36 29 28 RST C
Reset I/O pin. Th e pin is an N-ch open-drain type with pull-
up resistor and a hysteresis input. The pi n outputs an “L”
level when an internal reset request is present. Inputting
an “L” level initializes internal circuits.
50 to 48 43 to 41 42 to 40 P00/INT20
to
P02/INT22 DGeneral-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with ext ernal interrupt 2 input.
47 40 39 P03/INT23 D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with external interrupt 2 input, and
shared with 8/16-bit timer/counter 21, 22 input when
booster is selected.
46 39 38 P04/INT24 D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with ext ernal interrupt 2 input, and
shared with 8/16-bit timer/counter 21, 22 output when
booster is selected.
45 38 37 P05/INT25/
PWC D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with exte rnal interrupt 2 input, and PWC
input.
44 37 36 P06/INT26/
PPG D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared wit h external interrupt 2 input, and 6-bit
PPG output .
43 36 35 P07/INT27/
BUZ D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with external interrupt 2 input and buzzer
output.
25 to 28 18 to 21 17 to 20 P10/SEG23/
INT10 to P13/
SEG26/INT13 F/K
General-p u rp os e N-c h op en - dr ain I/O po rt.
A hysteresis input.
The pin is shared with external interrupt 1 input and LCD
segment ou tp ut.
MB89480 Series
10 DS07-12559-2E
(Continued)
Pin number Pin name I/O
circuit
type Function
SH-DIP*1
MDIP*4MQFP*2QFP*3
37 to 40 30 to 33 29 to 32 P14/SEG27/
AN0 to P17/
SEG30/AN3 G/K
General-purpose N-ch open-drain I/O port.
An analog input.
The pin is shared with A/D converter input and LCD
segment outp u t.
LCD segment output will be disabled when booster is
selected.
51 44 43 P20/PWM E General-purpose CMOS I/O port.
The pin is shared with PWM output.
52 45 44 P21/SCK E General-purpose CMOS I/O port.
The pin is shared with UART/SIO clock I/O.
53 46 45 P22/SO E General-purpose CMOS I/O port.
The pin is shared with UART/SIO data output.
54 47 46 P23/SI D General-purpose CMOS I/O port.
The pin is shared with UART/S IO data input.
55 48 47 P24/C1/TO2 H
General-purpose CMOS I/O port.
The pin is shared with 8/ 16-bit timer 21, 22 output (it is
redirected to P04/INT24 when booster is selected), and
as a capacitor connecting pin when booster is select ed.
56 49 48 P25/C0/EC2 F
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with 8/16-bit timer 21, 22 input (it is
redirected to P03/INT23 when booster is selected), and
as a capacitor connecting pin when booster is select ed.
58 51 50 P26/V1/TO1 H General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer 11, 12 output, and
LCD power driving pin.
59 52 51 P27/V2/EC1 F
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with 8/16-bit timer 11, 12 input, and
LCD power driving pin.
62 55 54 P30/COM2 I / K General-purpose N-ch open-drain output port.
The pin is shared with t he LCD common output.
61 54 53 P31/COM3 I / K General-purpose N-ch open-drain output port.
The pin is shared with t he LCD common output.
9 to 16 2 to 9 1 to 8 P40/SEG8 to
P47/SEG15 H / K General-purpose N-ch open-drain I/ O port.
The pin is shared with LCD segment output.
17 to 23 10 to 16 9 to 15 P50/SEG16 to
P56/SEG22 H / K General-purpose N-ch open-drain I/ O port.
The pin is shared with LCD segment output.
24 17 16 P57 J Gen eral-purpose CMOS input port.
MB89480 Series
DS07-12559-2E 11
(Continued)
*1: DIP-64P-M01
*2: MQP-64C-P01
*3: FPT-64P-M23
*4: MDP-64C-P02
Pin number Pin name I/O
circuit
type Function
SH-DIP*1
MDIP*4MQFP*2QFP*3
2 to 8 59 to
64, 1 58 to 64 SEG1 to
SEG7 K LCD segment output-only pins.
1, 63 58, 56 57, 55 COM0 to
COM1 K LCD common output-only pins.
60 53 52 V3 — LCD driving power supply pin.
57 50 49 V0/SEG0 — / K LCD driving power supply pin when booster is selected.
LCD segment output when booster is not selected.
31 24 23 C —
When MB89P485 is used, connect an external 0.1 µF
capacitor betw ee n th is pi n an d the gro und.
N.C. pin when MB89485/485L, MB89P485L or
MB89PV480 is used.
64 57 56 VCC — Power supply pin (+3 V or +5 V).
32 25 24 VSS — Power supply pin (GND).
41 34 33 AVCC — A/D converter power supply pin.
42 35 34 AVSS —A/ D converter power supply pin.
Use at the same voltage level as VSS.
MB89480 Series
12 DS07-12559-2E
■External EPR OM Socket (MB89PV480 only)
*1: MDP-64C-P02
*2: MQP-64C-P01
Pin number Pin
name I/O Function
MDIP*1MQFP*2
91
90
66
87
85
88
89
67
68
69
70
71
72
73
74
95
94
67
91
88
92
93
68
69
70
71
72
73
74
75
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
O Address output pins.
83
82
81
80
79
77
76
75
86
85
84
83
82
79
78
77
O8
O7
O6
O5
O4
O3
O2
O1
I Data input pins.
65
76
81
90
65
76
81
90
N.C. — Internally connected pins. Always leave open.
65 66 VPP O “H” level output pin.
78 80 VSS O Power supply pin (GND).
84 87 CE O Chip enable pin f or the EPROM. Outputs “H” in standby mode.
86 89 OE O Output enable pin for the EPROM. Always outpu ts “L”.
92 96 VCC O Power supply pin for the EPROM.
MB89480 Series
DS07-12559-2E 13
■I/O CIRCUIT TYPE
(Continued)
Type Circuit Remarks
A
• Main/Sub-clock circuit
• Oscillation feedback resistance
is appro x. 500 kΩ for main clock
circuit and 5 MΩ for sub-clock
circuit.
B
• Hysteresis input
• The pull-down resistor (not
available in MB89P485/P485L)
Approx. 50 kΩ
C
• The pull-up resistor (P-channel)
Approx. 50 kΩ
• Hysteresis input
D
• CMOS output
•CMOS input
• Hysteresis input
• Selectable pull-up resistor
Approx. 50 kΩ
E
• CMOS output
•CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
X1 (X1A)
X0 (X0A)
N-ch P-ch
P-ch
N-ch
Stop mode control signal
N-ch
R
P-ch
N-ch
R
P-ch
N-ch
R
port
resource
pull-up
resistor register
P-ch
P-ch
N-ch
R
port
pull-up
resistor register
P-ch
MB89480 Series
14 DS07-12559-2E
(Continued)
Type Circuit Remarks
F
• N-ch open-dr ain output
•CMOS input
• Hysteresis input
G
• N-ch open-dr ain output
•CMOS input
• Analog input
H
• N-ch open-dr ain output
•CMOS input
I
• N-ch open-dr ain output
J
•CMOS input
K
• LCD segment output
N-ch
port
resources
N-ch
port
analog input
N-ch
port
N-ch
port
N-ch
P-ch
P-ch
N-ch
MB89480 Series
DS07-12559-2E 15
■HANDLING DEVICES
1. Preventing Latch-up
Latch-up ma y occur on CMO S IC if v oltage hi gher than VCC or lower than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in ■ ELECTRICAL CHARACTERISTICS is applied between VCC and VSS.
When latch-up occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take ca re to preven t the ana log power s upply (AVCC) and analog input from exceeding the digital power
supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Lea ving unu sed input pin s open could cause malfunctions . Th ey should be conn ected to a pull- up or pull-do wn
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/DConverter
Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter is not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply v oltage is assured to operate within the rated range, a rapid fluctuation of the voltage
could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient
fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset and wake-up
from stop m ode.
7. Notes on noise in the External Reset Pin (RST)
If the reset pulse applied to the e xternal reset pin (RST) does not meet the sp ecifications, it may cause malf unc-
tions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST).
MB89480 Series
16 DS07-12559-2E
■PROGRAMMING OTPROM IN MB89P485/P485L WITH SERIAL PROGRAMMER
1. Programming the OTPROM with Serial Programmer
• All OTP products can be programmed with serial programmer.
2. Programming the OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001.
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. :TEL (65)-2810770
FAX (65)-2810220
3. Programming Adapter for OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001, use the programming adapter
listed below.
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65)-2810770
FAX (65)-2810220
4. OTPROM Content Protection
For product with OTPROM content protection feature (MB89P485/P485L-103, MB89P485/P485L-104), OT-
PROM content can be read using serial programmer if the OTPROM content protection mechanism is not
activated.
One predefined area of the OTPROM (FFFCH) is assigned to be used for preventing the read access of OTPROM
content. If the protection code "00H" is written in this address (FFFCH) , the O TPR OM content cannot be rea d by
any serial programmer.
Note: The program written into the OTPROM cannot be verified once the OTPROM protection code is written
("00H" in FFFCH). It is advised to write the OTPROM protection code at last.
5. Programming Yield
All bits cannot be prog ramme d at Fujitsu shipping test to a bla nke d O TPR OM micr ocomputer, due to its nature .
F o r this reason, a programming yield of 100% cannot be assured at all times.
Package Compatibl e socket adapter
DIP-64P-M01 MB91919-812
FPT-64P-M23 MB91919-813
MB89480 Series
DS07-12559-2E 17
■PROGRAMMING OTPROM IN MB89P485/P485L WITH PARALLEL PROGRAMMER
1. Programming OTPROM with Parallel Programmer
• Only products without pr otection f eature (i.e. MB89P485/P485L-101 and MB89P485/P485L- 102) can be pro-
grammed with parallel programmer. Product with protection feature (i.e. MB89P485/P485L-103 and
MB89P485/P485L- 104) cannot be programmed with parallel p rogrammer.
2. ROM Writer Adapters and Recommended ROM Writers
• The following shows ROM writer adapters and recommended ROM writers.
Ando Electric Co., Ltd. (Parallel programmer)
Fujitsu Microelectronics Asia Pte Ltd. (Serial programmer)
Inquiries : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65)-2810 770
Writing Data to the OTPROM using Writer from Minato Electronics Co., Ltd.
(1) Set the OTPROM writer f or the CU50-OTP (device code: cdB6DC).
(2) Load the program data to the OTPROM writer.
(3) Write data using the OTPROM writer.
3. Programming Yield
All bits cannot be prog ramme d at Fujitsu shipping test to a bla nke d O TPR OM micr ocomputer, due to its nature .
F o r this reason, a programming yield of 100% cannot be assured at all times.
Package name Applicable adapter model Recommended writer
DIP-64P-M01 MB91919-604 MB91919-001
FPT-64P-M23 MB91919-605
MB89480 Series
18 DS07-12559-2E
■PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Memory Space
Memory space in each mode is shown in the diagram below.
3. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program to 0000H to 7FFFH with the EPROM programmer.
Address
Normal operating mode Corresponding addresses on the EPROM programmer
0000H
7FFFH
0000H
0080H
0480H
8000H
FFFFH
I/O
RAM
Not available
PROM
32KB EPROM
32KB
MB89480 Series
DS07-12559-2E 19
■BLOCK DIAGRAM
Main clock
Clock controller
Sub-clock
RAM
F
2
MC-8L
CPU
ROM
Other pins
Vcc, Vss, MODE, C
*
2
Internal data bus
21-bit timebase
UART/SIO
Port 0
Port 1
X0
X1
P07/INT27/BUZ
P21/SCK
P22/SO
P23/SI
timer
X0A
X1A
Port 3
N-ch open-drain output port
2
Buzzer output
4
LCD controller/driver
32 × 4-bit display
RAM (16 bytes)
8-bit PWM timer
Port 4 and Port 5 *
4
N-ch open-drain I/O port
P10/SEG23/INT10
to
P13/SEG26/INT13
SEG1 to SEG7
7
COM0 , COM1
2
V3
V0/SEG0 *3
8
P30/COM2
P31/COM3
Reset circuit
(Watchdog timer)
RST
External interrupt 1
(edge)
4
4
16
P56/SEG22
to P54/SEG 20
oscillator
oscillator
Watch prescaler
8/16-bit
timer/counter 21,22
CMOS I/O port *4
Port 2 *
4
8/16-bit
timer/counter 11,12
Booster
2
2
P20/PWM
P24/C1/TO2 *1
P25/C0/EC2 *1
P26/V1/TO1
P27/V2/EC1
CMOS I/O port
External interrupt 2
(level)
8
8-bit
P05/INT25/PWC
PWC timer
6-bit PPG
P06/INT26/PPG
P04/INT24
*
1
P02/INT22
P03/INT23
*
1
to P00/INT20
10-bit
A/D converter
P14/SEG27/A N 0 *1
to
P17/SEG30/A N 3 *1
AVcc
AVss
4
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P14/SEG27/AN0 to P17/SEG30/AN3 will be disabled.
*2: For product other than MB89P485, C pin is NC pin.
*3: If booster is selected, it serves as V0. If booster is not selected, it serves as SEG0.
*4: P20 to P23 are CMOS I/O ports. P24 to P27 are N-ch open-drain I/O ports. P57 is input-only port.
N-ch open-drain I/O port
P57
3
P53/SEG19
to P50/SEG16
4
P47/SEG15
to P44/SEG12
4
P43/SEG11
to P40/SEG 8
4
MB89480 Series
20 DS07-12559-2E
■CPU CORE
1. Memory Space
The microcontroller s of th e MB89 480 seri es offe r a me mor y space of 64 Kbytes fo r sto ring all of I/ O, data, and
program areas. The I/O area is located the lowest address. The data area is provided immediately above the
I/O area. Th e data area ca n be divided in to register, stack, and direct areas accor ding to the app lication. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89480 series is structured as illustrated below.
Memory Space
MB89P485/P485L
General-
purpose
registers
I/O
RAM
ROM
0000H
0080H
0100H
0280H
FFFFH
0200H
Vacant
MB89485/485L
General-
purpose
registers
I/O
RAM
ROM
0000H
0080H
0100H
0280H
FFFFH
0200H
Vacant
MB89PV480
General-
purpose
registers
I/O
RAM
0000H
0080H
0100H
FFFFH
0200H
0480H
ROM
External
(32KB)
8000H
Vacant
C000HC000H
FFC0HFFC0HFFC0H
Vector table (reset, interrupt, vector call instruction)
MB89480 Series
DS07-12559-2E 21
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following registers are provided:
Program counter (PC) : A 16-bit register for indicating instruction storage positions.
Accumulato r (A) : A 16-bit temporary register for storing arithmetic oper ations , etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register for performing arithmetic operations with the accumu lator.
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Index register (IX) : A 16-bit register for index modification.
Extra pointer (EP) : A 16-bit pointer for indicating a memory address.
Stack pointer (SP) : A 16-bit register for indicating a stack area.
Program status (PS) : A 16-bit register for storing a register pointer, a condition code.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR). (See the diagram below.)
PC
A
T
IX
EP
SP
PS
16 bits
: Program counter
: Accumulator
: Temporary accumulator
: Index register
: Extra pointer
: Stack pointer
: Program status
FFFD
H
Undefined
Undefined
Undefined
Undefined
Undefined
I-flag = 0, IL1, 0 = 11
Other bits are undefined.
Initial value
Vacancy Vacancy Vacancy
H I IL1, 0 N Z VC
54
RPPS
109876 321015 14 13 12 11
RP CCR
Structure of the Program Status Register
MB89480 Series
22 DS07-12559-2E
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for contr ol of CPU operations at the time of an interrupt.
H-flag : Set to "1" when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Clear
to "0" otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is allowed when this flag is set to "1". Inter rupt is prohibited when the flag is set to "0". Clear
to "0" when reset.
IL1, 0 : Indicates the lev el of the interrupt currently allowed. Processes an inter rupt only if its request le v el is
higher than the value indicated by this bit.
N-flag : Set to "1" if the MSB is set to "1" as the result of an arithmetic oper ation. Clear to "0" otherwise.
Z-flag : Set to "1" when an arithmetic operation results in "0". Clear to "0" other wise.
V-flag : Set to "1" if a signed numeric v alue ov erflows because of an arithmetic calculation. Cl ear to "0" if the
over flow does not occur.
C-flag : Set to "1" when a carry or a borro w from bi t 7 occurs as a re sult of an arithmetic oper at ion. Clear to
"0" otherwise. Set to the shift-out value in the case of a shift instruction.
IL1 IL0 Interrupt level Priority
00 1High
Low = no interrupt
01
10 2
11 3
Rule for Conversion of Actual Addresses of the General-pu rpose Register Area
“0”
↓
A15
“0”
↓
A14
“0”
↓
A13
“0”
↓
A12
“0”
↓
A11
“0”
↓
A10
“0”
↓
A9
“1”
↓
A8
R4
↓
A7
R3
↓
A6
R2
↓
A5
R1
↓
A4
R0
↓
A3
b2
↓
A2
b1
↓
A1
b0
↓
A0
Lower OP codes
RP
Generated addresses
MB89480 Series
DS07-12559-2E 23
The following gene ra l- pu rp o s e re gis te rs ar e pr ov ide d :
General-purpose registers: An 8-bit register for storing data
The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains
eight registers. Up to a total of 32 banks can be used on the MB89480 series. The bank currently in use is
indicated by the register bank pointer (RP).
Register Bank Configuration
This address = 0100
H
+ 8 × (RP)
Memory area
32 banks
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
MB89480 Series
24 DS07-12559-2E
■I/O MAP
(Continued)
Address Register name Register description Read/Write Initial value
00HPDR0 Port 0 data register R/W XXXXXXXXB
01HDDR0 Port 0 data direct ion register W* 00000000B
02HPDR1 Port 1 data register R/W XXXXXXXXB
03HDDR1 Port 1 data direct ion register W* 00000000B
04HPDR2 Port 2 data register R/W 00000000B
05H(Reserved)
06HDDR2 Port 2 data direct ion register R/W 00000000 B
07HSYCC System clock control register R/W X-1MM100B
08HSTBC Standby control register R/W 00010XXXB
09HWDTC Watchdog timer control register W* 0---XXXXB
0AHTBTC Timebase timer control register R/W 00---000B
0BHWPCR Watch prescaler control register R/W 00--0000B
0CHPDR3 Port 3 data register R/W ------11B
0DH(Reserved)
0EHRSFR Reset flag register R XXXX----B
0FH(Reserved)
10HPDR4 Port 4 data register R/W 11111111B
11H(Reserved)
12HPDR5 Port 5 data register R/W X1111111 B
13H to 1FH(Reserved)
20HSMC1 UART/SIO mode control register 1 R/W 00000000B
21HSMC2 UART/SIO mode control register 2 R/W 00000000B
22HSRC UART/SIO rate control register R/W XXXXXXXXB
23HSSD UART/SIO status/data register R 00001---B
24HSIDR/SODR UART/SIO data register R/W XXXXXXXXB
25HEIC1 External interrupt 1 control register 1 R/W 00000000B
26HEIC2 External interrupt 1 control register 2 R/W 00000000B
27HEIE2 External interrupt 2 enable register R/W 00000000B
28HEIF2 External interrupt 2 flag register R/W -------0B
29H to 2BH(Reserved)
2CHADC1 A/D control register 1 R/W -0000000B
2DHADC2 A/D control register 2 R/W -0000001B
2EHADDH A/D data register (Upper byte) R ------XXB
2FHADDL A/D data register (Lower byte) R XXXXXXXXB
30HADEN A/D input enable register R/W 1111----B
31HPCR1 PWC control register 1 R/W 0-0--000B
32HPCR2 PWC control register 2 R/W 00000000B
33HPLBR PWC reload buffer register R/W XXXXXXXXB
MB89480 Series
DS07-12559-2E 25
(Continued)
* : Bit manipulation instructio n ca nn ot be used.
• Read/write access symbols
R/W : Readable and writable
R : Read-only
W : Write-only
• Initial value symbols
0 : The initial v alue of this bit is “0”.
1 : The initial v alue of this bit is “1”.
X : The initial value of this bit is undefined.
- : Unused bit.
M : The initial value of this bit is determined by mask option.
Address Register name Register description Read/Write Initial value
34HCNTR PWM timer control regi ster R/W 0-000000B
35HCOMR PWM timer compare register W* XXXXXXXXB
36HT22CR Timer 22 control register R/W 000000X0B
37HT21CR Timer 21 control register R/W 000000X0B
38HT22DR Timer 22 data register R/W XXXXXXXXB
39HT21DR Timer 21 data register R/W XXXXXXXXB
3AHT12CR Timer 12 control register R/W 000000X0B
3BHT11CR Timer 11 control register R/W 000000X0B
3CHT12DR Timer 12 data register R/W XXXXXXXXB
3DHT11DR Timer 11 data register R/W XXXXXXXXB
3EHPPGC1 PPG control register 1 R/W 00000000B
3FHPPGC2 PPG control register 2 R/W 0-000000B
40HBUZR Buzzer control register R/W -----000B
41H to 5DH(Reserved)
5EHLCR1 LCD controller control register 1 R/W 00010000B
5FHLCR2 LCD controller control register 2 R/W -0000000B
60H to 6FHVRAM LCD data RAM R/W XXXXXXXXB
70HPURC0 Port 0 pull up resistor control register R/W 11111111B
71H(Reserved)
72HPURC2 Port 2 pull up resistor control register R/W ----1111B
73H to 7AH(Reserved)
7BHILR1 Interrupt level setting register 1 W* 11111111B
7CHILR2 Interrupt level setting register 2 W* 11111111B
7DHILR3 Interrupt level setting register 3 W* 11111111B
7EHILR4 Interrupt level setting register 4 W* 11111111B
7FH(Reserved)
MB89480 Series
26 DS07-12559-2E
■ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings (AVSS = VSS = 0.0 V)
Precautions: Permanent device damage may occur if the above “Absol ute Maximum Ratings” are exceeded.
Functional operation should be restricted to the conditions as detailed in the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
* : • Applicable to pins: P00 to P07, P20 to P23, AN0 to AN3
• Use within recommended operating conditions.
• Use at DC voltage (cu rrent).
• The +B signal should always be applied with a limiting resistance placed between the +B signal and th e
microcontroller.
• The value of the limiting resistance should be set so that when the +B signal is applied the input current to
the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.
Parameter Symbol Value Unit Remarks
Min Max
Power supply voltage
VCC
AVCC VSS – 0.3 VSS + 6.0 V MB89PV480, MB 89 P4 85 ,
MB89485
AVCC must not exceed VCC
VCC
AVCC VSS – 0.3 VSS + 4.0 V MB89P485L, MB89485L
AVCC must not exceed VCC
LCD power supply voltage V0 to V3 VSS – 0.3 VSS + 6.0 V
Input voltage VIVSS – 0.3 VCC + 0.3 V P00 to P07, P10 to P17, P20 to
P27, P40 to P47, P50 to P57
Output voltage VOVSS – 0.3 VCC + 0.3 V P00 to P07, P10 to P17, P20 to
P27, P30 to P31, P40 to P47, P50
to P56
Maximum clamp current ICLAMP – 2.0 + 2.0 mA *
Total maximum clamp current ∑ |ICLAMP|⎯20 mA *
“L” level maximum output cur rent IOL ⎯15 mA
“L” level average output current IOLAV ⎯4mA
Average value (operating current ×
operating rate)
“L” level total maximum output
current ∑IOL ⎯100 mA
“L” level total average output
current ∑IOLAV ⎯40 mA Average value (operating current ×
operating rate)
“H” level maxim um output current IOH ⎯–15 mA
“H” level average output current IOHAV ⎯–4 mA Average value (operating current ×
operating rate)
“H” level total maximum output
current ∑IOH ⎯–50 mA
“H” level total average out put
current ∑IOHAV ⎯–20 mA Average value (operating current ×
operating rate)
Power consumption PD⎯300 mW
Operating temperature TA–40 +85 °C
Storage temperature Tstg –55 +150 °C
MB89480 Series
DS07-12559-2E 27
• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input
potential ma y pass through the pr otective diode and increase the potential at the Vcc pin, and this ma y affe ct
other devices.
• Note that if a +B signal is input when the microcontrolle r current is off (not fixed at 0 V), the power supply is
provided from the pins, so that incomplete operation may result.
• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting
supply voltage may not be sufficient to operate the power-on result.
• Care must be taken not to leave the +B input pin open.
• Note that analog system input/output pins other than the A/D input pins (LCD drive pins, comparator input
pins, etc.) cannnot accept +B signal input.
• Sample recommended circuits :
WARNING: Semiconductor devices can be permanently damaged by application of stress (v oltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
2. Recommended Operating Conditions (AVSS = VSS = 0.0 V)
* :These values depend on the operating conditions and the analog assurance range. See Figure 1, 2, 3 and
“5. A/D Converter Electrical Characteristics.”
Parameter Symbol Value Unit Remarks
Min Max
Power supply voltage VCC
AVCC
2.2* 5.5 V Operatio n assurance
range MB89485
3.5* 5.5 V Operatio n assurance
range MB89P485
2.7* 5.5 V Operatio n assurance
range MB89PV480
1.5 5.5 V Retains the RAM state in
stop mode
MB89485,
MB89P485,
MB89PV480
2.2* 3.6 V Operatio n assurance
range MB89485L,
MB89P485L
1.5 3.6 V Retains the RAM state in
stop mode
LCD power supply voltage V0 to V3 Vss Vcc V
Operating temperature TA–40 +85 °C
P-ch
N-ch
V
CC
R
B input (0 V to 16 V)
Input/Output Equivalent circuits
Limiting
resistance
Protective diode
MB89480 Series
28 DS07-12559-2E
Figure 1 Operating Voltage vs. Main Clock Operating Frequency (MB89P48 5/485)
Figure 2 Operating Voltage vs. Main Clock Operating Frequency (MB89P485L/485L)
2.0
4.0
5.0
3.0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
Operating
voltage (V)
4.0 2.0 1.0 0.41.33 0.8 0.66 0.57 0.50 0.44
Main clock
operating freq. (MHz)
Min execution
time (inst. cycle) (µs)
3.5
2.7
11.0 12.0 12.5
0.36 0.33 0.32
Analog accuracy
assurance range :
Vcc = AVcc =4.5V~5.5V
5.5
2.2
4.5
Note : The shaded area is not assured for MB89P485
2.0
3.0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
Operating
voltage (V)
4.0 2.0 1.0 0.41.33 0.8 0.66 0.57 0.50 0.44
3.6
2.7
11.0 12.0 12.5
0.36 0.33 0.32
Analog accuracy
assurance range :
Vcc = AVcc = 2.7V~3.6V
2.2
Min execution
time (inst. cycle) (µs)
Main clock
operating freq. (MHz)
Note : The shaded area is not assured for MB89P485L
MB89480 Series
DS07-12559-2E 29
Figure 3 Operating Voltage vs. Main Clock Operating Fre quency (MB89PV480)
Figure 1, 2 and 3 indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH.
Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the
operating speed is switched using a gear.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconducto r device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating cond ition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data shee t. Users consider ing application outside th e listed cond itions are advised t o contact
their representatives before hand.
4.0
5.0
3.0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
Operating
voltage (V)
4.0 2.0 1.0 0.41.33 0.8 0.66 0.57 0.50 0.44
Main clock
operating Freq. (MHz)
Min execution
time (inst. cycle) (µs)
3.5
2.7
11.0 12.0 12.5
0.36 0.33 0.32
Analog accuracy
assurance range :
Vcc = AVcc = 4.5V~5.5V
5.5
4.5
MB89480 Series
30 DS07-12559-2E
3. DC Characteristics
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
(Continued)
Parameter Symbol Pin Condition Value Unit Remarks
Min Typ Max
“H” level
input voltage
VIH
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
— 0.7 VCC —VCC + 0. 3 V
VIHS
RST, MODE, EC1,
EC2, PWC, SCK,
SI, INT10 to INT13,
INT20 to INT27
— 0.8 VCC —VCC + 0. 3 V
“L” level
input voltage
VIL
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
—V
SS − 0.3 — 0.3 VCC V
VILS
RST, MODE, EC1,
EC2, PWC, SCK,
SI, INT10 to INT13,
INT20 to INT27
—VSS − 0.3 — 0.2 VCC V
Open-drain
output pin
application
voltage
VD
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
—V
SS − 0.3 —
VCC + 0. 3
V
Product with-
out booster
V3 Product with
booster
“H” level
output
voltage VOH P00 to P07,
P20 to P23 IOH = –2.0 mA 4.0 — — V MB89PV480,
MB89P485,
MB89485
2.2 — — V MB89P485L,
MB89485L
“L” level
output
voltage VOL
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P31,
P40 to P47,
P50 to P56, RST IOL = 4.0 mA ——0.4V
MB89PV480,
MB89P485,
MB89485
P00 to P07,
P20 to P23, RST ——0.4V
MB89P485L,
MB89485L
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
IOL = 2.0 mA — — 0.4 V MB89P485L,
MB89485L
MB89480 Series
DS07-12559-2E 31
(Continued)
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
(Continued)
Parameter Symbol Pin Condition Value Unit Remarks
Min Typ Max
Input
leakage
current ILI
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
0.45 V < VI < VCC −5—+5µAWithout
pull-up
resistor
Open-drain
output
leakage
current
ILOD
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
0.45 V < VI < VCC −5—+5µA
Pull-down
resistance RDOWN MODE VI = VCC 25 50 100 kΩExcept
MB89P485,
MB89P485L
Pull-up
resistance RPULL P00 to P07,
P20 to P23,
RST VI = 0.0 V 25 50 100 kΩ
When pull-up
resistor is
selected
(except RST)
Power
supply
current
ICC1
VCC
FCH = 10 MHz,
tinst = 0.4 µs,
Main clock run
mode
—613
mA
MB89485
— 3 7 MB89485L
— 5 10 MB89P485
— 4 8 MB89P485L
ICC2
FCH = 10 MHz,
tinst = 6.4 µs,
Main clock run
mode
—0.93
mA
MB89485
— 0.4 1.5 MB89485L
— 0.9 3 MB89P485
— 0.5 2 MB89P485L
ICCS1
FCH = 10 MHz,
tinst = 0.4 µs,
Main clock sleep
mode
—25
mA
MB89485
— 1 2.5 MB89485L
— 2.5 5 MB89P485
— 1.2 2.5 MB89P485L
ICCS2
FCH = 10 MHz,
tinst = 6.4 µs,
Main clock sleep
mode
—0.72
mA
MB89485
— 0.3 1 MB89485L
— 0.9 2 MB89P485
— 0.4 1 MB89P485L
ICCL
FCL = 32. 768 kHz,
TA = +250C,
Sub-clock run
mode
—4085
µA
MB89485
— 22 50 MB89485L
— 400 800 MB89P485
— 25 50 MB89P485L
MB89480 Series
32 DS07-12559-2E
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
(Continued)
Parameter Symbol Pin Condition Value Unit Remarks
Min Typ Max
Power
supply
current
ICCLS
VCC
FCL = 32.768 kHz,
TA = +250C,
Sub-clock sleep mode
—1530
µA
MB89485
— 7 15 MB89485L
— 12 30 MB89P485
— 7 15 MB89P485L
ICCT TA = +250C,
Watch mode,
Main clock stop mode
—210
µA
MB89485
— 1 5 MB89485L
— 5 15 MB89P485
— 1 5 MB89P485L
ICCH TA = +250C,
Sub-clock stop mode
—15
µA
MB89485
— 0.8 4 MB89485L
— 3 10 MB89P485
— 0.8 4 MB89P485L
IA
AVcc
A/D conversion active
—1.36
mA
MB89485
— 1 3 MB89485L
— 1.3 6 MB89P485
— 1 3 MB89P485L
IAH TA = +250C,
A/D conversion stop
—15
µA
MB89485
— 0.8 4 MB89485L
— 1 5 MB89P485
— 0.8 4 MB89P485L
Common
output
impedance RVCOM COM0 to
COM3
V1 to V3 = +3.0 V
——2.5kΩ
MB89P485L,
MB89485L
V1 to V3 = +5.0 V MB89PV480,
MB89P485,
MB89485
Segment
output
impedance RVSEG SEG0 to
SEG30
V1 to V3 = +3.0 V
——15kΩ
MB89P485L,
MB89485L
V1 to V3 = +5.0 V MB89PV480,
MB89P485,
MB89485
LCD
divided
resistance RLCD — Between VCC and VSS 300 500 750 kΩ
MB89480 Series
DS07-12559-2E 33
(Continued)
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Parameter Symbol Pin Condition Value Unit Remarks
Min Typ Max
LCD
controller/
driver
leakage
current
ILCDL
V0 to V3,
COM0 to
COM3,
SEG0 to
SEG30
———±1µA
Booster for
LCD driving
output
voltage
VV3 V3 V1 = 1.5 V 4.3 4.5 4.7 V
Products
with booster
only
VV2 V2 V1 = 1.5 V 2.9 3.0 3.1 V
Reference
input voltage
for LCD
driving
VV1 V1 IIN = 0.0 µA 1.4 1.5 1.7 V
Reference
voltage input
impedance RRIN V1 — 8.5 9.8 11 kΩ
Input
capacitance CIN
Other than
VCC, VSS,
AVCC, AVSS f = 1 MHz — 5 15 pF
MB89480 Series
34 DS07-12559-2E
4. AC Characteristics
(1) Reset Timing
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Note : tHCYL is the oscillation cycle (1/FCH) to inpu t to the X0 pin .
The MCU operation is not guar anteed when the "L" pulse width is shorter than tZLZH.
(2) Power-on Reset (AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Note : Make sure that power supply rises within the selected oscillation stabilization time.
Rapid changes in power su pply vo ltag e may cause a powe r- on reset . If po we r su pp ly volt age need s t o be
varied in the course of operation, a smooth voltage rise is recommended.
Parameter Symbol Condition Value Unit Remarks
Min Max
RST “L” pulse width tZLZH —48 tHCYL —ns
Parameter Symbol Condition Value Unit Remarks
Min Max
Power supply rising time tR——50ms
Power supply cu t-off time tOFF 1 — ms Due to repeated operations
t
ZLZH
0.2
V
CC
0.2
V
CC
RST
0.2
V 0.2
V
Vth
0.2
V
t
R
V
CC
t
OFF
Vth = 3.5 V for MB89PV480, MB89P485 and MB89485
Vth = 1.8 V for MB89P485 L an d MB89 4 85 L
MB89480 Series
DS07-12559-2E 35
(3) Clock Timing (AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Parameter Symbol Pin Value Unit Remarks
Min Typ Max
Clock frequency FCH X0, X1 1 — 12.5 MHz
FCL X0A, X1A — 32.768 — k Hz
Clock cycle time tHCYL X0, X1 80 — 1000 n s
tLCYL X0A, X1A — 30.5 — µs
Input clock pulse width
PWH
PWL X0 20 — — ns
External clock
PWHL
PWLL X0A — 15.2 — µs
Input clock rising/falling time tCR
tCF X0, X0A — — 10 ns
0.2
V
CC
0.8
V
CC
X0 0.2
V
CC
t
CR
P
WH
t
CF
0.8
V
CC
0.2
V
CC
X0 X1 X0 X1
When a crystal
or
ceramic reasonator is used When an external clock is used
Open
t
HCYL
P
WL
F
CH
C1 C2 F
CH
X0 and X1 Timing and Conditions
Main Clock Conditions
MB89480 Series
36 DS07-12559-2E
(4) Instruction Cycle
Parameter Symbol Value Unit Remarks
Instruction cycle
(minimum execution time) tinst
4/FCH, 8/FCH, 16/FCH, 64/FCH µs(4/FCH)tinst = 0.32 µs when operating
at FCH = 12.5 MHz
2/FCL µstinst = 61.036 µs when operating at
FCL = 32.768 kHz
X0A X1A
C0C1
Rd Open
When a crystal
or
ceramic oscillator is used When subclock is not used
X0A X1A
FCL
0.8 VCC
tLCYL
0.2 VCC
PWHL PWLL
tCF tCR
X0A
Open
When an external clock is used
FCL
X0A X1A
Sub-clock Timing and Conditio ns
Sub-clock Conditions
MB89480 Series
DS07-12559-2E 37
(5) Serial I/O Timing (AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485,
AVCC = VCC = 3.0 V for MB89P485L, MB89485L
AVSS = VSS= 0.0 V, TA = –40°C to +85°C)
* : For information on tinst, see “(4) Instruction Cycle.”
Parameter Symbol Pin Condition Value Unit
Min Max
Serial clock cycle time tSCYC SCK Internal
shift clock
mode
2 tinst*—µs
SCK ↓ → SO time tSLOV SCK, SO –200 200 ns
Valid SI → SCK ↑tIVSH SI, SCK 1/2 tinst*— µs
SCK ↑ → valid SI hold time tSHIX SCK, SI 1/2 tinst*— µs
Serial clock “H” pulse width tSHSL SCK External
shift clock
mode
1 tinst*—µs
Serial clock “L” pulse width tSLSH 1 tinst*—µs
SCK ↓ → SO time tSLOV SCK, SO 0 200 ns
Valid SI → SCK ↑tIVSH SI, SCK 1/2 tinst*— µs
SCK ↑ → valid SI hold time tSHIX SCK, SI 1/2 tinst*— µs
MB89480 Series
38 DS07-12559-2E
External Clock Operation
Internal Clock Operation
0.8 V
2.4 V
tSCYC
2.4 V
0.2 VCC
tSHIX
0.8 V
0.8 V
tIVSH
0.8 VCC
0.2 VCC
0.8 VCC
SCK
SO
SI
tSLOV
0.2 VCC
0.8 VCC
tSLSH
2.4 V
0.2 VCC
0.8 VCC
0.8 V
0.8 VCC
0.2 VCC
0.8 VCC
SCK
SO
SI
0.2 VCC
tSHSL
tSHIX
tIVSH
tSLOV
MB89480 Series
DS07-12559-2E 39
(6) Peripheral Input Timing (AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485
AVCC = VCC = 3.0 V for MB89P485L, MB89485L
AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
* : For information on tinst, see “(4) Instruction Cycle.”
Parameter Symbol Pin Value Unit Remarks
Min Max
Peripheral input “H” pulse width 1 tILIH1 INT10 to INT13,
INT20 to INT27, EC1,
EC2, PWC
2 tinst*— µs
Peripheral input “L” pulse width 1 tIHIL1 2 tinst*— µs
0.2 VCC
0.8 VCC
t IHIL1
0.8 VCC
0.2 VCC
t ILIH1
INT10 to INT13,
INT20 to INT27,
EC1, EC2,
PWC
MB89480 Series
40 DS07-12559-2E
5. A/D Converter Electrical Characteristics
(1) A/D Conver ter Electr ical Characteristics
( AVCC = VCC = 4.5 V to 5.5 V for MB89PV480, MB89P485, MB89485,
AVCC = VCC = 2.7 V to 3.6 V for MB89P485L, MB89485L,
AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
* : For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics".
(2) A/D Converter Glossary
• Resolution
Analog changes that are identifiable with the A/D converter.
When the number of bits is 10, analog voltage can be divided into 210 = 1024.
• Linearity error (unit: LSB)
The deviation of the straight line connecting the zero transition point ("00 0000 0000" ↔ "00 0000 0001")
with the full-scale transition point ("11 1111 1111" ↔ "11 1111 1110") from actual conversion characteristics.
• Differential linearity error (unit: LSB)
The deviatio n of input voltage needed to change the output code by 1 LSB from the theoretical value.
• Total error (unit: LSB)
The difference between theoretical and actual conversion values.
Parameter Symbol Pin Value Unit Remarks
Min Typ Max
Resolution
—
—
—10—bit
Total error — — ±4.0 LSB
Linearity err or — — ±2.5 LSB
Differential linearity error — — ±1.9 LSB
Zero transition voltage VOT AVSS – 1.5
LSB AVSS + 0.5
LSB AVSS + 2.5
LSB V
Full-scale transition
voltage VFST AVCC – 4.5
LSB AVCC – 2.5
LSB AVCC - 0.5
LSB V
A/D mode conversion time — — — 60 tinst* µs
Analog port input current IAIN AN0 to
AN3 ——10µA
Analog input voltage VAIN AVSS —AVCC V
MB89480 Series
DS07-12559-2E 41
0.5 LSB
1 LSB
Analog input
AV
SS
1.5 LSB
Theoretical I/O characteristics
3FF
3FE
3FD
004
003
002
001
AV
CC
Theoretical value
Analog input
AV
SS
V
NT
Actual conversion
value
Total error
3FF
3FE
3FD
004
003
002
001
AV
CC
{1 LSB × N + V
OT
}
V
FST
V
OT
Actual conversion
value
Total error = V
NT
– {1 LSB × N + 0.5 LSB}
1 LSB
1 LSB = V
FST
– V
OT
1022
Digital output
Digital output
(V)
Analog input
AV
SS
Linearity error
3FF
3FE
3FD
004
003
002
001
AV
CC
Theoretical value
Analog input
AV
SS
AV
CC
AV
SS
V
NT
V
(N + 1)T
Actual conversion
value
Differential linearity error
N + 1
N
N – 1
N – 2
AV
CC
VNT
V
OT
(Actual measurement)
Actual conversion value
Actual conversion value
Differential linearity error = 1 LSB
V
(N + 1)T
– V
NT
Digital output
Digital output
Linearity error = V
NT
– {1 LSB × N + V
OT
}
1 LSB – 1
{1 LSB × N + V
OT
}
Actual conversion
value
V
FST
(Actual
measurement)
Theoretical value
Analog input
AV
SS
Zero transition error
004
003
002
001
Theoretical value
Analog input
Actual conversion
value
Full-scale transition error
AV
CC
Actual conversion value
Digital output
Digital output
Actual conversion
value
Actual conversion
value
V
OT
(Actual measurement)
V
FST
(Actual
measurement)
3FF
3FE
3FD
3FC
MB89480 Series
42 DS07-12559-2E
(3) Notes on Using A/D Converter
• Input impedance of the analog input pins
The A/D converter used for the MB89480 series contains a sample and hold circuit as illustrated below to
fetch analog input voltage into the sample and hold capacitor fo r 16 inst ruction cycles after activation A/D
conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input
voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep
the output impedance of the external circuit low.
Note that if the impedance cannot be k ept low, it is re commended to connect an external capacitor of abo ut
0.1 µF for the analog input pin.
MB89485
MB89PV480 MB89485L MB89P485 MB89P485L
R: analog input equivalent re sistance 2.2 kΩ2.8 kΩ2.6 kΩ7.1 kΩ
C: analog input equivalent capacitance 45 pF 46 pF 28 pF 48.3 pF
Analog input pin
Sample and hold circuit
Comparator
R C
Analog channel selector
Close for 16 instruction cycles after
activating A/D conversion.
If the analog input
impedance is higher
than 10 kΩ, it is
recommended to
connect an external
capacitor of approx.
0.1 µF.
MB89480 Series
DS07-12559-2E 43
■EXAMPLE CHARACTERISTICS
(1) "L" level output voltage
(2) "H" level output voltage
VOL vs. IOL (MB89485)
0.8
0.6
0.4
0.2
0.0 0246 810
VOL [V]
TA = + 25 °CVCC = 3.0 V
VCC = 3.5 V
VCC = 4.0 V
VCC = 4.5 V
VCC = 5.0 V
VCC = 5.5 V
VCC = 6.0 V
IOL [mA]
VOL vs. IOL (MB89485L)
VOL [V]
IOL [mA]
VCC = 2.5 V
VCC = 3.0 V
VCC = 3.5 V
VCC = 4.0 V
1.2
1.0
0.8
0.6
0.4
0.2
0.0 0246 810
TA = + 25 °CVCC = 2.0 V
V
CC
-V
OH
vs. I
OH
(MB89485)
VCC-VOH [V]
2.0
1.6
1.2
0.8
0.4
0.0 0− 2 − 4 − 6 − 8 − 10
IOH [mA]
VCC = 3.0 V VCC = 3.5 V
VCC = 4.0 V
VCC = 4.5 V
VCC = 5.0 V
VCC = 5.5 V
VCC = 6.0 V
V
CC
-V
OH
vs. I
OH
(MB89485L)
VCC-VOH [V]
2.0
1.6
1.2
0.8
0.4
0.00− 2 − 4 − 6 − 8 − 10
IOH [mA]
VCC = 3.0 V
VCC = 3.5 V
VCC = 4.0 V
VCC = 2.5 VVCC = 2.0 V
TA = + 25 °CTA = + 25 °C
MB89480 Series
44 DS07-12559-2E
(3) "H" level input voltage/"L" level input voltage
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
1234567
VIN [V]
Vcc[V]
TA = +25 C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
1234567
VIN [V]
Vcc[V]
TA = +25 C
VIHS
VILS
o
o
CMOS input (MB89485) CMOS hysteresis input (MB89485)
VIHS : Threshold when input voltage in hysteresis
characteristics is set to “H” level.
VILS : Threshold when input voltage in hysteresis
characteristics is set to “L” level.
MB89480 Series
DS07-12559-2E 45
(4) Power supply current (External clock)
(Continued)
ICC1 vs. VCC (MB89485)
ICC1 [mA]
10.0
8.0
6.0
4.0
2.0
0.0 12 345 6 7
VCC [V]
TA = + 25 °CFCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
ICC2 vs. VCC (MB89485)
ICC2 [mA]
TA = + 25 °CFCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0 1234567
VCC [V]
ICCS1 vs. VCC (MB89485)
ICCS1 [mA]
VCC [V]
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0 12 345 6 7
FCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
ICCS2 vs. VCC (MB89485)
ICCS2 [mA]
VCC [V]
1.2
1.0
0.8
0.6
0.4
0.2
0.0 12 34 5 6 7
TA = + 25 °CFCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
TA = + 25 °C
MB89480 Series
46 DS07-12559-2E
(Continued)
ICC2 vs. VCC (MB89485L)
ICC2 [mA]
VCC [V]
1.0
0.8
0.6
0.4
0.2
0.012 34 5
TA = + 25 °CFCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
ICCS1 vs. VCC (MB89485L)
ICCS1 [mA]
VCC [V]
12345
2.4
2.0
1.6
1.2
0.8
0.4
0.0
TA = + 25 °C
FCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
ICCS2 vs. VCC (MB89485L)
ICCS2 [mA]
VCC [V]
FCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
TA = + 25 °C
12 34 5
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
ICC1 vs. VCC (MB89485L)
ICC1 [mA]
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0 12345
VCC [V]
TA = + 25 °CFCH = 12.5 MHz
FCH = 10.0 MHz
FCH = 8.0 MHz
FCH = 4.0 MHz
FCH = 2.0 MHz
FCH = 1.0 MHz
MB89480 Series
DS07-12559-2E 47
(Continued)
TA = + 25 °C
ICCL vs. VCC (MB89485)
ICCL [µA]
FCL = 32.768 kHz
60
50
40
30
20
10
0123456 7
VCC [V]
ICCT vs. VCC (MB89485)
ICCT [µA]
1234567
VCC [V]
TA = + 25 °C
FCL = 32.768 kHz
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
ICCLS vs. VCC (MB89485)
ICCLS [µA]
123456 7
VCC [V]
16
14
12
10
8
6
4
2
0
TA = + 25 °C
FCL = 32.768 kHz
MB89480 Series
48 DS07-12559-2E
(5) Pull-up resista nc e
R
PULL
vs. V
CC
(MB89485)
R
PULL
[kΩ]
320
280
240
200
160
120
80
40
01234567
T
A
= + 85 °C
T
A
= + 25 °C
T
A
= − 40 °C
V
CC
[V]
R
PULL
vs. V
CC
(MB89485L)
R
PULL
[kΩ]
200
160
120
80
40
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
CC
[V]
T
A
= + 85 °C
T
A
= + 25 °C
T
A
= − 40 °C
MB89480 Series
DS07-12559-2E 49
■MASK OPTIONS
No. Part number MB89485 MB89485L MB89P485 MB89P485L MB89PV480
Specifying procedure Sp ec if y wh e n
ordering mask Setting not possible Setting not possible
1Booster selection (KSV)
• Internal resistor ladder
•Booster Selectable 101/103 : Internal resistor
ladder
102/104: Bo oster
101 : Int erna l res istor
ladder
102: Booster
2
Selection of OTPROM
content protectio n feature
• No protection feature
• With protection feature
—101/102 : No pr otection
103/104 : With protection —
3
Selection of oscillation
stabilization time (OSC)
214/FCH (approx.1.3 ms)
217/FCH (approx.10.5 ms)
218/FCH (approx.21.0 ms)
Selectable OSC 218/FCH (approx.21.0 ms) 218/FCH (approx.21.0 ms)
4
Selection of power-on
stabilization time
•Nil
•2
17/FCH
Selectable Fixed to nil 217/FCH Fixed to nil Fixed to nil
MB89480 Series
50 DS07-12559-2E
■ORDERING IN FORMATION
Part number Package Remarks
MB89485PMC
MB89P485-101PMC
MB89P485-102PMC
MB89P485-103PMC
MB89P485-104PMC
MB89485LPMC
MB89P485L-101PMC
MB89P485L-102PMC
MB89P485L-103PMC
MB89P485L-104PMC
64-pin Plastic QFP
(FPT-64P-M23)
101: With internal resistor ladder,
without content protection
102: With booster, without content
protection
103: With internal resistor ladder,
with content protection
104: With booster, with content protection
MB89485P-SH
MB89P485-101P-SH
MB89P485-102P-SH
MB89P485-103P-SH
MB89P485-104P-SH
MB89485LP-SH
MB89P485L-101P-SH
MB89P485L-102P-SH
MB89P485L-103P-SH
MB89P485L-104P-SH
64-pin Plastic SH-DIP
(DIP-64P-M01)
MB89PV480-101C-SH
MB89PV480-102C-SH 64-pin Ceramic MDIP
(MDP-64C-P02)
MB89PV480-101CF
MB89PV480-102CF 64-pin Ceramic MQFP
(MQP-64C-P01)
MB89480 Series
DS07-12559-2E 51
■PACKAGE DIMENSIONS
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/ (Continued)
64-pin plastic SH-DIP Lead pitch 1.778mm(70mil)
Package width ×
package length 17 × 58 mm
Sealing method Plastic mold
Mounting height 5.65 mm MAX
64-pin plastic SH-DIP
(DIP-64P-M01)
(DIP-64P-M01)
C
2001-2008 FUJITSU MICROELECTRONICS LIMITED D64001S-c-4-6
58.00
+0.22
–0.55 +.009
–.022
2.283
17.00±0.25
(.669±.010)
3.30
+0.20
–0.30
.130
–.012
+.008
+.028
–.008
.195
–0.20
+0.70
4.95
+.016
–.008
.0543
–0.20
+0.40
1.3781.778(.0700) 0.47±0.10
(.019±.004) 1.00
+0.50
–0
.039
–.0
+.020
+.020
–.007
.028
–0.19
+0.50
0.70
19.05(.750)
(.011±.004)
0.27±0.10
0~15
INDEX-2
INDEX-1
M
0.25(.010)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note: Pins width and pins thickness include plating thickness.
MB89480 Series
52 DS07-12559-2E
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/ (Continued)
64-pin plastic LQFP Lead pitch 0.65 mm
Package width ×
package length 12.0 × 12.0 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height
1.70 mm MAX
Code
(Reference) P-LFQFP64-12×12-0.65
64-pin plastic LQFP
(FPT-64P-M23)
(FPT-64P-M23)
C
2003 FUJITSU LIMITED F64034S-c-1-1
0.65(.026)
0.10(.004)
116
17
32
49
64
3348
*12.00±0.10(.472±.004)SQ
14.00±0.20(.551±.008)SQ
INDEX
0.32±0.05
(.013±.002)
M
0.13(.005)
0.145±0.055
(.0057±.0022)
"A"
.059
–
.004
+.008
–
0.10
+0.20
1.50
0~8˚
0.25(.010)
(Mounting height)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
Details of "A" part
(Stand off)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
©2003-2008 FUJITSU MICROELECTRONICS LIMITED F64034S-c-1-2
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3)Pins width do not include tie bar cutting remainder.
MB89480 Series
DS07-12559-2E 53
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/ (Continued)
64-pin ceramic MDIP Lead pitch 1.778mm (70mil)
Row spacing 19.05mm (750mil)
Motherboard
materialCeramic
Mounted
packing materialPlastic
64-pin ceramic MDIP
(MDP-64C-P02)
(MDP-64C-P02)
+0.13
–0.08
+.005
–.003
INDEX AREA
0°~9°
(.750±.012)
19.05±0.30
0.46
.018
(2.240±.025)
(.010±.002)
0.25±0.05
(.050±.010)
1.27±0.25
(.135±.015)
3.43±0.38
55.12(2.170)REF
(.035±.005)
0.90±0.13
(.070±.010)
1.778±0.25
10.16(.400)MAX
33.02(1.300)REF
(.100±.010)
2.54±0.25
(.738±.012)
18.75±0.30
TYP
15.24(.600)
56.90±0.64
1994-2008 FUJITSU MICROELECTRONICS LIMITED M64002SC-1-5
C
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB89480 Series
54 DS07-12559-2E
(Continued)
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
64-pin ceramic MQFP Lead pitch 1.00 mm
Lead shape Straight
Motherboard
materialCeramic
Mounted package
materialPlastic
64-pin ceramic MQFP
(MQP-64C-P01)
(MQP-64C-P01)
C
1994-2008 FUJITSU MICROELECTRONICS LIMITED M64004SC-1-4
15.58±0.20
(.613±.008)
16.30±0.33
(.642±.013)
18.70(.736)TYP
INDEX AREA
0.30(.012)
TYP
1.27±0.13
(.050±.005)
22.30±0.33
(.878±.013)
24.70(.972)
TYP
10.16(.400)
TYP
12.02(.473)
TYP14.22(.560)
TYP
18.12±0.20
(.713±.008)
1.27±0.13
(.050±.005) 0.30(.012)TYP
7.62(.300)TYP
9.48(.373)TYP
11.68(.460)TYP
0.50(.020)TYP 0.15±0.05
(.006±.002)
10.82(.426)
MAX
0.40±0.10
(.016±.004) .047
Ð.008
+.016
Ð0.20
+0.40
1.20
0.40±0.10
(.016±.004)
1.00±0.25
(.039±.010)
18.00(.709)
TYP
1.00±0.25
(.039±.010)
12.00(.472)TYP
.047
Ð.008
+.016
Ð0.20
+0.40
1.20
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB89480 Series
DS07-12559-2E 55
■MAIN CHANGES IN THIS EDITION
The vertical lines marked in the left side of the page show the changes.
Page Section Change Results
⎯⎯
Changed the series name;
MB89480/MB89480L series → MB89480 series
⎯⎯
Changed the package code.
FPT-64P-M09 → FPT-64P-M23
18 ■ PROGRAMMING TO THE EPROM WITH
PIGGYBACK/EVALUATION DEVICE Deleted the “2. Progr am m i ng Sock et Ad ap ter”
40 ■ ELECTRICAL CHARACTERISTICS
5. A/D Converter Electrical Characteristics
Changed the unit of “Zero transition voltage” and
“Full-scale transition voltage”.
mV → V
50 ■ ORDERING INFORMATION
Changed the order informations.
MB89485PFM → MB89485PMC
MB89P485-101PFM → MB89P485-101PMC
MB89P485-102PFM → MB89P485-102PMC
MB89P485-103PFM → MB89P485-103PMC
MB89P485-104PFM → MB89P485-104PMC
MB89485LPFM → MB89485LPMC
MB89P485L-101PFM → MB89 P485L-101PMC
MB89P485L-102PFM → MB89 P485L-102PMC
MB89P485L-103PFM → MB89 P485L-103PMC
MB89P485L-104PFM → MB89 P485L-104PMC
52 ■ PACKAGE DIMENSIONS Changed the package figure.
FPT-64P-M09 → FPT-64P-M23
MB89480 Series
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
F or further inf ormation please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
FUJITSU MICROELECTR ONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-36 88 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The informatio n, such as desc riptions of function and application circuit examples, in this document a re present ed solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of functio n and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual p roper ty right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and househo ld use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe p hysical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redund ancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Business & Media Promotion Dept.
