© Semiconductor Components Industries, LLC, 2015
November, 2018 − Rev. 15
1Publication Order Number:
LC709203F/D
LC709203F
Smart LiB Gauge
Battery Fuel Gauge LSI
For 1‐Cell Lithium‐ion/
Polymer (Li+)
Overview
LC709203F is a Fuel Gauge for a single lithium ion/polymer
battery. It is part of our Smart LiB Gauge family of Fuel Gauges
which measure the battery RSOC (Relative State Of Charge) using its
unique algorithm called HG−CVR. The HG−CVR algorithm
eliminates the use of a sense resistor and provides accurate RSOC
information even under unstable conditions (e.g. changes of battery;
temperature, loading, aging and self-discharge). An accurate RSOC
contributes to the operating time of portable devices.
LC709203F is available in two small packages realizing the
industries smallest PCB footprint for the complete solution. It has
minimal parameters to be set by the user enabling simple, quick setup
and operation.
Features
•HG−CVR Algorithm Technology
♦No External Sense Resistor
♦2.8% Accuracy of RSOC
♦Accurate RSOC of Aging Battery
♦Automatic Convergence of Error
♦Adjustment for the Parasitic Impedance around the Battery
♦Simple and Quick Setup
•Low Power Consumption
♦3A Operational Mode
•Precision Voltage Measurement
♦±7.5 mV
•Precision Timer
♦±3.5%
•Alerts for Low RSOC and/or Low Voltage
•Temperature Compensation
♦Sense Thermistor Input
♦Via I2C
•Detect Battery Insertion
•I2C Interface (up to 400 kHz Supported)
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
•Wireless Handsets
•Smartphones/PDA Devices
•MP3 Players
•Digital Cameras
•Portable Game Players
•USB-related Devices
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WDFN8
CASE 509AF
MARKING DIAGRAMS
See detailed ordering and shipping information on page 19 of
this data sheet.
ORDERING INFORMATION
1
WLCSP9
CASE 567JH
9203F** = Specific Device Code
** = 01 (LC709203FQH−01TWG)
02 (LC709203FQH−02TWG)
03 (LC709203FQH−03TWG)
04 (LC709203FQH−04TWG)
AS = Assembly Location
WL = Lot Number
YW = Work Week
G= Pb−Free Package
9203F
**
ASWLYW
G
(Note: Microdot may be in either location)
WDFN8
203**
YMXXX
WLCSP9
203** = Specific Device Code
** = 01 (LC709203FXE−01MH)
02 (LC709203FXE−02MH)
03 (LC709203FXE−03MH)
04 (LC709203FXE−04MH)
05 (LC709203FXE−05MH)
Y = Year
M = Month Code
XXX = Lot Number
LC709203F
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Application Circuit Example
Figure 1. Example of an Application Schematic using LC709203F
(Temperature Input via I2C)
LC709203F
ASIC
Battery
Pack
Interrupt Input
VSS
Master
I2C Bus VDD
System VDD
10 k10 k
10 k
System
System VSS
1 F
PACK−
PACK+
TEST
VSS
VDD
ALARMB
SCL
SDA
TSENSE
TSW
T
Figure 2. Example of an Application Schematic using LC709203F
(The Temperature is Measured Directly by a Thermistor)
LC709203F
ASIC
Battery
Pack
Interrupt Input
VSS
Master
I2C Bus VDD
System VDD
10 k10 k
10 k
System
System VSS
1 F
PACK−
PACK+
TEST
VSS
VDD
ALARMB
SCL
SDA
TSENSE
TSW
T
100
10 k (same as Thermistor
Resistance Value)
10 k
Thermistor
LC709203F
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Figure 3. Simplified Block Diagram
Voltage
Sense
Reference
Voltage
ADC
I2C
Interface
Processing
Unit
Timer
Power On
Reset
Look Up
Table for
Internal
Battery
Impedance
& OCV
ALARMB
TEST
SDA
SCL
TSW
TSENSE
VDD
VSS
VDD
Drv
Figure 4. Pin Assignment
1234
8765 3C
2C
1C
3B
2B
1B
3A
2A
1A
WDFN8 3x4, 065P
“Pb-Free, Halogen Free Type”
WLCSP9 1.60x1.76
“Pb-Free, Halogen Free Type”
(Top View) (Bottom View)
TSENSE
SCL
SDA
TSW
NC
TEST
VDD
ALARMB
VSS
SDA
SCL
TSW
TSENSE
VDD
VSS
TEST
ALARMB
LC709203F
LC709203F
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Table 1. PIN FUNCTION
WDFN8 WLP9 Pin Name I/O Description
1 1B TEST I Connect this pin to VSS.
2 1A VSS −Connect this pin to the battery’s negative (−) pin.
3 3A VDD −Connect this pin to the battery’s positive (+) pin.
4 2A ALARMB O This pin indicates alarm by low output(open drain). Pull-up must be done externally.
Alarm conditions are specified by registers (0x13 or 0x14).
Connect this pin to VSS when not in use.
5 3B TSW OPower supply output for thermistor. This pin goes HIGH during temperature read
operation. Resistance value of TSW (for thermistor pull-up) must be the same value
as the thermistor. (Note 1)
6 3C TSENSE IThermistor sense input. If you connect this pin to thermistor, insert 100 resistance
between them for ESD. (Note 1)
7 1C SDA I/O I2C Data pin (open drain). Pull-up must be done externally.
8 2C SCL I/O I2C Clock pin (open drain). Pull-up must be done externally.
−2B NC −Don’t care.
1. TSW and TSENSE must be disconnected as Figure 1 when not in use.
Table 2. ABSOLUTE MAXIMUM RATINGS (TA = 25°C, VSS = 0 V)
Parameter Symbol Pin/Remarks Conditions VDD (V)
Specification
Unit
Min Typ Max
Maximum Supply Voltage VDD max VDD −−0.3 −+6.5 V
Input Voltage VI (1) TSENSE −−0.3 −VDD + 0.3
Output Voltage Vo (1) TSW −−0.3 −VDD + 0.3
Vo (2) ALARMB −−0.3 −
Input/Output Voltage VIO (1) SDA, SCL −−0.3 −+5.5
Allowable Power Dissipation Pd max WDFN8 TA = −40 to
+85_C
−−−480 mW
WLP9 −−−210
Operating Ambient Temperature Topr −−40 −+85 _C
Storage Ambient Temperature Tstg −−55 −+125
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. ALLOWABLE OPERATING CONDITIONS (TA = −40 to +85°C, VSS = 0 V)
Parameter Symbol Pin/Remarks Conditions VDD (V)
Specification
Unit
Min Typ Max
Operating Supply Voltage VDD (1) VDD −2.5 −4.5 V
High Level Input Voltage VIH (1) TSENSE 2.5 to 4.5 0.7 VDD −VDD
VIH (2) ALARMB, SDA, SCL 2.5 to 4.5 1.4 − −
Low Level Input Voltage VIL (1) TSENSE 2.5 to 4.5 VSS −0.25 VDD
VIL (2) ALARMB, SDA, SCL 2.5 to 4.5 − − 0.5
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
LC709203F
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Table 4. ELECTRICAL CHARACTERISTICS (TA = −40 to +85°C, VSS = 0 V)
Parameter Symbol Pin/Remarks Conditions VDD (V)
Specification
Unit
Min Typ Max
High Level Input Current IIH (1) SDA, SCL VIN = VDD
(including output
transistor off leakage
current)
2.5 to 4.5 − − 1A
Low Level Input Current IIL (1) SDA, SCL VIN = VSS
(including output
transistor off leakage
current)
2.5 to 4.5 −1− −
High Level Output Voltage VOH (1) TSW IOH = −0.4 mA 3.0 to 4.5 VDD − 0.4 − − V
VOH (2) IOH = −0.2 mA 2.5 to 4.5 VDD − 0.4 − −
Low Level Output Voltage VOL (1) TSW,
ALARMB,
SDA, SCL
IOL = 3.0 mA 3.0 to 4.5 − − 0.4
VOL (2) IOL = 1.3 mA 2.5 to 4.5 − − 0.4
Hysteresis Voltage VHYS(1) SDA, SCL 2.5 to 4.5 −0.1 VDD −
Pin Capacitance CP All pins Pins other than
the pin under test
VIN = VSS
TA = 25_C
2.5 to 4.5 −10 −pF
Reset Release Voltage
(Note 2)
VRR VDD − − 2.4 V
Initialization Time after
Reset Release (Note 2)
TINIT 2.4 to 4.5 − − 90 ms
Auto Sleep Set Time TATS 2.4 to 4.5 −1 1.2 s
Time Measurement
Accuracy
TME TA = −20_C to +70_C2.5 to 4.5 −3.5 −+3.5 %
Consumption Current
(Note 3)
IDD (1) VDD Operational mode 2.5 to 4.5 −3 4.5 A
IDD (2) Sleep mode 2.5 to 4.5 −1 2
Voltage Measurement
Accuracy
VME (1) VDD TA = +25_C3.6 −7.5 −+7.5 mV/cell
VME (2) TA = −20_C to +70_C2.5 to 4.5 −20 −+20
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Once VDD voltage exceeds over the VRR, this LSI will release RESET status. And the LSI goes into Sleep mode TINIT after it.
3. Consumption current is a value in the range of −20_C to +70_C.
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Table 5. I2C SLAVE CHARACTERISTICS (TA = −40 to +85°C, VSS = 0 V)
Parameter Symbol Pin/Remarks Conditions VDD (V)
Specification
Unit
Min Max
Clock Frequency TSCL SCL
2.5 to 4.5
−400 kHz
Bus Free Time between STOP condition
and START condition
TBUF SCL, SDA (See Figure 5) 1.3 −s
Hold Time (repeated) START condition.
First clock pulse is generated after this
interval
THD:STA SCL, SDA (See Figure 5) 0.6 −s
Repeated START Condition Setup Time TSU:STA SCL, SDA (See Figure 5) 0.6 −s
STOP Condition Setup Time TSU:STO SCL, SDA (See Figure 5) 0.6 −s
Data Hold Time THD:DAT SCL, SDA (See Figure 5) 0 0.9 s
Data Setup Time TSU:DAT SCL, SDA (See Figure 5) 100 −ns
Clock Low Period TLOW SCL (See Figure 5) 1.3 −s
Clock High Period THIGH SCL (See Figure 5) 0.6 −s
Clock/Data Fall Time TFSCL, SDA 20 + 0.1CB300 ns
Clock/Data Rise Time TRSCL, SDA 20 + 0.1CB300 ns
Time-out Interval (Notes 4, 5) TTMO SCL, SDA (See Figure 6) 911 s
Wake Up Time from Sleep Mode TWU SDA (See Figure 7) −400 s
SDA Low Pulse Width to Wake Up TSP SDA (See Figure 7) 0.6 −s
Wake Up Retention Time from the Falling
Edge of SDA TWR1 SDA (See Figure 7) 500 −ms
Wake Up Retention Time from STOP
Condition TWR2 SCL, SDA (See Figure 7) 500 −ms
4. This LSI resets I2C communication if the communication takes more than TTMO. It initializes an internal timer to measure the interval when
it detects ninth clock pulse. It can receive a new START condition after the reset.
5. This LSI may lose I2C communication at this reset operation. Then if a master can’t receive a response it must restart transaction from START
condition.
Figure 5. I2C Timing Diagram
SCL
SDA
TBUF
THD;STA
PS
TLOW THD;DAT THIGH TSU;DAT TSU;STA
S
TSU;STO
P
TRTF
Figure 6. I2C Time-out Interval
1 2 8 9 1 2 8 9
ACK ACK
SCL
SDA
S
TTMO
LC709203F
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I2C Communication Protocol
Communication protocol type: I2C
Frequency: Supported up to 400 kHz
IC address [Slave Address]: 0x16 (It becomes “0001011X” when you write a binary, because the slave address is 7 bits. [X] = Rd/Wr.)
This LSI will stretch the clock.
Bus Protocols
S : Start Condition
Sr : Repeated Start Condition
Rd : Read (bit value of 1)
Wr : Write (bit value of 0)
A : ACK (bit value of 0)
N : NACK (bit value of 1)
P : Stop Condition
CRC−8 : Slave Address to Last Data (CRC−8−ATM : ex.3778 mV : 0x16, 0x09, 0x17, 0xC2, 0x0E → 0x86)
:Master-to-Slave
:Slave-to-Master
…: Continuation of protocol
Read Word Protocol
SSlave Address Wr ACommand Code A…
Sr Slave Address Rd A Data Byte Low AData Byte High …
ACRC−8 N P
* When you do not read CRC−8, there is not the reliability of data. CRC−8−ATM ex: (5 bytes) 0x16, 0x09, 0x17, 0xC2,
0x0E → 0x86
Write Word Protocol
SSlave Address Wr ACommand Code A…
Data Byte Low AData Byte High ACRC−8 A P
* When you do not add CRC−8, the Written data (Data byte Low/High) become invalid.
CRC−8−ATM ex: (4 bytes) 0x16, 0x09, 0x55, 0xAA → 0x3B
LC709203F
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Wake Up from Sleep Mode
Figure 7. I2C Wake up Timing Diagram
SDA
(Not to Scale)
SCL
(Not to Scale)
SDA
STOP Condition
TWR2
Sleep Mode
Enable I2C Communication Disable I2C Communication
Enable I2C
Communication
Disable I2C Communication
Disable I2C
Communication
Sleep Mode
TWR1
TWU
TPS
To wake up from Sleep mode, and to start I2C
communication, Host side must set SDA low prior to the I2C
communication. The Fuel Gauge LSI enables I2C
communication after the TWU time period which is
measured from the falling edge of SDA, as above timing
chart. This “Wake up condition” is invalid for the following
two cases:
1. After TWR1 timing following the falling edge of
SDA, the Fuel Gauge LSI “Wake up condition”
goes into autonomous disable. Once I2C
communication is started, the operation doesn’t go
into disable until the TWR2 timing has elapsed
after STOP condition (below case).
2. After TWR2 timing following I2C Bus STOP
condition, the Fuel gauge LSI “Wake up
condition” goes into autonomous disable.
If the “Wake up condition” goes into disable, set SDA low
to once again wake up from the Sleep mode prior to the I2C
communication. If Operational mode is set, it is possible to
start I2C communication without this “Wake up operation”.
Notice for I2C Communication Shared with Another
Device
When the I2C Bust (on which the Fuel Gauge LSI is
connected) is shared with another device the Fuel Gauge LSI
must be in its operation mode before the other Device starts
I2C communication.
LC709203F
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Table 6. FUNCTION OF REGISTERS
Command
Code Register Name R/W Range Unit Description
Initial
Value
0x04 Before RSOC W0xAA55: Initialize RSOC Executes RSOC initialization with sampled
maximum voltage when 0xAA55 is set.
−
0x06 Thermistor B R/W 0x0000 to 0xFFFF 1K Sets B−constant of the
thermistor to be measured.
0x0D34
0x07 Initial RSOC W0xAA55: Initialize RSOC Executes RSOC initialization when 0xAA55
is set.
−
0x08 Cell Temperature R0x0000 to 0xFFFF 0.1K
(0.0°C =
0x0AAC)
Displays Cell Temperature 0x0BA6
(25°C)
W0x09E4 to 0x0D04
(I2C mode)
Sets Cell Temperature in I2C
mode
0x09 Cell Voltage R0x0000 to 0xFFFF 1mV Displays Cell Voltage −
0x0A Current Direction R/W 0x0000: Auto mode
0x0001: Charge mode
0xFFFF: Discharge mode
Selects Auto/Charge/Discharge mode 0x0000
0x0B APA
(Adjustment Pack
Application)
R/W 0x0000 to 0x00FF 1 mSets Parasitic impedance −
0x0C APT
(Adjustment Pack
Thermistor)
R/W 0x0000 to 0xFFFF Sets a value to adjust temperature
measurement delay timing
0x001E
0x0D RSOC R/W 0x0000 to 0x0064 1% Displays RSOC value based
on a 0−100 scale
−
0x0F ITE (Indicator to
Empty)
R0x0000 to 0x03E8 0.1% Displays RSOC value based
on a 0−1000 scale
−
0x11 IC Version R0x0000 to 0xFFFF Displays an ID number of an IC −
0x12 Change Of The
Parameter
R/W 0x0000 or 0x0001 Selects a battery profile 0x0000
0x13 Alarm Low RSOC R/W 0x0000: Disable
0x0001to0x0064: Threshold
1% Sets RSOC threshold to
generate Alarm signal
0x0008
0x14 Alarm Low Cell
Voltage
R/W 0x0000: Disable
0x0001to0xFFFF: Threshold
1mV Sets Voltage threshold to
generate Alarm signal
0x0000
0x15 IC Power Mode R/W 0x0001: Operational mode
0x0002: Sleep mode
Selects Power mode (Note 6)
0x16 Status Bit R/W 0x0000: I2C mode
0x0001: Thermistor mode
Selects Temperature obtaining method 0x0000
0x1A Number of The
Parameter
R0x0301 or 0x0504 Displays Battery profile code −
NOTE: 0xXXXX = Hexadecimal notation
6. See “Power-on Reset/Battery Insertion Detection” and Figure 17.
Before RSOC (0x04)
This LSI will get initial RSOC by Open Circuit Voltage
(OCV) of a battery. It is desirable for battery current to be
less than 0.025C to get expected OCV. (i.e. less than 75 mA
for 3000 mAh design capacity battery.) This LSI initializes
RSOC by measured battery voltage in initial sequence. (See
Figure 8) But if reported RSOC after reset release is not
expected value, “Before RSOC” command (0x04 = AA55)
or “Initial RSOC” command (0x07 = AA55) can initialize
RSOC again.
“Before RSOC” command can obtain historical voltage
data in-between Release reset and “Before RSOC”
command timing. And this command initializes RSOC with
the maximum battery voltage which was obtained. (See
Figure 9) Don’t use this command if battery is charged in the
term.
Thermistor B (0x06)
Sets B-constant of the thermistor to be measured. Refer to
the specification sheet of the thermistor for the set value to
use.
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Initial RSOC (0x07)
The LSI can be forced to initialize RSOC by sending the
Before RSOC Command (0×04 = AA55) or the Initial
RSOC Command (0×07 = AA55).
Figure 8. RSOC Automatic Initialization
Figure 9. Before RSOC Command
The LSI initializes RSOC by the measured voltage at that
time when the Initial RSOC command is written. (See
Figure 10). The maximum time to initialize RSOC after the
command is written is 1.5 ms.
Cell Temperature (0x08)
This register contains the cell temperature from −20_C
(0×09E4) to +60_C (0×0D04) measured in 0.1_C units.
In the Thermistor mode (0×16 = 01) the LSI measures the
attached thermistor and loads the temperature into the Cell
Temperature register. In the Thermistor mode, the
thermistor shall be connected to the LSI as shown in
Figure 2. The temperature is measured by having TSW pin
to provide power into the thermistor and TSENSE pin to
sense the output voltage from the thermistor. Temperature
measurement timing is controlled by the LSI, and the power
to the thermistor is not supplied for other reasons except to
measure the temperature.
In the I2C mode (0×16 = 00) the temperature is provided
by the host processor. During discharge/charge the register
should be updates when the temperature changes more than
1_C
Cell Voltage (0x09)
This register contains the voltage on VDD 1 mV units.
Current Direction (0x0A)
This register is used to control the reporting of RSOC. In
Auto mode the RSOC is reported as it increases or decreases.
In Charge mode the RSOC is not permitted to decrease. In
Discharge mode the RSOC is not permitted to increase.
With consideration of capacity influence by temperature,
we recommend operating in Auto because RSOC is affected
by the cell temperature. A warm cell has more capacity than
a cold cell. Be sure not to charge in the Discharge mode and
discharge in the Charge mode; it will create an error.
An example of RSOC reporting is shown in Figures 11
and 12.
Figure 10. Initial RSOC Command
Figure 11. Discharge Mode
(An example with increasing in temperature. A warm
cell has more capacity than a cold cell. Therefore
RSOC increases without charging in Auto mode)
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11
Figure 12. Charge Mode
(An example with decreasing in temperature. A cold
cell has less capacity than a warm cell. Therefore
RSOC decreases without discharging in Auto mode)
Adjustment Pack Application (0x0B)
This register contains the adjustment value for a battery
type to improve the RSOC precision. Figure 13 and Table 7
show typical values of APA according to the design
capacities per 1 cell and battery type. When some batteries
are connected in parallel, the design capacity per 1 cell is
applied to the table. The APA values of Type−04 and
Type−05 are used for battery type that is specified in Table 8.
Please contact ON Semiconductor if you don’t satisfy the
RSOC precision. The deeper adjustment of APA may
improve the accuracy.
Figure 13. Typical APA
Adjustment Pack Thermistor (0x0C)
This is used to compensate for the delay of the thermistor
measurement caused by a capacitor across the thermistor.
The default value has been found to meet most of circuits
where a capacitor like showing in Figure 14 is not put.
Please contact ON Semiconductor if you have an unusual
circuit implementation.
Table 7. TYPICAL APA
Design
Capacity
of Battery
APA(0x0B)
Type−01,
Type−03 Type−06 Type−07
100 mAh 0x08 0x0D 0x07
200 mAh 0x0B 0x15 0x0C
500 mAh 0x10 0x20 0x18
1000 mAh 0x19 −0x28
2000 mAh 0x2D −0x40
3000 mAh 0x36 −0x4D
Design
Capacity
of Battery
APA(0x0B)
Type−04 Type−05
2600 mAh 0x1A 0x0D
Figure 14. An Example of a Capacitor Across
the Thermistor
RSOC (0x0D)
RSOC is reported in 1% units over the range 0% to 100%.
When this register is written in operational mode the data
may be updated to close it to actual RSOC of a battery. Set
Sleep mode to keep the data. Writing to this register is not
necessary in normal operation. ITE (0x0F) will be updated
with the writing too.
Indicator to Empty (0x0F)
This is the same as RSOC with a resolution of 0.1% over
the range 0.0% to 100.0%.
IC Version (0x11)
This is an ID number of an LSI.
Change of the Parameter (0x12)
The LSI contains a data file comprised of two battery
profiles. This register is used to select the battery profile to
be used. See Table 8. Register Number of the Parameter
(0x1A) contains identity of the data file.
LC709203F
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The Data file is loaded during final test depending on the
part number ordered.
Most of the time, battery nominal/rated voltage or
charging voltage values are used to determine which profile
data shall be used. Please contact ON Semiconductor if you
cannot identify which profile to select.
Alarm Low RSOC (0x13)
The ALARMB pin will be set low when the RSOC value
falls below this value, will be released from low when RSOC
value rises than this value. Set to Zero to disable. Figure 15.
Figure 15. Alarm Low RSOC
Alarm Low Cell Voltage (0x14)
The ALARMB pin will be set low if VDD falls below this
value, will be released from low if VDD rises than this value.
Set to Zero to disable. Figure 16.
IC Power Mode (0x15)
The LSI has two power modes. Sleep (0x15 = 02) or
Operational mode (0x15 = 01). In the Sleep mode only I2C
communication functions. In the Operational mode all
functions operate with full calculation and tracking of
RSOC during charge and discharge.
If the battery is significantly charged or discharged during
sleep mode, the RSOC will not be accurate. Moved charge
is counted continuously to measure the RSOC in
Operational mode. If battery is discharged or charged in the
Sleep mode, the count breaks off.
When it is switched from Sleep mode to Operational
mode, RSOC calculation is continued by using the data
which was measured in the previous Operational mode.
Figure 16. Alarm Low Cell Voltage
Status Bit (0x16)
This selects the Thermistor mode. Thermistor mode
(0x16 = 01) the LSI measures the attached thermistor and
loads the temperature into the Cell Temperature register.
I2C mode (0x16 = 00) the temperature is provided by the
host processor.
Number of the Parameter (0x1A)
The LSI contains a data file comprised of two battery
profiles. This register contains identity of the data file.
Please see register Change of the Parameter (0x12) to select
the battery profile to be used. See Table 8.
The Data file is loaded during final test depending on the
part number ordered. This file can be loaded in the field if
required.
Please contact ON Semiconductor if you cannot identify
which profile to select.
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Table 8. BATTERY PROFILE VS. REGISTER
IC Type
Battery
Type
Nominal/Rated
Voltage
Charging
Voltage
Design
Capacity
Number of
the Parameter
(0x1A)
Change of
the Parameter
(0x12)
LC709203Fxx−01xx 03 3.8 V 4.35 V ≥ 500 mAh 0x0301 0x0000
01 3.7 V 4.2 V −0x0001
LC709203Fxx−03xx 06 3.8 V 4.35 V < 500 mAh 0x0601 0x0000
01 3.7 V 4.2 V −0x0001
LC709203Fxx−04xx 05 ICR18650−26H (SAMSUNG) 0x0504 0x0000
04 UR18650ZY (Panasonic) 0x0001
LC709203Fxx−05xx 07 3.85 V 4.4 V −0x0706 0x0000
06 3.8 V 4.35 V < 500 mAh 0x0001
HG−CVR
Hybrid Gauging by Current-Voltage Tracking with
Internal Resistance
HG−CVR is ON Semiconductor’s unique method which
is used to calculate accurate RSOC. HG−CVR first
measures battery voltage and temperature. Precise reference
voltage is essential for accurate voltage measurement.
LC709203F has accurate internal reference voltage circuit
with little temperature dependency.
It also uses the measured battery voltage and internal
impedance and Open Circuit Voltage (OCV) of a battery for
the current measurement. OCV is battery voltage without
load current. The measured battery voltage is separated into
OCV and varied voltage by load current. The varied voltage
is the product of load current and internal impedance. Then
the current is determined by the following formulas.
V(VARIED) +V(MEASURED) *OCV (eq. 1)
I+
V(VARIED)
R(INTERNAL) (eq. 2)
Where V(VARIED) is varied voltage by load current,
V(MEASURED) is measured voltage, R(INTERNAL) is
internal impedance of a battery. Detailed information about
the internal impedance and OCV is installed in the LSI. The
internal impedance is affected by remaining capacity,
load-current, temperature, and more. Then the LSI has the
information as look up table. HG−CVR accumulates battery
coulomb using the information of the current and a steady
period by a high accuracy internal timer. The remaining
capacity of a battery is calculated with the accumulated
coulomb.
How to Identify Aging
By repeating discharge/charge, internal impedance of
a battery will gradually increase, and the Full Charge
Capacity (FCC) will decrease. In coulomb counting method
RSOC is generally calculated using the FCC and the
Remaining Capacity (RM).
RSOC +RM
FCC
100% (eq. 3)
Then the decreased FCC must be preliminarily measured
with learning cycle. But HG−CVR can measure the RSOC
of deteriorated battery without learning cycle. The internal
battery impedance that HG−CVR uses to calculate the
current correlates highly with FCC. The correlation is based
on battery chemistry. The RSOC that this LSI reports using
the correlation is not affected by aging.
Figures 24−26 show RSOC measurement result of
a battery with decreased FCC due to its aging. The shown
RSOC is based on the decreased FCC even with a battery
with 80% FCC after executing 300 times of discharge/
charge.
Automatic Convergence of the Error
A problem of coulomb counting method is the fact that the
error is accumulated over time − This error must be
corrected. The general gauges using coulomb counting
method must find an opportunity to correct it.
This LSI with HG−CVR has the feature that the error of
RSOC converges autonomously, and doesn’t require
calibration opportunities. The error constantly converges in
the value estimated from the Open Circuit Voltage.
Figure 27 shows the convergent characteristic example
from the initialize error.
Also, coulomb counting method cannot detect accurate
residual change because the amount of the current from
self-discharge is too small but HG−CVR is capable to deal
with such detection by using the voltage information.
Simple and Quick Setup
In general, it is necessary to obtain multiple parameters for
a fuel gauge and it takes a lot of resource and additional
development time of the users. One of the unique features of
LC709203F is very small number of parameters to be
prepared by the beginning of battery measurement – the
minimum amount of parameter which users may make is
one because Adjustment pack application register has to
LC709203F
www.onsemi.com
14
have one. Such simple and quick start-up is realized by
having multiple profile data in the LSI to support various
types of batteries. Please contact your local sales office to
learn more information on how to measure a battery that
cannot use already-prepared profile data.
Low Power Consumption
Low power consumption of 3 A is realized in the
Operation mode. This LSI monitors charge/discharge
condition of a battery and changes the sampling rate
according to its change of current. Power consumption
reduction without deteriorating its RSOC accuracy was
enabled by utilizing this method.
Power-on Reset/Battery Insertion Detection
When this LSI detects battery insertion, it starts Power-on
reset automatically. Once the battery voltage exceeds over
the VRR, it will release RESET status and will complete LSI
initialization within TINIT to enter into Operational mode.
All registers are initialized after Power-on reset. Then I2C
communication can be started.
LC709203FXE−0xMH sets itself into Sleep mode
automatically after TATS from the end of initialization.
Therefore set to operational mode manually after it enters
into Sleep mode. LC709203FQH−0xTWG doesn’t set itself
into Sleep mode automatically. Figure 17.
This LSI will also execute system reset automatically if
a battery voltage exceeds under the VRR during operation.
Furthermore after Change of the Parameter (0x12)
command input it will execute LSI initialization like battery
insertion. Figure 18.
Parasitic Resistance
The LSI measures RSOC by using internal impedance of
a battery. Therefore, the parasitic resistance which exists in
VDD/VSS Lines between measured Battery or Battery Pack
to the LSI can become an error factor. But the resistance of
Lines which is not connected other than the LSI is not
included. Figure 19.
The lower resistance may improve the RSOC precision.
Please see LC709203F Application note for information
about layout method of VDD/VSS Lines to reduce it.
Measurement Starting Flow
After Reset release, users can start battery measurement
by writing appropriate value into the registers by following
the flow shown in Figures 20−21. Please refer to Register
function section for more information about each register.
Figure 17. Power On Timing Diagram
Reset Initialization Operation Mode
Reset Initialization Operation Mode Sleep Mode
LC709203FQH−0xTWG
LC709203FXE−0xMH
VDD
VRR
VDD
VRR
(Not to Scale)
TINT
TINT
TATS
LC709203F
www.onsemi.com
15
Figure 18. Timing Diagram after 0x12 Command
0x12
Command Initialization Operation Mode
Initialization Operation Mode Sleep Mode
LC709203FQH−0xTWG
LC709203FXE−0xMH
SCL
TINIT
SDA
TINIT TATS
SCL
SDA
0x12
Command
Stop Condition
Stop Condition
(Not to Scale)
Figure 19. An Example of Parasitic Resistance
Application
Application
Processor
Battery
or
Battery Pack
LC709203F
VDD
VSS
The components that the resistance must be measured.
LC709203F
www.onsemi.com
16
STARTING FLOW
Figure 20. Starting Flow at Thermistor Mode
Power On
Wake Up from
Sleep Mode
Set Operational
Mode
Set APA
Set Battery Profile
Initial RSOC
Set Thermistor
Mode
Set B-constant
of Thermistor
Initialization End
Input SDA Pulse
(Note 7)
Set 0x0001
to Register 0x15
(Note 7)
Set 0xZZZZ
to Register 0x0B
Set 0x000Z
to Register 0x12
Set 0xAA55
to Register 0x04 or 0x07
(Note 8)
Set 0x0001
to Register 0x16
Set 0xZZZZ
to Register 0x06
7. It’s unnecessary if initial power mode is
Operational mode.
SDA pulse can be substituted in some kind of
commands.
Ex: Input “Set Operational mode” twice.
8. It’s unnecessary if OCV can be get at automatic
initialization.
Figure 21. Starting Flow at I2C Mode
Power On
Wake Up from
Sleep Mode
Set Operational
Mode
Set APA
Set Battery Profile
Initial RSOC
Set via I2C
Mode
Set Temperature
Initialization End
Input SDA Pulse
(Note 9)
Set 0x0001
to Register 0x15
(Note 9)
Set 0xZZZZ
to Register 0x0B
Set 0x000Z
to Register 0x12
Set 0xAA55
to Register 0x04 or 0x07
(Note 10)
Set 0x0000
to Register 0x16
Set 0xZZZZ
to Register 0x08
9. It’s unnecessary if initial power mode is
Operational mode.
SDA pulse can be substituted in some kind of
commands.
Ex: Input “Set Operational mode” twice.
10.It’s unnecessary if OCV can be get at automatic
initialization.
LC709203F
www.onsemi.com
19
TYPICAL CHARACTERISTICS
Figure 27. Convergent Characteristic from the Initialize Error
This Graph is the Example for Starting Point 48% (Includes 52% Error Case) Instead of 100% (No Error)
Table 9. ORDERING INFORMATION
Device Package Shipping†
LC709203FQH−01TWG WDFN8 3x4, 0.65P
(Pb-Free / Halogen Free)
2,000 / Tape & Reel
LC709203FQH−02TWG WDFN8 3x4, 0.65P
(Pb-Free / Halogen Free)
2,000 / Tape & Reel
LC709203FQH−03TWG WDFN8 3x4, 0.65P
(Pb-Free / Halogen Free)
2,000 / Tape & Reel
LC709203FQH−04TWG WDFN8 3x4, 0.65P
(Pb-Free / Halogen Free)
2,000 / Tape & Reel
LC709203FXE−01MH WLCSP9, 1.60x1.76
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
LC709203FXE−02MH WLCSP9, 1.60x1.76
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
LC709203FXE−03MH WLCSP9, 1.60x1.76
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
LC709203FXE−04MH WLCSP9, 1.60x1.76
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
LC709203FXE−05MH WLCSP9, 1.60x1.76
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: IC performance may vary depend on the types of battery to be in use. Contact your local sales office for
assistance in choosing the correct model.
ON Semiconductor is licensed by the Philips Corporation to carry the I2C bus protocol. All other brand names and product names
appearing in this document are registered trademarks or trademarks of their respective holders.
WDFN8 3x4, 0.65P
CASE 509AF
ISSUE C DATE 06 MAY 201
4
A = Assembly Location
Y = Year
WW = Work Week
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
AYWWG
G
(Note: Microdot may be in either location)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE
EXPOSED PAD AS WELL AS THE LEADS.
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
A
B
E
D
D2
E2
BOTTOM VIEW
b
e
8X
0.10 B
0.05
AC
CNOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.10 C
A
A1
(A3)
0.08 C
0.10 C
CSEATING
PLANE
SIDE VIEW
L
8X
14
58
DIM MIN MAX
MILLIMETERS
A−−− 0.80
A1 0.00 0.05
b0.20 0.30
D3.00 BSC
D2 1.70 1.90
E4.00 BSC
E2 2.30 2.50
e0.65 BSC
L0.45 0.55
Ç
Ç
Ç
Ç
ÇÇ
ÇÇ
ÇÇ
ÇÇ
Ç
Ç
Ç
Ç
ÇÇ
ÇÇ
ÇÇ
ÇÇ
8X
0.70
1.96
0.35
1
0.65
PITCH
2.56
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
8X
DIMENSIONS: MILLIMETERS
L1
DETAIL A
L
ALTERNATE
CONSTRUCTIONS
L
DETAIL B
DET AIL A
L1 −−− 0.10
NOTE 4
e/2
SOLDERING FOOTPRINT*
ÉÉ
ÉÉ
ÇÇ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
SCALE 2:1
1
A3 0.20 REF
0.10 BAC
0.10 BAC
4.30
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
http://onsemi.com
1
© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0 Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98AON80983E
ON SEMICONDUCTOR STANDARD
WDFN8 3X4, 0.65P
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
PAGE 1 OF 2
DOCUMENT NUMBER:
98AON80983E
PAGE 2 OF 2
ISSUE REVISION DATE
ORELEASED FOR PRODUCTION FROM SANYO ENACT# S−569 TO ON
SEMICONDUCTOR. REQ. BY D. TRUHITTE. 31 MAY 2012
AREDREW TO ON/JEDEC STANDARDS. ADDED GENERIC MARKING DIAGRAM.
REQ. BY I. CAMBALIZA. 23 JUL 2013
BCORRECTED DIMENSION E FROM 3 TO 4MM. CHANGED DIMENSION L TO 0.45
− 0.55MM. REQ. BY I. CAMBALIZA. 23 OCT 2013
CCORRECTED SOLDER FOOTPRINT TO ADD LENGTH DIMENSION. CHANGED
DESCRIPTION TO WDFN8. REQ. BY I CAMBALIZA. 06 MAY 2014
© Semiconductor Components Industries, LLC, 2014
May, 2014 − Rev. C Case Outline Number
:
509AF
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, af filiates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
WLCSP9, 1.60x1.76
CASE 567JH
ISSUE B
DATE 23 JAN 2014
SEATING
PLANE
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE SPHERICAL
CROWNS OF THE SOLDER BALLS.
2X
DIM
A
MIN MAX
−−−
MILLIMETERS
A1
D1.60 BSC
E
b0.20 0.30
e0.50 BSC
0.51
ÈÈ
ÈÈ
E
D
AB
PIN A1
REFERENCE
A0.05 BC
0.03 C
0.08 C
9X b
123
C
B
A
0.10 C A
A1
C
0.09 0.19
1.76 BSC
SCALE 4:1
0.50
0.25
9X
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.05 C
2X TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 3
e
RECOMMENDED
A1
PACKAGE
OUTLINE
e
PITCH
0.50
PITCH
BACKCOAT
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
http://onsemi.com
1
© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0
Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98AON79525F
ON SEMICONDUCTOR STANDARD
WLCSP9, 1.60X1.76
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
PAGE 1 OF 2
DOCUMENT NUMBER:
98AON79525F
PAGE 2 OF 2
ISSUE REVISION DATE
ORELEASED FOR PRODUCTION. REQ. BY I. CAMBALIZA. 28 OCT 2013
AADDED BACKSIDE COATING OPTION. REQ. BY E. KUROSE. 19 DEC 2013
BUPDATED DIMENSIONS A AND A1. REQ. BY E. KUROSE. 23 JAN 2014
© Semiconductor Components Industries, LLC, 2014
January, 2014 − Rev. B
Case Outline Number:
567JH
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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