©2018 Advanced Linear Devices, Inc., Vers. 2.1 www.aldinc.com 1 of 9
QUAD RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
ALD4704A/ALD4704B
ALD4704
ADVANCED
LINEAR
DEVICES, INC.
Operating Temperature Range
0°C to +70°C0°C to +70°C -55°C to 125°C
14-Pin 14-Pin 14-Pin
Small Outline Plastic Dip CERDIP
Package (SOIC) Package Package
ALD4704ASBL ALD4704APBL ALD4704ADB
ALD4704BSBL ALD4704BPBL ALD4704BDB
ALD4704SBL ALD4704PBL ALD4704DB
* Contact factory for leaded (non-RoHS) or high temperature versions.
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
GENERAL DESCRIPTION
The ALD4704A/ALD4704B/ALD4704 is a dual monolithic operational
amplifier with MOSFET input that has rail-to-rail input and output voltage
ranges. The input voltage range and output voltage range are very close
to the positive and negative power supply voltages. Typically the input
voltage can be beyond positive power supply voltage V+ or the negative
power supply voltage V- by up to 300mV. The output voltage swings to
within 60mV of either positive or negative power supply voltages at rated
load.
With high impedance load, the output voltage of the ALD4704A/
ALD4704B/ALD4704 approaches within 1mV of the power supply rails.
This device is designed as an alternative to the popular J-FET input
operational amplifier in applications where lower operating voltages,
such as 9V battery or ±3.25V to ±5V power supplies are being used. The
ALD4704A/ALD4704B/ALD4704 offers high slew rate of 5V/µs. It is
designed and manufactured with Advanced Linear Devices' standard
enhanced ACMOS silicon gate CMOS process, and it offers low unit
cost and exceptional reliability.
The rail-to-rail input and output feature of the ALD4704A/ALD4704B/
ALD4704 expands signal voltage range for a given operating supply
voltage and allows numerous analog serial stages to be implemented
without losing operating voltage margin. The output stage is designed
to drive up to 10mA into 400pF capacitive and 1.5KΩ resistive loads at
unity gain and up to 4000pF at a gain of 5. Short circuit protection to either
ground or the power supply rails is at approximately 15mA clamp
current. Due to complementary output stage design, the output can
source and sink 10mA into a load with symmetrical drive and is ideally
suited for applications where push-pull voltage drive is desired.
For each of the operational amplifier, the offset voltage is trimmed on-
chip to eliminate the need for external nulling in many applications. For
precision applications, the output is designed to settle to 0.1% in 2µs. In
large signal buffer applications, the operational amplifier can function as
an ultrahigh input impedance voltage follower /buffer that allows input
and output voltage swings from positive to negative supply voltages.
This feature is intended to greatly simplify systems design and eliminate
higher voltage power supplies in many applications. Additionally, robust
design and rigorous screening make this device especially suitable for
operation in temperature-extreme environments and rugged conditions.
APPLICATIONS
• Voltage amplifier
• Voltage follower/buffer
• Charge integrator
• Photodiode amplifier
• Data acquisition systems
• High performance portable
instruments
• Signal conditioning circuits
• Low leakage amplifiers
• Active filters
• Sample/Hold amplifier
• Picoammeter
• Current to voltage converter
• Coaxial cable driver
• Capacitive sensor amplifier
• Piezoelectric transducer amplifier
FEATURES
• Rail-to-rail input and output voltage ranges
• 5.0V/µs slew rate
• Symmetrical push-pull output drive
• Inputs can extend beyond supply rails by 300mV
• Outputs settle to 2mV of supply rails
• High capacitive load capability -- up to 4000pF
• No frequency compensation required -- unity
gain stable
• Extremely low input bias currents -- 1.0pA
typical (20pA max.)
• Ideal for high source impedance applications
• High voltage gain -- 100V/mV typical
• Output short circuit protected
• Unity gain bandwidth of 2.1MHz
• Suitable for rugged, temperature-extreme
environments
PIN CONFIGURATION
TOP VIEW
SBL, PBL, DB PACKAGES
OUT D
-IN D
+IN D
V-
+IN C
-IN C
OUT C
OUT A
-IN A
+IN A
V+
+IN B
-IN B
OUT B
1
2
3
4
5
6
78
9
10
11
12
13
14
ALD4704A/ALD4704B Advanced Linear Devices 2 of 9
ALD4704
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+ referenced to V- -0.3V to V++10.6V
Supply voltage, VS referenced to V-±5.3V
Differential input voltage range -0.3V to V+ +0.3V
Power dissipation 600 mW
Operating tempurature range SBL, PBL packages 0°C to +70°C
DB package -55°C to +125°C
Storage tempurature range -65°C to +150°C
Lead tempurature, 10 seconds +260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
Supply VS±3.25 ±5.0 ±3.25 ±5.0 ±3.25 ±5.0 V Dual Supply
Voltage V+6.5 10.0 6.5 10.0 6.5 10.0 V Single Supply
Input Offset VOS 2.0 5.0 10.0 mV RS ≤ 100KΩ
Voltage 2.8 5.8 11.0 mV 0°C ≤ TA ≤ +70°C
Input Offset IOS 1.0 15 1.0 15 1.0 15 pA TA = 25°C
Current 240 240 240 pA 0°C ≤ TA ≤ +70°C
Input Bias IB1.0 20 1.0 20 1.0 20 pA TA = 25°C
Current 300 300 300 pA 0°C ≤ TA ≤ +70°C
Input Voltage VIR -5.3 5.3 -5.3 5.3 -5.3 5.3 V
Range
Input RIN 1012 1012 1012 Ω
Resistance
Input Offset TCVOS 555µV/°CR
S ≤ 100KΩ
Voltage Drift
Power Supply PSRR 65 80 65 80 60 80 dB RS ≤ 100KΩ
Rejection Ratio 0°C ≤ TA ≤ +70°C
Common Mode CMRR 65 83 65 83 60 83 dB RS ≤ 100KΩ
Rejection Ratio 0°C ≤ TA ≤ +70°C
Large Signal AV15 28 15 28 10 28 V/mV RL = 100KΩ
Voltage Gain 100 100 100 V/mV RL ≥ 1MΩ
V/mV RL = 10KΩ
Output VO low -4.96 -4.90 -4.96 -4.90 -4.96 -4.90 V RL = 10KΩ
Voltage VO high 4.90 4.95 4.90 4.95 4.90 4.95 V 0°C ≤ TA ≤ +70°C
Range VO low -4.998 -4.99 -4.998 -4.99 -4.998 -4.99 V RL ≥ 1MΩ
VO high 4.99 4.998 4.99 4.998 4.99 4.998 V 0°C ≤ TA ≤ +70°C
Output Short ISC 15 15 15 mA
Circuit Current
Supply IS10 13 10 13 10 13 mA VIN = -5.0V
Current No Load
Power PD130 130 130 mW All amplifiers, No Load
Dissipation VS = ±5.0V
Input CIN 111pF
Capacitance
Bandwidth BW2.1 2.1 2.1 MHz
Slew Rate SR5.0 5.0 5.0 V/µsA
V = +1 RL = 2.0KΩ
Rise time tr0.1 0.1 0.1 µsR
L = 10KΩ
Overshoot 15 15 15 % RL = 10KΩ
Factor CL = 100pF
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25°C VS = ±5.0V unless otherwise specified
4704A 4704B 4704
Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions
ALD4704A/ALD4704B Advanced Linear Devices 3 of 9
ALD4704
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
Input Offset VOS 3.0 6.0 10.0 mV RS ≤ 100KΩ
Voltage
Input Offset IOS 8.0 8.0 8.0 nA
Current
Input Bias IB10.0 10.0 10.0 nA
Current
Power Supply PSRR 60 75 60 75 60 75 dB RS ≤ 100KΩ
Rejection Ratio
Common Mode CMRR 60 83 60 83 60 83 dB RS ≤ 100KΩ
Rejection Ratio
Large Signal AV10 25 10 25 10 25 V/mV RL =10KΩ
Voltage Gain
Output Voltage VO low -4.9 -4.8 -4.9 -4.8 -4.9 -4.8 V RL =10KΩ
Range VO high 4.8 4.9 4.8 4.9 4.8 4.9 V RL =10KΩ
VS = ±5.0V -55°C ≤ TA ≤ +125°C unless otherwise specified
4704ADB 4704BDB 4704DB
Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions
Maximum Load CL400 400 400 pF Gain = 1
Capacitance 4000 4000 4000 pF Gain = 5
Input Noise
Voltage en26 26 26 nV/√Hz f =1KHz
Input Current
Noise in0.6 0.6 0.6 fA/√Hz f =10Hz
Settling ts5.0 5.0 5.0 µs 0.01%
Time 2.0 2.0 2.0 µs 0.1% AV = -1
RL = 5KΩ CL= 50pF
TA = 25°C VS = ±5.0V unless otherwise specified
4704A 4704B 4704
Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit Test Conditions
ALD4704A/ALD4704B Advanced Linear Devices 4 of 9
ALD4704
E
INPUT
G
E (V)
±7
±6
±5
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (°C)
1000
100
10
0.1
1.0
INPUT BIAS CURRENT (pA)
100-25 0 75 1255025-50
V
S
= ±5.0V
10000
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
COMMON MODE INPUT
VOLTAGE RANGE (V)
±7
±6
±5
±4
±3
±2
±2 ±3 ±4 ±5 ±6 ±7
TA = 25°C
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
SUPPLY VOLTAGE (V)
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
0 ±2 ±4 ±6
RL= 10KΩ
RL= 5KΩ
} -55°C
} +25°C
} +125°C
±8
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE
(
V
)
0
SUPPLY CURRENT (mA)
0±1±2±3±4±5±6
INPUTS GROUNDED
OUTPUT UNLOADED
+80°C
+25°C
T
A
= -55°C
-25°C
±7
1
2
3
4
5
6
7
8
+125°C
Design & Operating Notes:
1. The ALD4704A/ALD4704B/ALD4704 CMOS operational amplifier
uses a 3 gain stage architecture and an improved frequency compen-
sation scheme to achieve large voltage gain, high output driving
capability, and better frequency stability. The ALD4704A/ALD4704B/
ALD4704 is internally compensated for unity gain stability using a
novel scheme. This design produces a clean single pole roll off in the
gain characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency. A unity gain buffer using the
ALD4704A/ALD4704B/ALD4704 will typically drive 400pF of external
load capacitance without stability problems. In the inverting unity gain
configuration, it can drive up to 800pF of load capacitance. Compared
to other CMOS operational amplifiers, the ALD4704A/ALD4704B/
ALD4704 is much more resistant to parasitic oscillations.
2. The ALD4704A/ALD4704B/ALD4704 has complementary p-channel
and n-channel input differential stages connected in parallel to accom-
plish rail to rail input common mode voltage range. With the common
mode input voltage close to the power supplies, one of the two
differential stages is switched off internally. To maintain compatibility
with other operational amplifiers, this switching point has been se-
lected to be about 1.5V above the negative supply voltage. As offset
voltage trimming on the ALD4704A/ALD4704B/ALD4704 is made
when the input voltage is symmetrical to the supply voltages, this
internal switching does not affect a large variety of applications such
as an inverting amplifier or non-inverting amplifier with a gain greater
than 2.5 (5V operation), where the common mode voltage does not
make excursions below this switching point.
3. The input bias and offset currents are essentially input protection diode
reverse bias leakage currents, and are typically less than 1pA at room
Temperature. This low input bias current assures that the analog
signal from the source will not be distorted by input bias currents. For
applications where source impedance is very high, it may be neces-
sary to limit noise and hum pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor
when connected. In the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes the ALD4704A/ALD4704B/ALD4704 an effective analog sig-
nal buffer for medium to high source impedance sensors, transducers,
and other circuit networks.
5. The ALD4704A/ALD4704B/ALD4704 operational amplifier has been
designed with static discharge protection and to minimize latch up.
However, care must be exercised when handling the device to avoid
strong static fields. In using the operational amplifier, the user is
advised to power up the circuit before, or simultaneously with, any
input voltages applied and to limit input voltages to not exceed 0.3V
of the power supply voltage levels. Alternatively, a 100KΩ or higher
value resistor at the input terminals will limit input currents to accept-
able levels while causing very small or negligible accuracy effects.
ALD4704A/ALD4704B Advanced Linear Devices 5 of 9
ALD4704
TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)
OPEN LOOP VOLTAGE AS A FUNCTION
OF FREQUENCY
FREQUENCY (Hz)
1 10 100 1K 10K 1M 10M100K
120
100
80
60
40
20
0
-20
OPEN LOOP VOLTAGE
GAIN (dB)
90
0
45
180
135
PHASE SHIFT IN DEGREES
VS = ±5.0V
TA = 25°C
LARGE - SIGNAL TRANSIENT
RESPONSE
V
S
= ±5.0V
T
A
= 25°C
R
L
= 1KΩ
C
L
= 50pF
5V/div
5V/div 2µs/div
SMALL - SIGNAL TRANSIENT
RESPONSE
V
S
= ± 5.0V
T
A
= 25°C
R
L
= 1.0KΩ
C
L
= 50pF
100mV/div
50mV/div 1µs/div
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
LOAD RESISTANCE (Ω)
1K 10K 1000K100K
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
V
S
= ±5.0V
T
A
= 25°C
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
COMMON MODE INPUT VOLTAGE (V)
-4 -2 0 +2 +4 +6
15
10
5
0
-5
-10
-15
INPUT OFFSET VOLTAGE (mV)
V
S
= ±5.0V
T
A
= 25ºC
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
AMBIENT TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
-50 -25 0 +25 +50 +75 +100 +125
+4
+5
+3
+1
+2
0
-2
-1
-4
-3
-5
VS = ±5.0V
VOLTAGE NOISE DENSITY AS A
FUNCTION OF FREQUENCY
FREQUENCY (Hz)
10 100 1K 10K 100K
150
125
100
75
50
25
0
1000K
VOLTAGE NOISE DENSITY
(nV/ √ Hz)
V
S
= ±5.0V
T
A
= 25°C
RL = 10KΩ
OUTPUT VOLTAGE SWING AS A
FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE SWING (V)
±3
0±1±2±3±4±5±6±7
RL = 2KΩ
±6
±5
±4
±2
±7
-55°C ≤ TA ≤ 125°C
RL = 10KΩ
ALD4704A/ALD4704B Advanced Linear Devices 6 of 9
ALD4704
TYPICAL APPLICATIONS
RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER RAIL-TO-RAIL VOLTAGE COMPARATOR
-
+
VIN
+10V
CLRL
0.1µF
ZIN = 1012Ω
~
400pF ≥ 1.5KΩ
VOUT
0 ≤ VIN ≤ 10V
-
+
50K
0.1µF
10M
V
IN
+12V
+12V
V
OUT
PHOTO DETECTOR CURRENT
TO VOLTAGE CONVERTER
LOW OFFSET SUMMING AMPLIFIER
INPUT 1
INPUT 2
-
+
+5V 0.1µF
0.1µF
-5V
GAIN = 5 C
L
= 4000pF
* Circuit Drives Large Load
Capacitance ≤ 4000pF
10K
10K
50K
V
OUT
+
-
+5V
-5V
R
F
= 5M
I
PHOTODIODE
V
OUT
= 1 X R
F
R
L
≥ 1.5K
PRECISION CHARGE INTEGRATOR
WIEN BRIDGE OSCILLATOR (RAIL-TO -RAIL)
SINE WAVE GENERATOR
+
1000 pF
1 MΩ+5V
-5V
V
IN
OUT
V
10K
-
+
10K
10K
+5V
-5V
.01µF
1
2πRC
f = 1.6K Hz
C = .01µFR = 10K
~=
V
OUT
~
BANDPASS NETWORK
LOW PASS FILTER (RFI FILTER)
Cutoff frequency = π R1C1 = 3.2kHz
Gain = 10 Frequency roll-off 20dB/decade
1
+
R
F
100K
5K5K
0.02µF
R
1
R
1
C
1
+9V
V
IN
V
OUT
-
R1 = 10K
C1 = 100nF
R2 = 10K
C2 = 500pF
Low Frequency
Breakpoint ƒL = 2π R1C1 = 160Hz
High Frequency
Cutoff ƒH = 2π R2C2 = 32KHz
1
1
+
+5V
-5V
C1R1
C2
R2
VIN VOUT
-
ALD4704A/ALD4704B Advanced Linear Devices 7 of 9
ALD4704
Millimeters Inches
Min Max Min MaxDim
A
A
1
b
C
D-14
E
e
H
L
S
1.75
0.25
0.45
0.25
8.75
4.05
6.30
0.937
8°
0.50
0.053
0.004
0.014
0.007
0.336
0.140
0.224
0.024
0°
0.010
0.069
0.010
0.018
0.010
0.345
0.160
0.248
0.037
8°
0.020
1.27 BSC 0.050 BSC
1.35
0.10
0.35
0.18
8.55
3.50
5.70
0.60
0°
0.25
ø
14 Pin Plastic SOIC Package
SOIC-14 PACKAGE DRAWING
E
D
e
A
A1
b
S (45°)
L
C
H
S (45°)
ø
ALD4704A/ALD4704B Advanced Linear Devices 8 of 9
ALD4704
14 Pin Plastic DIP Package
PDIP-14 PACKAGE DRAWING
b
1
D
S
be
A
2
A
1
A
L
EE1
ce
1
ø
Millimeters Inches
Min Max Min MaxDim
A
A
1
A
2
b
b
1
c
D-14
E
E
1
e
e
1
L
S-14
ø
3.81
0.38
1.27
0.89
0.38
0.20
17.27
5.59
7.62
2.29
7.37
2.79
1.02
0°
5.08
1.27
2.03
1.65
0.51
0.30
19.30
7.11
8.26
2.79
7.87
3.81
2.03
15°
0.105
0.015
0.050
0.035
0.015
0.008
0.680
0.220
0.300
0.090
0.290
0.110
0.040
0°
0.200
0.050
0.080
0.065
0.020
0.012
0.760
0.280
0.325
0.110
0.310
0.150
0.080
15°
ALD4704A/ALD4704B Advanced Linear Devices 9 of 9
ALD4704
EE
1
C
e
1
ø
D
s
b
1
e
b
L
A
L
2
A
1
L
1
A
A1
b
b1
C
D-14
E
E1
e
e1
L
L1
L2
S
Ø
3.55
1.27
0.97
0.36
0.20
--
5.59
7.73
3.81
3.18
0.38
--
0°
5.08
2.16
1.65
0.58
0.38
19.94
7.87
8.26
5.08
--
1.78
2.49
15°
Millimeters Inches
Min Max Min MaxDim 0.140
0.050
0.038
0.014
0.008
--
0.220
0.290
0.150
0.125
0.015
--
0°
0.200
0.085
0.065
0.023
0.015
0.785
0.310
0.325
0.200
--
0.070
0.098
15°
2.54 BSC
7.62 BSC
0.100 BSC
0.300 BSC
14 Pin CERDIP Package
CERDIP-14 PACKAGE DRAWING