AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
8
18
1
8
1
FEATURES
• AC or DC input
• Programmable sense voltage
• Logic level compatibility
• Threshold guaranteed over temperature
(0°C to 70°C)
• Optoplanar™ construction for high common
mode immunity
• UL recognized (file # E90700)
DESCRIPTION
The HCPL-3700 voltage/current threshold detection optocoupler consists of
an AlGaAs LED connected to a threshold sensing input buffer IC which are
optically coupled to a high gain darlington output. The input buffer chip is
capable of controlling threshold levels over a wide range of input voltages
with a single resistor. The output is TTL and CMOS compatible.
APPLICATIONS
• Low voltage detection
• 5 V to 240 V AC/DC voltage sensing
• Relay contact monitor
• Current sensing
• Microprocessor Interface
• Industrial controls
A 0.1 µF bypass capacitor
must be connected between
pins 8 and 5.
AC/DC
POWER LOGIC
R
X
HCPL-3700
GND 1 GND 2
Parameter Symbol Value Units
Storage Temperature TSTG -55 to +125 °C
Operating Temperature TOPR -40 to +85 °C
Lead Solder Temperature TSOL 260 for 10 sec °C
EMITTER Average 50 (MAX)
Input Current Surge 3 ms, 120 Hz Pulse Rate IIN 140 (MAX) mA
Transient 10 µs, 120 Hz Pulse Rate 500 (MAX)
Input Voltage (Pins 2-3) VIN -0.5 (MIN) V
Input Power Dissipation (Note 1) PIN 230 (MAX) mW
Total Package Power Dissipation (Note 2) PT305 (MAX) mW
DETECTOR
Output Current (Average) (Note 3) IO30 (MAX) mA
Supply Voltage (Pins 8-5) VCC -0.5 to 20 V
Output Voltage (Pins 6-5) VO-0.5 to 20 V
Output Power Dissipation (Note 4) PO210 (MAX) mW
ABSOLUTE MAXIMUM RATINGS (No derating required up to 70°C)
Input Output
HL
LH
TRUTH TABLE
(Positive Logic)
1
2
3
4 5
8
6
7
AC
DC+
DC-
AC GND
V
NC
V
O
CC
HCPL-3700
Parameter Test Conditions Symbol Min Typ Max Unit
Input Threshold Current (VIN = VTH+, VCC = 4.5 V) ITH+ 1.96 2.4 3.11 mA
(VO= 0.4 V, IO!4.2 mA) (Note 5) ITH- 1.00 1.2 1.62 mA
(VIN = V2 - V3, Pins 1 & 4 Open)
(VCC = 4.5 V, VO= 0.4 V) VTH+ 3.35 3.8 4.05 V
DC (Note 5) (IO!4.2 mA)
(Pins 2,3) (VIN = V2 - V3, Pins 1 & 4 Open)
(VCC = 4.5 V, VO= 2.4 V) VTH- 2.01 2.5 2.86 V
Input (Note 5) (IO"100 µA)
Threshold (VIN = #V1 - V4#)
Voltage (Pins 2 & 3 Open) VTH+ 4.23 5.0 5.50 V
(VCC = 4.5 V, VO= 0.4 V)
AC (Note 5) (IO!4.2 mA)
(Pins 1,4) (VIN = #V1 - V4#)
(Pins 2 & 3 Open) VTH- 2.87 3.7 4.20 V
(VCC = 4.5 V, VO= 2.4 V)
(Note 5) (IO"100 µA)
Hysteresis (IHYS = ITH+ - ITH-) IHYS 1.2 mA
(VHYS = VTH+ - VTH-) VHYS 1.3 V
(VIHC1 = V2 - V3, V3= GND)
(IIN = 10 mA, Pins 1 & 4 VIHC1 5.4 6.3 6.6 V
Connected to Pin 3)
(VIHC2 = #V1 - V4#)
(#IIN#= 10 mA) VIHC2 6.1 7.0 7.3 V
Input Clamp Voltage (Pins 2 & 3 Open)
(VIHC3 = V2 - V3, V3= GND) VIHC3 12.5 13.4 V
(IIN = 15 mA; Pins 1 & 4 Open)
(VILC = V2 - V3, V3= GND) VILC -0.75 V
(IIN = -10 mA)
Input Current (VIN = V2 - V3 = 5.0 V) IIN 3.0 3.7 4.4 mA
(Pins 1 & 4 Open)
Bridge Diode (IIN = 3 mA) VD1,2 0.65 V
Forward Voltage (IIN = 3 mA) VD3,4 0.65 V
Logic Low Output Voltage (VCC = 4.5 V; IOL = 4.2 mA) VOL 0.04 0.4 V
(Note 5)
Logic High Output Current (Note 5) (VOH = VCC = 18 V) IOH 100 µA
Logic Low Supply Current (V2 - V3= 5.0 V; VO= Open) ICCL 1.0 4 mA
(VCC = 5 V)
Logic High Supply Current (VCC = 18 V; VO= Open) ICCH 0.01 4 µA
Input Capacitance (f = 1 MHz; VIN = 0V) CIN 50 pF
(Pins 2 & 3, Pins 1 & 4 Open)
ELECTRICAL CHARACTERISTICS (TA= 0°C to 70°C Unless otherwise specified)
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Units
Supply Voltage VCC 218 V
Operating Temperature TA070 °C
Operating Frequency f 0 4 kHz
AC Characteristics Test Conditions Symbol Min Typ Max Unit
Propagation Delay Time (RL= 4.7 k$, CL = 30 pF) TPHL 6.0 15 µs
(to Output Low Level) (Note 6)
Propagation Delay Time (RL= 4.7 k$, CL = 30 pF) TPLH 25.0 40 µs
(to Output High Level) (Note 6)
Output Rise Time (10-90%) (RL= 4.7 k$, CL = 30 pF) tr45 µs
Output Fall Time (90-10%) (RL= 4.7 k$, CL = 30 pF) tf0.5 µs
Common Mode Transient Immunity (IIN = 0 mA,RL= 4.7 k$)
(at Output High Level) (VO min = 2.0 V, VCM = 1400 V) #CMH#4000 V/µs
(Notes 7,8)
Common Mode Transient Immunity (IN= 3.11 mA,RL= 4.7 k$)
(at Output Low Level) (VO max = 0.8 V, VCM = 140 V) #CML#600 V/µs
(Notes 7,8)
SWITCHING CHARACTERISTICS (TA= 25°C, VCC = 5 V Unless otherwise specified)
Characteristics Test Conditions Symbol Min Typ Max Unit
(Relative humidity < 50%)
Withstand Insulation Voltage (TA = 25°C, t = 1 min) VISO 2500 VRMS
(Notes 9,10)
Resistance (input to output) (Note 9) (VIO = 500 Vdc) RI-O 1012 $
Capacitance (input to output) (f = 1 MHz, VIO = 0 Vdc) CI-O 0.6 pF
PACKAGE CHARACTERISTICS (TA= 0°C to 70°C Unless otherwise specified)
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
1. Derate linearly above 70°C free-air temperature at a rate of 1.8 mW/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 2.5 mW/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.6 mA/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 1.9 mW/°C.
5. Logic low output level at pin 6 occurs when VIN!VTH+ and when VIN%VTH- once VIN exceeds VTH+. Logic high output level at pin 6
occurs when VIN"VTH- and when VIN&VTH+ once VIN decreases below VTH-.
6. TPHL propagation delay is measured from the 2.5 V level of the leading edge of a 5.0 V input pulse (1 µs rise time) to the 1.5 V level
on the leading edge of the output pulse. TPLH propagation delay is measured on the trailing edges of the input and output pulse.
(Refer to Fig. 9)
7. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO%2.0 V). Common mode transient
immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM,
to assure that the output will remain in a logic low state (i.e., VO&0.8 V). (Refer to Fig.10)
8. In applications where dVcm/dt may exceed 50,000 V/µs (Such as static discharge), a series resistor, RCC, should be included to
protect the detector chip from destructive surge currents. The recommended value for RCC is 240 $per volt of allowable drop in
VCC (between pin 8 and VCC) with a minimum value of 240 $.
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
10. The 2500 VRMS/1 min. capability is validated by a 3.0 kVRMS/1 sec. dielectric voltage withstand test.
11. AC voltage is instantaneous voltage.
12. All typicals at TA= 25°C, VCC = 5 V unless otherwise specified.
NOTES
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
Fig. 1 Logic Low Supply Current vs. Operating Supply Voltage
VCC - OPERATING SUPPLY VOLTAGE (V)
4 6 8 10 12 14 16 18 20
I
CCL
- LOGIC LOW SUPPLY CURRENT (mA)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Fig. 2 Input Current vs. Input Voltage
VIN - INPUT VOLTAGE (V)
02468101214
I
IN
- INPUT CURRENT (mA)
-10
-5
0
5
10
15
20
25
30
35
40
45
50
DC (Pins 1,2 shorted together
pins 3,4 shorted together)
DC (Pins 1 & 4 Open)
AC (pins 2 & 3 Open)
Fig. 3 Input Current/Low Level Output Voltage
vs. Temperature
TA - TEMPERATURE (˚C)
-40 -20 0 25 45 65 85
Input Current, I
IN
(mA)
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
4.2
V
OL
(mV)
0
10
20
30
40
50
60
70
80
90
100
110
120
Fig. 4 Current Threshold/Voltage Threshold
vs. Temperature
TA - TEMPERATURE (˚C)
-40 -20 0 25 45 65 85
I
TH
(DC) - CURRENT THRESHOLD (mA)
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
V
TH
(DC) - V OLT A GE THRESHOLD (V)
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
4.2
VTH+
ITH+
VTH-
ITH-
IIN
VIN = 5.0 V
(PINS 2 and 3)
VCC = 5.0 V
VOL
V = 5.0 V
IOL = 4.2 mA
CC
Fig. 5 Propagation Delay vs. Temperature
TA - TEMPERATURE (˚C)
-60 -40 -20 0 20 40 60 80 100
T
P
- PROPAGATION DELAY (µs)
0
10
20
30
40
50
60
70
TPLH
TPHL
Fig. 6 Rise and Fall Time vs. Temperature
TA - TEMPERATURE (˚C)
-40 -20 0 25 45 65 85
Tr - RISE TIME (µs)
Tf - FALL TIME (µs)
0
10
20
30
40
50
60
70
80
90
100
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Tf
Tr
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
Fig. 8 External Threshold Characteristics V+/V- vs. Rx
RX - EXTERNAL SERIES RESISTOR (K$)
0 40 80 120 160 200 240
V+/V- -EXTERNAL THRESHOLD VOLTAGE (V)
0
50
100
150
200
250
300
Fig. 7 Logic High Supply Current
vs. Temperature
TA - TEMPERATURE (˚C)
-60 -40 -20 0 20 40 60 80 100
I
CCH
- LOGIC HIGH SUPPLY CURRENT (nA)
1
10
100
1000
V+ (AC) V- (AC)
V- (DC)
V+ (DC)
VO = OPEN
V
IIN
CC
= 0 mA
= 18 V
HCPL-3700
5
6
7
8
3
4
2
1
Z = 50
tr = 5ns
Generator
Pulse
O
$
.1uf
bypass
O
(V )
+5V
R
L
Output
PHL
t
PLH
t
5V
2.5V
IN
(V )
Input
(V )
Output
O
1.5 V
90%
AC
DC+
DC-
AC GND
V
V
O
CC
AC
DC-
DC+
AC
4
3
2
1
Output
O
GND
V
5
6(V )
R
bypass
.1uf
CC
V
7
8
L
O
V
FF
I
IN
A
B
+5V
C **
L
* SEE NOTE 8
R *
CC
-+
Pulse Gen
CM
V
** C IS 30 pF, WHICH INCLUDES PROBE
AND STRAY WIRING CAPACITANCE
L
90%
10% 10%
r
t t
f
0V
V
O
OL
V
Switching Pos. (A)
I = 0 mA
V
O
V
CM
Swit c hing Pos. ( B )
I = 3.11 mA
V (Max)
V (Min)
O
O
IN
IN
CM
L
H
O
V V
OL
CM
V
V
CM
L
H
CM
5V
5V
V
Pulse Amplitude = 5 V
Pulse Width = 1 ms
f = 100 Hz
T = T = 1.0 µs (10 - 90%)
IN
rf
Fig. 9. Switching Test Circuit
Fig. 10. Test Circuit for Common Mode Transient Immunity and Typical Waveforms
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
NOTE
All dimensions are in inches (millimeters)
Package Dimensions (Surface Mount)
Lead Coplanarity : 0.004 (0.10) MAX
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.070 (1.78)
0.045 (1.14) 0.300 (7.62)
TYP
0.405 (10.30)
MIN
0.315 (8.00)
MIN
0.045 [1.14]
3214
5678
PIN 1
ID.
0.016 (0.41)
0.008 (0.20)
Package Dimensions (T hrough Hole)
0.200 (5.08)
0.115 (2.92)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.020 (0.51) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
PIN 1
ID.
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.300 (7.62)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
15° MAX
SEATING PLANE
Package Dimensions (0.4”Lead Spacing)
0.200 (5.08)
0.115 (2.92)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.004 (0.10) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.400 (10.16)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
0° to15°
PIN 1
ID.
SEATING PLANE
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
HCPL-3700
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
HCPL-3700
10/22/99 200003A
Corporate Headquarters North American Sales European Sales
QT Optoelectronics QT Optoelectronics Quality Technologies Deutschland GmbH
610 Nor th Mar y Avenue 16775 Addison Rd.,Suite 200 Max-Huber-Strasse 8
Sunnyvale, CA 94086 Addison, TX 75001 D-85737 Ismaning, Germany
(408) 720-1440 Phone (972) 447-1300 Phone 49 [0] 89/96.30.51 Phone
(408) 720-0848 Fax (972) 447-0784 Fax 49 [0] 89/96.54.74 Fax
European Sales Asia/Pacific Sales European Sales
QT Optoelectronics QT Optoelectronics Quality Technologies (U.K) Ltd.
“Le Levant”B613, 6th Floor 10, Prebendal Cour t, Oxford Road
2, rue du Nouveau Bercy East Wing, Wisma Tractors Aylesbury, Buckinghamshire
F-94277-CHARENTON-LE PONT Cedex Jalan SS16/1, Subang Jaya HP19-3EY United Kingdom
FRANCE 47500 Petaling Jaya 44 [0] 1296/30.44.99 Phone
33 [0] 1.45.18.78.78 Phone Selangor Darul Eshan, Malaysia 44 [0] 1296/39.24.32 Fax
33 [0] 1.43.75.77.57 Fax 603/735-2417 Phone
603/736-3382 Fax
R2 .R2 Opto Plus Reliability Conditioning
S .S Surface Mount Lead Bend
SD * .SD Surface Mount; Tape and reel
SDL * .SDL Surface Mount; Tape and reel
W .W 0.4” Lead Spacing
Order
Entry
Option Identifier Description
4.0 ± 0.1
Ø1.55 ± 0.05
User Direction of Feed
4.0 ± 0.1
1.75 ± 0.10
7.5 ± 0.1
16.0 ± 0.3
12.0 ± 0.1
0.30 ± 0.05
13.2 ± 0.2
4.90 ± 0.20
0.1 MAX 10.30 ± 0.20
10.30 ± 0.20
Ø1.6 ± 0.1
QT Carrier Tape Specifications (“D” Taping Orientation)
ORDERING INFORMATION
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
www.fairchildsemi.com © 2000 Fairchild Semiconductor Corporation
AC/DC TO LOGIC INTERFACE
OPTOCOUPLER
10/22/99 200003A
