2N2905AJANTX - ON SEMICONDUCTOR - Datasheet.Directory

1. Product profile

1.1 General description

Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is

designed and qualified for use in a wide ran ge of industrial, communications and domestic

equipment.

1.2 Features and benefits

High reliability Power SO8 package,

qualified to 175°C

Low parasitic inductance and

resistance

Optimised for 4.5V Gate drive utilising

NextPower Superjunction technology

Ultra low QG, QGD and QOSS for high

system efficiencies at low and high

loads

1.3 Applications

DC-to-DC converters

Load switching

Power OR-ing

Server power supplies

Sync rectifier

1.4 Quick reference data

PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using

NextPower technology

Rev. 01 — 2 May 2011 Product data sheet

LFPAK

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VDS drain-source volt ag e 25 °C ≤Tj≤175°C --25V

IDdrain current Tmb =25°C; V

GS =10V;

see Figure 1 --97A

Ptot total power dissipation Tmb =25°C; see Figure 2 --64W

Tjjunction temperature -55 - 175 °C

Static characteristics

RDSon drain - so urce on-stat e

resistance VGS =4.5V; I

D=20A;

Tj=25°C; see Figure 12 - 4.25 5.1 mΩ

VGS =10V; I

D=20A;

Tj=25°C; see Figure 12 -3.33.9mΩ

Product data sheet Rev. 01 — 2 May 2011 2 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

2. Pinning information

3. Ordering information

4. Marking

[1] % = placeholder for manufacturing site code

Dynamic characteristics

QGD gate-drain charge VGS =4.5V; I

D=20A;

VDS =12V; see Figure 14;

see Figure 15

-3-nC

QG(tot) total gate charge - 10.1 - nC

Table 1. Quick reference data …continued

Symbol Parameter Conditions Min Typ Max Unit

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphi c sy mbol

1Ssource

SOT669 (LFPAK; Power-SO8)

2Ssource

3Ssource

4 G gate

mb D mounting base; connected to drain

1234

bb076

Table 3. Ordering informatio n

Type number Package

Name Description Version

PSMN3R7-25YLC LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669

Table 4. Marking codes

Type number Marking code[1]

PSMN3R7-25YLC 3C725L

Product data sheet Rev. 01 — 2 May 2011 3 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

5. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maxi mum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage 25 °C ≤Tj≤175 °C - 25 V

VDGR drain-gate voltage 25 °C ≤Tj≤175 °C; RGS =20kΩ-25V

VGS gate-source voltage -20 20 V

IDdrain current VGS =10V; T

mb = 25 °C; see Figure 1 -97A

VGS =10V; T

mb = 100 °C; see Figure 1 -68A

IDM peak drain current pulsed; tp≤10 µs; Tmb =25°C;

see Figure 4 - 387 A

Ptot total power dissipation Tmb = 25 °C; see Figure 2 -64W

Tstg storage temperature -55 175 °C

Tjjunction temperature -55 175 °C

Tsld(M) peak soldering temperature - 260 °C

VESD electrostatic discharge voltage MM (JEDEC JESD22-A115) 310 - V

Source-drain diode

ISsource current Tmb =25°C - 58 A

ISM peak source current pulsed; tp≤10 µs; Tmb = 25 °C - 387 A

Avalanche ruggedness

EDS(AL)S non-repetitive drain-source

avalanche energy VGS =10V; T

j(init) =25°C; I

D=98A;

Vsup ≤25 V ; unclamped; RGS =50Ω;

see Figure 3

-24mJ

Fig 1. Continuous drain current as a function of

mounting base temperature Fig 2. Normalized total power dissipatio n as a

function of mounting ba s e te mp e rature

003aaf 855

100

120

0 50 100 150 200

Tmb

(C)

(A)

Tmb (°C)

0 20015050 100

03na19

120

Pder

(%)

Product data sheet Rev. 01 — 2 May 2011 4 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Fig 3. Single pulse avalanche rating; avalanche current as a function of avalanche time

Fig 4. Safe operating area; continuous and peak drain currents as a function of drain -source voltage

003aaf 869

10-1

102

103

10-3 10-2 10-1 1 10

tAL (ms )

IAL

(A)

(1)

(2)

003aaf856

-1

1 10 10

(V)

(A)

Limit R

DSon

= V

/ I

100 μs

10 ms

=10 μs

100 ms

1 ms

Product data sheet Rev. 01 — 2 May 2011 5 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

6. Thermal characteristics

Table 6. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Rth(j-mb) thermal resistance from junction to

mounting base see Figure 5 - 2.14 2.34 K/W

Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration

003aaf857

single shot

0.2

0.1

0.05

0.02

-2

-1

1e-6 10

-5

-4

-3

-2

-1

(s)

th(j-mb)

(K/W)

δ = 0.5

δ =

Product data sheet Rev. 01 — 2 May 2011 6 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

7. Characteristics

Table 7. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V(BR)DSS drain-source breakdown

voltage ID= 250 µA; VGS =0V; T

j=25°C 25--V

ID= 250 µA; V GS =0V; T

j= -55 °C 22.5 - - V

VGS(th) gate-source threshold voltage ID=1mA; V

DS =V

GS; Tj=25°C;

see Figure 10; see Figure 11 1.05 1.54 1.95 V

ID=10mA; V

DS =V

GS; Tj= 150 °C 0.5 - - V

ID=1mA; V

DS =V

GS; Tj=-55°C --2.25V

IDSS drain leakage current VDS =25V; V

GS =0V; T

j=25°C --1µA

VDS =25V; V

GS =0V; T

j= 150 °C - - 100 µA

IGSS gate leakage current VGS =16V; V

DS =0V; T

j= 25 °C - - 100 nA

VGS =-16V; V

DS =0V; T

j= 25 °C - - 100 nA

RDSon drain-source on-state

resistance VGS =4.5V; I

D=20A; T

j=25°C;

see Figure 12 - 4.25 5.1 mΩ

VGS =4.5V; I

D=20A; T

j=150°C;

see Figure 12; see Figure 13 --8.3mΩ

VGS =10V; I

D=20A; T

j=25°C;

see Figure 12 -3.33.9mΩ

VGS =10V; I

D=20A; T

j= 150 °C;

see Figure 12; see Figure 13 --6.3mΩ

RG gate resistance f = 1 MHz - 1.7 3.4 Ω

Dynamic characteristics

QG(tot) total gate charge ID=20A; V

DS =12V; V

GS =10V;

see Figure 14; see Figure 15 - 21.6 - nC

ID=20A; V

DS =12V; V

GS =4.5V;

see Figure 14; see Figure 15 - 10.1 - nC

ID=0A; V

DS =0V; V

GS = 10 V - 20.3 - nC

QGS gate-source charge ID=20A; V

DS =12V; V

GS =4.5V;

see Figure 14; see Figure 15 -3.2-nC

QGS(th) pre-threshold gate-source

charge -2.1-nC

QGS(th-pl) post-thres ho l d ga te-source

charge -1.1-nC

QGD gate-drain charge - 3 - nC

VGS(pl) gate-source plateau voltage ID=20A; V

DS =12V; see Figure 14;

see Figure 15 -2.62-V

Ciss input capacitance VDS =12V; V

GS = 0 V; f = 1 MHz;

Tj=25°C; see Figure 16 - 1585 - pF

Coss output capacitance - 370 - pF

Crss reverse transfer capacitance - 133 - pF

td(on) turn-on delay time VDS =12V; R

L=0.5Ω; VGS =4.5V;

RG(ext) =4.7Ω

- 16.6 - ns

trrise time - 16.3 - ns

td(off) turn-o ff delay time - 26 - ns

tffall time - 10.7 - ns

Product data sheet Rev. 01 — 2 May 2011 7 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Qoss output charge VGS =0V; V

DS =12V; f=1MHz;

Tj=25°C -8-nC

Source-drain diode

VSD source-drain voltage IS=20A; V

GS =0V; T

j=25°C;

see Figure 17 -0.81.1V

trr reverse recovery time IS=20A; dI

S/dt = -100 A/µs;

VGS =0V; V

DS =12V -23-ns

Qrrecovered charge - 14 - nC

tareverse recovery rise time VGS =0V; I

S=20A;

dIS/dt = -100 A/µs; VDS =12V;

see Figure 18

- 13.5 - ns

tbreverse recovery fall time - 9.5 - ns

Table 7. Characteristics …continued

Symbol Parameter Conditions Min Typ Max Unit

Fig 6. Outp ut characteristics; drain current as a

function of drain-source volta ge; typ ical values Fig 7. Dr ain-source on-state resistance as a function

of gate-source voltage; typical value s

003aaf 858

100

0 0.5 1 1.5 2

VDS (V)

(A)

2.2

2.4

2.6

2.8

3.0

3.54.510

VGS(V)=

003aaf 859

0 4 8 12 16

VGS (V)

RDS on

(mΩ)

Product data sheet Rev. 01 — 2 May 2011 8 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Fig 8. Forward transconductance as a function of

drain current; typical values Fig 9. T ransfer characteristics; drain current as a

function of gate-s ourc e volt ag e ; typi ca l v al ue s

Fig 10. Sub-threshold drain current as a function of

gate-source voltage Fig 11. Gate-sour ce threshold voltage as a function of

junction temperature

003aaf 864

120

0 20406080100

(A)

(S )

003aaf 866

100

01234

(V)

(A)

= 25

°CT

= 150

°C

003aaf 863

-6

-5

-4

-3

-2

-1

0123

(V)

(A)

Min Typ Ma x

003aaf 862

-60 0 60 120 180

(°C)

GS(th)

(V) Ma x (1 m A)

Min (5 m A)

=5mA

1mA

Product data sheet Rev. 01 — 2 May 2011 9 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Fig 12. Drain-source on-state resistance as a function

of drain current; typical values Fig 13. Normalized drain-source on-state resistance

factor as a function of junction temperature

Fig 14. Gate charge waveform definitions Fig 15. Gate-source voltage as a function of gate

charge; typical values

003aaf 860

0 20406080100

ID (A)

RDS on

(mΩ)

VGS (V) =

4.5

3.5

2.6 2.8 3.0

003aaf 861

0.5

1.5

-60 0 60 120 180

Tj (°C)

aVGS=10V

4.5V

003aaa5

VGS

VGS(th)

QGS1 QGS2

QGD

VDS

QG(tot)

QGS

VGS(pl)

003aaf 867

0 5 10 15 20 25

QG (nC)

VGS

(V)

VDS = 5V

20V

12V

Product data sheet Rev. 01 — 2 May 2011 10 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Fig 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

Fig 17. Source current as a fu nction of source-drain

voltage; typical values

Fig 18. Reverse recovery timing defin ition

003aaf 865

102

103

104

10-1 1 10 102

VDS (V)

(pF)

Cis s

Crs s

Coss

003aaf 868

100

0 0.4 0.8 1.2

VSD

(V)

(A)

Tj = 25

°CTj = 150

°C

003aaf 444

t (s )

(A)

0.25 I

Product data sheet Rev. 01 — 2 May 2011 11 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

8. Package outline

Fig 19. Package outline SOT669 (LFPAK; Power-SO8)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT669 MO-235 06-03-16

11-03-25

0 2.5 5 mm

scale

A2bcA e

UNIT

DIMENSIONS (mm are the original dimensions)

mm 1.10

0.95

0.15

0.00

1.20

1.01

0.50

0.35

4.41

3.62

2.2

2.0

0.9

0.7

0.25

0.19

0.30

0.24

4.10

3.80

6.2

5.8

1.3

0.8

0.85

0.40

1.3

0.8

8°

0°

D(1)

5.0

4.8

E(1)

3.3

3.1

E1(1)

D1(1)

max

0.25 4.20 1.27 0.25 0.1

1234

mounting

base

Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads SOT669

1/2 e

(A )

detail X

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

Product data sheet Rev. 01 — 2 May 2011 12 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

9. Revision history

Table 8. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PSMN3R7-25YLC v.1 20110502 Product data sheet - -

Product data sheet Rev. 01 — 2 May 2011 13 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

10. Legal information

10.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of de vice(s) desc r ibed in this do cument may have changed since this document was publis hed and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

10.2 Definitions

Preview — The document is a preview version only. The document is still

subject to formal approval, which may result in modificat ions or additions.

NXP Semiconductors does not give any representat i ons or warranties as to

the accuracy or completeness of informati on included herein and shall have

no liability for the consequences of use of such info rmation.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extr act from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full informatio n see the relevant full dat a

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

Product specifica t ion — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

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shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

10.3 Disclaimers

Limited warranty and liability — Information in this d ocument is be lieved to

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Notwithstanding any damages that customer might incur for any reason

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Quick reference data — The Quick reference dat a is an ext ract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Custo mers should provide appropriate

design and operating safeguards to minimize the risks associated with t heir

applications and products.

NXP Semiconductors does not accept any liabili ty related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

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testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by cust omer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Document status [1] [2] Product status [3] Definition

Objective [short] data sheet Development This document contai ns data from the objective specification for product development.

Preliminary [shor t] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 01 — 2 May 2011 14 of 15

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individua l

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applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

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Export control — This document as well as the item(s) d escribed herein may

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Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It i s neit her qualif ied nor test ed

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and st andards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifications, and (b)

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liability, damages or failed product claims resulting from customer design an d

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

10.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,

FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,

ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,

QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,

TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

11. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors PSMN3R7-25YLC

N-channel 25 V 3.9 mΩ logic level MOSFET in LFPAK using NextPower

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 2 May 2011

Documen t identifier: PSMN3R 7-25YLC

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

12. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . .5

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11

9 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12

10 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13

10.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .1 3

10.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

10.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13

10.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14

11 Contact information. . . . . . . . . . . . . . . . . . . . . .14