Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 14
1Publication Order Number:
MC74LCX07/D
MC74LCX07
Low-Voltage CMOS Hex
Buffer with Open Drain
Outputs
With 5 V−Tolerant Inputs
The MC74LCX07 is a high performance hex buffer operating from
a 2.3 to 3.6 V supply. High impedance TTL compatible inputs
significantly reduce current loading to input drivers. These LCX
devices have open drain outputs which provide the ability to set output
levels, or do active−HIGH AND or active−LOW OR functions. A VI
specification of 5.5 V allows MC74LCX07 inputs to be safely driven
from 5.0 V devices.
Features
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant Inputs/Outputs
LVTTL Compatible
LVCMOS Compatible
24 mA Output Sink Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
Wired−OR, Wired−AND
Output Level Can Be Set Externally Without Affecting Speed of
Device
ESD Performance: Human Body Model >1500 V;
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
1314 12 11 10 9 8
21 34567
VCC A3 O3 A4 O4 A5 O5
A0 O0 A1 O1 A2 O2 GND
Figure 1. Pinout: 14−Lead (Top View)
MARKING
DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOIC−14
D SUFFIX
CASE 751A
14
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G = Pb−Free Package
G= Pb−Free Package
(Note: Microdot may be in either location)
LCX07G
AWLYWW
1
14
LCX
07
ALYWG
G
1
14
MC74LCX07
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2
2O0
1
A0
4O1
3
A1
6O2
5
A2
12 O3
13
A3
10 O4
11
A4
8O5
9
A5
PIN NAMES
Function
Data Inputs
Outputs
Pins
An
On
TRUTH TABLE
An On
L
H
L
Z
Figure 2. Logic Diagram
*
*
*
*
*
*
* OD
MAXIMUM RATINGS
Symbol Parameter Value Condition Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIDC Input Voltage −0.5 v VI v +7.0 V
VODC Output Voltage −0.5 v VO v +7.0 Output in HIGH or LOW State (Note 1) V
IIK DC Input Diode Current −50 VI < GND mA
IOK DC Output Diode Current −50 VO < GND mA
+50 VO > VCC mA
IODC Output/Sink Current +50 mA
ICC DC Supply Current Per Supply Pin $100 mA
IGND DC Ground Current Per Ground Pin $100 mA
TSTG Storage Temperature Range −65 to +150 C
MSL Moisture Sensitivity Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
ORDERING INFORMATION
Device Package Shipping†
MC74LCX07DG SOIC−14
(Pb−Free)
55 Units / Rail
MC74LCX07DR2G SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX07DTG TSSOP−14
(Pb−Free)
96 Units / Rail
MC74LCX07DTR2G TSSOP−14
(Pb−Free)
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MC74LCX07
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3
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage Operating
Data Retention Only
2.0
1.5
2.3 to 3.3 5.5
5.5
V
VIInput Voltage 0 5.5 V
VOOutput Voltage (HIGH or LOW State) 0 5.5 V
IOH HIGH Level Output Current VCC= 3.0 V−3.6 V
VCC= 2.7 V−3.0 V
VCC= 2.3 V−2.7 V
−24
−12
−8
mA
IOL LOW Level Output Current VCC = 3.0 V−3.6 V
VCC = 2.7 V−3.0 V
VCC = 2.3 V−2.7 V
+24
+12
+8
mA
TAOperating Free−Air Temperature −40 +85 C
Dt/DVInput Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V
DC ELECTRICAL CHARACTERISTICS
Symbol Characteristic Condition
TA = −40C to +85C
Unit
Min Max
VIH HIGH Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 1.7 V
2.7 V VCC 3.6 V 2.0
4.5 V VCC 5.25 V 3.125
VIL LOW Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 0.7 V
2.7 V VCC 3.6 V 0.8
4.5 V VCC 5.25 V 0.8
VOL LOW Level Output Voltage 2.3 V VCC 3.6 V; IOL = 100 mA0.2 V
VCC = 2.3 V; IOL= 8 mA 0.3
VCC = 2.7 V; IOL= 12 mA 0.4
VCC = 3.0 V; IOL = 16 mA 0.4
VCC = 3.0 V; IOL = 24 mA 0.55
IOZ 3−State Output Current VCC = 3.6 V, VIN = VIH or VIL,
VOUT = 0 to 5.5 V
$5mA
IOFF Power Off Leakage Current VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA
IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND $5mA
ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA
DICC Increase in ICC per Input 2.3 V VCC 3.6 V
4.5 V VCC 5.5 V
VCC = 5.25 V, one input at 3.125 V, other
inputs at VCC or GND
500
1.0
10
mA
mA
mA
2. These values of VI are used to test DC electrical characteristics only.
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter
Limits
Unit
TA= −405C to +855C
VCC = 3.3 V $ 0.3 V VCC= 2.7 V VCC = 2.5 V $ 0.2 V
CL= 50 pF CL= 50 pF CL= 30 pF
Min Max Min Max Min Max
tPLZ
tPZL
Propagation Delay
Input to Output
0.5
0.5
3.0
3.0
0.8
0.8
3.7
3.7
0.8
0.8
3.8
3.8
ns
ns
MC74LCX07
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4
DYNAMIC SWITCHING CHARACTERISTICS
Symbol Characteristic Condition
TA = +25C
Unit
Min Typ Max
VOLP Dynamic LOW Peak Voltage (Note 3) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH =2.5 V, VIL = 0 V
0.9
0.7
V
VOLV Dynamic LOW Valley Voltage (Note 3) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
3. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol Parameter Condition Typical Unit
CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF
COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF
CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF
PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1MHz; tW = 500 ns
VCC
0 V
VLZ
An
On
tPLZ
tPZL
Vmi
Vmo
Figure 3. AC Waveforms
VOL
Vmi
Symbol
VCC
3.3 V $ 0.3 V 2.7 V 2.5 V $ 0.2 V
Vmi 1.5 V 1.5 V VCC/2
Vmo 1.5 V 1.5 V VCC/2
VLZ VOL + 0.3 V VOL + 0.3 V VOL + 015 V
PULSE
GENERATOR
RT
DUT
VCC
RL
CL
R1
6 V or VCC 2
GND
TEST SWITCH
tPZL, tPLZ 6 V
Open Collector/Drain tPLH and tPHL 6 V
tPZH, tPHZ GND
CL= 50 pF at VCC = 3.3 "0.3 V or equivalent (includes jig and probe capacitance)
CL= 30 pF at VCC = 2.5 "0.2 V or equivalent (includes jig and probe capacitance)
RL= R1 = 500 W or equivalent
RT= ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
MC74LCX07
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5
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
ÇÇÇ
ÇÇÇ
SECTION N−N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC74LCX07
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6
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
H
14 8
71
M
0.25 B M
C
h
X 45
SEATING
PLANE
A1
A
M
_
S
A
M
0.25 B S
C
b
13X
B
A
E
D
e
DETAIL A
L
A3
DETAIL A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
D8.55 8.75 0.337 0.344
E3.80 4.00 0.150 0.157
A1.35 1.75 0.054 0.068
b0.35 0.49 0.014 0.019
L0.40 1.25 0.016 0.049
e1.27 BSC 0.050 BSC
A3 0.19 0.25 0.008 0.010
A1 0.10 0.25 0.004 0.010
M0 7 0 7
H5.80 6.20 0.228 0.244
h0.25 0.50 0.010 0.019
__ __
6.50
14X
0.58
14X
1.18
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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MC74LCX07/D
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