CY62126ESL MoBL(R)Automotive 1-Mbit (64K x 16) Static RAM Features automatic power down feature that significantly reduces power consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (CE HIGH). The input and output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH) or during a write operation (CE LOW and WE LOW). Very high speed: 45 ns Wide voltage range: 2.2 V to 3.6 V and 4.5 V to 5.5 V Ultra low standby power Typical standby current: 1 A Maximum standby current: 4 A Ultra low active power Typical active current: 1.3 mA at f = 1 MHz Easy memory expansion with CE, and OE features Automatic power down when deselected Complementary metal oxide semiconductor (CMOS) for optimum speed and power Available in Pb-free 44-Pin thin small outline package (TSOP) II package To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A15). Functional Description The CY62126ESL is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery LifeTM (MoBL) in portable applications such as cellular telephones. The device also has an To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory appears on I/O8 to I/O15. See the Truth Table on page 11 for a complete description of read and write modes. For best practice recommendations, refer to the Cypress application note AN1064, SRAM System Guidelines. Logic Block Diagram SENSE AMPS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 ROW DECODER DATA IN DRIVERS 64K x 16 RAM Array I/O0-I/O7 I/O8-I/O15 * BHE WE CE OE BLE A15 A14 A13 A11 Cypress Semiconductor Corporation Document #: 001-66522 Rev. ** A12 COLUMN DECODER 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised January 17, 2011 [+] Feedback CY62126ESL MoBL(R) Automotive Contents Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics ................................................. 4 Capacitance ...................................................................... 5 Thermal Resistance .......................................................... 5 Data Retention Characteristics ....................................... 6 Switching Characteristics ................................................ 7 Switching Waveforms ...................................................... 8 Truth Table ...................................................................... 11 Document #: 001-66522 Rev. ** Ordering Information ...................................................... 12 Ordering Code Definitions ......................................... 12 Package Diagram ............................................................ 13 Acronyms ........................................................................ 14 Document Conventions ................................................. 14 Units of Measure ....................................................... 14 Document History Page ................................................. 15 Sales, Solutions, and Legal Information ...................... 16 Worldwide Sales and Design Support ....................... 16 Products .................................................................... 16 PSoC Solutions ......................................................... 16 Page 2 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Pin Configuration 44-Pin TSOP II (Top View) [1] A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 VCC VSS I/O4 I/O5 I/O6 I/O7 WE A15 A14 A13 A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE BHE BLE I/O15 I/O14 I/O13 I/O12 VSS VCC I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC Product Portfolio Power Dissipation Product CY62126ESL Range Auto-A VCC Range (V) [2] 2.2 V-3.6 V and 4.5 V-5.5 V Speed (ns) 45 Operating ICC, (mA) f = 1MHz f = fmax Standby, ISB2 (A) Typ [3] Max Typ [3] Max Typ [3] Max 1.3 2 11 16 1 4 Notes 1. NC pins are not connected on the die. 2. Datasheet specifications are not guaranteed for VCC in the range of 3.6 V to 4.5 V. 3. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. Document #: 001-66522 Rev. ** Page 3 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Maximum Ratings Output current into outputs (low) ................................. 20 mA Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage temperature................................. -65 C to +150 C Ambient temperature with power applied ............................................. 55 C to +125 C Supply voltage to ground potential ..........................................................-0.5 V to 6.0 V DC voltage applied to outputs in High Z state [4, 5] ..........................................-0.5 V to 6.0 V Static discharge voltage.......................................... > 2001 V (MIL-STD-883, method 3015) Latch-up current ..................................................... > 200 mA Operating Range Device CY62126ESL Ambient Temperature Range VCC[6] Automotive-A -40 C to +85 C 2.2 V-3.6 V, and 4.5 V-5.5 V DC input voltage [4, 5] .......................................-0.5 V to 6.0 V Electrical Characteristics Over the Operating Range 45 ns Parameter VOH VOL VIH VIL Description Output high voltage Output low voltage Input high voltage Input low voltage Test Conditions Min Typ [7] Max Unit V 2.2 < VCC < 2.7 IOH = -0.1 mA 2.0 - - 2.7 < VCC < 3.6 IOH = -1.0 mA 2.4 - - 4.5 < VCC < 5.5 IOH = -1.0 mA 2.4 - - 2.2 < VCC < 2.7 IOL = 0.1 mA - - 0.4 2.7 < VCC < 3.6 IOL = 2.1mA - - 0.4 4.5 < VCC < 5.5 IOL = 2.1mA - - 0.4 2.2 < VCC < 2.7 1.8 - VCC + 0.3 2.7 < VCC < 3.6 2.2 - VCC + 0.3 4.5 < VCC < 5.5 2.2 - VCC + 0.5 2.2 < VCC < 2.7 -0.3 - 0.6 2.7 < VCC < 3.6 -0.3 - 0.8 4.5 < VCC < 5.5 -0.5 - 0.8 GND < VI < VCC V V V IIX Input leakage current -1 - +1 A IOZ Output leakage current GND < VO < VCC, Output disabled -1 - +1 A ICC VCC operating supply current - 11 16 mA - 1.3 2.0 - 1 4 A - 1 4 A ISB1 ISB2[8] f = fmax = 1/tRC f = 1 MHz VCC = VCCmax IOUT = 0 mA, CMOS levels Automatic CE CE > VCC 0.2 V, VIN > VCC - 0.2 V or VIN < 0.2 V, power-down current -- f = fmax (address and data only), f = 0 (OE and WE), CMOS Inputs VCC = VCC(max) Automatic CE CE > VCC - 0.2 V, VIN > VCC - 0.2 V or VIN < 0.2 V, power-down current -- f = 0, VCC = VCC(max) CMOS inputs Notes 4. VIL(min) = -2.0 V for pulse durations less than 20 ns. 5. VIH(max) = VCC + 0.75 V for pulse durations less than 20 ns. 6. Full device AC operation assumes a minimum of 100 s ramp time from 0 to VCC (min) and 200 s wait time after VCC stabilization. 7. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. 8. Chip enable (CE) must be HIGH at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating. Document #: 001-66522 Rev. ** Page 4 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Capacitance Parameter[9] Description CIN Input capacitance COUT Output capacitance Test Conditions Max Unit 10 pF 10 pF TSOP II Unit 28.2 C/W 3.4 C/W TA = 25 C, f = 1 MHz, VCC = VCC(typ) Thermal Resistance Parameter[9] Description Test Conditions JA Thermal resistance (Junction to ambient) JC Thermal resistance (Junction to case) Still air, soldered on a 3 x 4.5 inch, two-layer printed circuit board Figure 1. AC Test Loads and Waveforms R1 VCC OUTPUT ALL INPUT PULSES VCC 30 pF INCLUDING JIG AND SCOPE R2 90% 10% 90% 10% GND Rise Time = 1 V/ns Equivalent to: Fall Time = 1 V/ns THEVENIN EQUIVALENT RTH OUTPUT V Parameters 2.50 V 3.0 V 5.0 V Unit R1 16600 1103 1800 R2 15400 1554 990 RTH 8000 645 639 VTH 1.2 1.75 1.77 V Note 9. Tested initially and after any design or process changes that may affect these parameters Document #: 001-66522 Rev. ** Page 5 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Data Retention Characteristics Over the Operating Range Parameter VDR Description Conditions VCC for data retention VCC = 1.5 V Typ [10] Max Unit 1.5 - - V - - 3 A ICCDR Data retention current tCDR [12] Chip deselect to data retention time 0 - - ns tR [13] Operation recovery time 45 - - ns [11] CE > VCC - 0.2 V, VIN > VCC - 0.2 V or VIN < 0.2 V Min Figure 2. Data Retention Waveform DATA RETENTION MODE VCC VCC(min) tCDR VDR > 1.5 V VCC(min) tR CE Notes 10. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 C. 11. Chip enable (CE) must be HIGH at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating. 12. Tested initially and after any design or process changes that may affect these parameters. 13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s. Document #: 001-66522 Rev. ** Page 6 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Switching Characteristics Over the Operating Range Parameter[14] Description 45 ns Min Max Unit Read Cycle tRC Read cycle time 45 - ns tAA Address to data valid - 45 ns tOHA Data hold from address change 10 - ns tACE CE LOW to data valid - 45 ns tDOE OE LOW to data valid - 22 ns tLZOE OE LOW to Low Z [15] 5 - ns tHZOE OE HIGH to High Z [15, 16] - 18 ns tLZCE CE LOW to Low Z [15] 10 - ns tHZCE CE HIGH to High Z [15, 16] - 18 ns tPU CE LOW to power up 0 - ns tPD CE HIGH to power up - 45 ns tDBE BHE / BLE LOW to data valid - 22 ns 5 - ns - 18 ns tLZBE tHZBE BHE / BLE LOW to Low Z [15] BHE / BLE HIGH to High Z [15, 16] Write Cycle [17] tWC Write cycle time 45 - ns tSCE CE LOW to write end 35 - ns tAW Address setup to write end 35 - ns tHA Address Hold from write end 0 - ns tSA Address setup to write start 0 - ns tPWE WE pulse width 35 - ns tBW BHE / BLE pulse width 35 - ns tSD Data setup to write end 25 - ns tHD Data hold from write end 0 - ns tHZWE WE LOW to High Z [15, 16] - 18 ns 10 - ns tLZWE WE HIGH to Low Z [15] Notes 14. Test Conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less (1 V/ns), timing reference levels of VCC(typ)/2, input pulse levels of 0 to VCC(typ), and output loading of the specified IOL/IOH as shown in the "AC Test Loads and Waveforms" on page 5. 15. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 16. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the output enter a high impedance state. 17. The internal write time of the memory is defined by the overlap of WE, CE = VIL. All signals must be ACTIVE to initiate a write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write. Document #: 001-66522 Rev. ** Page 7 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Switching Waveforms Figure 3. Read Cycle No. 1 (Address Transition Controlled) [18, 19] tRC RC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Figure 4. Read Cycle No. 2 (OE Controlled) [19, 20] ADDRESS tRC CE tPD tHZCE tACE OE tHZOE tDOE tLZOE BHE/BLE tHZBE tDBE tLZBE DATA OUT HIGHIMPEDANCE HIGH IMPEDANCE DATA VALID tLZCE tPU VCC SUPPLY CURRENT 50% 50% ICC ISB Notes 18. Device is continuously selected. OE, CE = VIL. 19. WE is high for read cycles. 20. Address valid before or similar to CE transition low. Document #: 001-66522 Rev. ** Page 8 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Switching Waveforms (continued) Figure 5. Write Cycle No. 1 (WE Controlled, OE HIGH During Write) [21, 22] tWC ADDRESS tSCE CE tAW tHA tSA tPWE WE tBW BHE/BLE OE DATA I/O tSD NOTE 23 tHD DATAIN tHZOE Figure 6. Write Cycle No. 2 (CE Controlled) [21, 22] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tBW BHE/BLE OE tSD DATA I/O tHD DATAIN NOTE 23 tHZOE Notes 21. Data I/O is high impedance if OE = VIH. 22. If CE goes high simultaneously with WE high, the output remains in high impedance state. 23. During this period, the I/Os are in output state. Do not apply input signals. Document #: 001-66522 Rev. ** Page 9 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Switching Waveforms (continued) Figure 7. Write Cycle No. 3 (WE Controlled, OE LOW) [24] tWC ADDRESS tSCE CE tBW BHE/BLE tAW tHA tSA WE tPWE tSD DATA I/O NOTE 25 tHD DATAIN tLZWE tHZWE Figure 8. Write Cycle No. 4 (BHE/BLE Controlled, OE LOW) [24] tWC ADDRESS CE tSCE tAW tHA tBW BHE/BLE tSA tPWE WE tHZWE DATA I/O NOTE 25 tSD tHD DATAIN tLZWE Notes 24. If CE goes high simultaneously with WE high, the output remains in high impedance state. 25. During this period, the I/Os are in output state. Do not apply input signals. Document #: 001-66522 Rev. ** Page 10 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Truth Table CE[26] WE OE BHE BLE H X X X X High Z Inputs/Outputs Deselect or power-down Mode Standby (ISB) Power L X X H H High Z Output disabled Active (ICC) L H L L L Data out (I/O0-I/O15) Read Active (ICC) L H L H L Data out (I/O0-I/O7); I/O8-I/O15 in High Z Read Active (ICC) L H L L H Data out (I/O8-I/O15); I/O0-I/O7 in High Z Read Active (ICC) L H H L L High Z Output disabled Active (ICC) L H H H L High Z Output disabled Active (ICC) L H H L H High Z Output disabled Active (ICC) L L X L L Data in (I/O0-I/O15) Write Active (ICC) L L X H L Data in (I/O0-I/O7); I/O8-I/O15 in High Z Write Active (ICC) L L X L H Data in (I/O8-I/O15); I/O0-I/O7 in High Z Write Active (ICC) Note 26. Chip enable must be at CMOS levels (not floating). Intermediate voltage levels on this pin is not permitted. Document #: 001-66522 Rev. ** Page 11 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Ordering Information Speed (ns) 45 Ordering Code CY62126ESL-45ZSXA Package Diagram Package Type 51-85087 44-Pin TSOP II (Pb-free) Operating Range Automotive-A Contact your local Cypress sales representative for availability of these parts. Ordering Code Definitions CY 621 2 6 E SL 45 ZSX A Temperature Grade: A= Automotive-A Package Type: ZSX= TSOP II (Pb-free) Speed Grade SL = Wide Voltage Range (3 V and 5 V) E = Process Technology 90 nm Buswidth = x 16 Density = 1-Mbit Family Code: MoBL SRAM family Company ID: CY = Cypress Document #: 001-66522 Rev. ** Page 12 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Package Diagram Figure 9. 44-Pin Thin Small Outline Package Type II, 51-85087 PIN 1 I.D. 11.938 (0.470) 11.735 (0.462) 10.262 (0.404) 10.058 (0.396) 1 22 Z Z Z Z X Z AA 44 23 BOTTOM VIEW TOP VIEW 0.800 BSC (0.0315) 0.400(0.016) 0.300 (0.012) EJECTOR MARK (OPTIONAL) CAN BE LOCATED ANYWHERE IN THE BOTTOM PKG BASE PLANE 10.262 (0.404) 10.058 (0.396) 0.10 (.004) 18.517 (0.729) 18.313 (0.721) 0.150 (0.0059) 0.050 (0.0020) 1.194 (0.047) 0.991 (0.039) DIMENSION IN MM (INCH) MAX MIN. Document #: 001-66522 Rev. ** 0.210 (0.0083) 0.120 (0.0047) 0-5 SEATING PLANE 0.597 (0.0235) 0.406 (0.0160) 51-85087-*C Page 13 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Acronyms Document Conventions Acronym Description Units of Measure BHE byte high enable BLE byte low enable C degree Celcius CMOS complementary metal oxide semiconductor A micro Amperes CE chip enable mA milli Amperes I/O input/output MHz Mega Hertz OE output enable mV milli Volts SRAM static random access memory ns nano seconds TSOP thin small outline package pF pico Farad WE write enable Document #: 001-66522 Rev. ** Symbol Unit of Measure V Volts Ohms W Watts Page 14 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Document History Page Document Title: CY62126ESL MoBL(R) Automotive 1-Mbit (64K x 16) Static RAM Document Number: 001-66522 Revision ECN Submission Date Orig. of Change ** 3144223 01/17/2011 RAME Document #: 001-66522 Rev. ** Description of Change New datasheet for Automotive parts Page 15 of 16 [+] Feedback CY62126ESL MoBL(R) Automotive Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control PSoC Solutions cypress.com/go/automotive psoc.cypress.com/solutions cypress.com/go/clocks PSoC 1 | PSoC 3 | PSoC 5 cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless (c) Cypress Semiconductor Corporation, 2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress' product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 001-66522 Rev. ** Revised January 17, 2011 Page 16 of 16 MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders. [+] Feedback