Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free,

"Green" and Lead-free.

Notes: 6. VIN > 16V to fully enhance output transistor. Otherwise out current must be derated – see graphs. Operation at low supply may cause excessive

7. 100% brightness corresponds to VADJ = VADJ(nom) = VREF. Driving the ADJ pin above VREF will increase the VSENSE threshold and output current

8. ZXLD1366 will operate at higher frequencies but accuracy will be affected due to propagation delays.

Electrical Characteristics (Test conditions: (@ VIN = 24V, TA = +25°C, unless otherwise specified.)

current proportionally.

10. Static current of device is approximately 700 µA, see Graph, Page 16.

11. Ratio of maximum brightness to minimum brightness before shutdown VREF = 1.25/0.3. VREF externally driven to 2.5V, ratio 10:1.

The device, in conjunction with the coil (L1) and current sense resistor (RS), forms a self-oscillating continuous-mode buck converter.

When input voltage VIN is first applied, the initial current in L1 and RS is zero and there is no output from the current sense circuit. Under this

condition, the (-) input to the comparator is at ground and its output is high. This turns MN on and switches the LX pin low, causing current to

flow from VIN to ground, via RS, L1 and the LED(s). The current rises at a rate determined by VIN and L1 to produce a voltage ramp (VSENSE)

across RS. The supply referred voltage VSENSE is forced across internal resistor R1 by the current sense circuit and produces a proportional

current in internal resistors R2 and R3. This produces a ground referred rising voltage at the (-) input of the comparator. When this reaches the

threshold voltage (VADJ), the comparator output switches low and MN turns off. The comparator output also drives another NMOS switch,

which bypasses internal resistor R3 to provide a controlled amount of hysteresis. The hysteresis is set by R3 to be nominally 15% of VADJ.

When MN is off, the current in L1 continues to flow via D1 and the LED(s) back to VIN. The current decays at a rate determined by the LED(s)

Nominal ripple current is ±30mV/RS

The device contains a low pass filter between the ADJ pin and the threshold comparator and an internal current limiting resistor (50kΩ nom)

between ADJ and the internal reference voltage. This allows the ADJ pin to be overdriven with either DC or pulse signals to change the

It is possible to use different values of RS if the ADJ pin is driven from an external voltage. (See next section).

The ADJ pin can be driven by an external DC voltage (VADJ), as shown, to adjust the output current to a value above or below the nominal

average value defined by RS.

The nominal average output current in this case is given by:

Note that the 100% brightness setting corresponds to VADJ = VREF. When driving the ADJ pin above 1.25V, RS must be increased in

proportion to prevent IOUTdc exceeding 1A maximum.

The input impedance of the ADJ pin is 50kΩ ±25% for voltages below VREF and 14.2kΩ ±25% for voltages above VREF +100mV.

The recommended method of driving the ADJ pin and controlling the amplitude of the PWM waveform is to use a small NPN switching

transistor as shown below:

Another possibility is to drive the device from the open drain output of a microcontroller. The diagram below shows one method of doing this:

If the NMOS transistor within the microcontroller has high Gate / Drain capacitance, this arrangement can inject a negative spike into ADJ

input of the ZXLD1366 and cause erratic operation but the addition of a Schottky clamp diode (e.g. Diodes Inorporated’s SD103CWS) to

ground and inclusion of a series resistor (3.3k) will prevent this. See the section on PWM dimming for more details of the various modes of

control using high frequency and low frequency PWM signals.

An external capacitor from the ADJ pin to ground will provide a soft-start delay, by increasing the time taken for the voltage on this pin to rise

to the turn-on threshold and by slowing down the rate of rise of the control voltage at the input of the comparator. Adding capacitance

A low ESR capacitor should be used for input decoupling, as the ESR of this capacitor appears in series with the supply source impedance and

lowers overall efficiency. This capacitor has to supply the relatively high peak current to the coil and smooth the current ripple on the input

When the input voltage is close to the output voltage, the input current increases, which puts more demand on the input capacitor. The

the source impedance is high. The input capacitor should be placed as close as possible to the IC.

For maximum stability over temperature and voltage, capacitors with X7R, X5R, or better dielectric is recommended. Capacitors with Y5V

dielectric are not suitable for decoupling in this application and should NOT be used.

When higher voltages are used with the CIN = 10μF, an electrolytic capacitor can be used provided that a suitable 1µF ceramic capacitor is also

used and positioned as close to the VIN pin as possible.

Figure 5. ZXLD1366 Minimum Recommended Inductor (SO-8EP)

They also provide better efficiency than silicon diodes, due to a combination of lower forward voltage and reduced recovery time.

It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher than the maximum

output load current. It is very important to consider the reverse leakage of the diode when operating above +85°C. Excess leakage will increase

the power dissipation in the device and if close to the load may create a thermal runaway condition.

The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on the LX output. If a

silicon diode is used, care should be taken to ensure that the total voltage appearing on the LX pin including supply ripple, does not exceed the

specified maximum value.

Peak to peak ripple current in the LED(s) can be reduced, if required, by shunting a capacitor Cled across the LED(s) as shown below:

higher capacitor values. Note that the capacitor will not affect operating frequency or efficiency, but it will increase start-up delay, by reducing

the rate of rise of LED voltage.

By adding this capacitor, the current waveform through the LED(s) changes from a triangular ramp to a more sinusoidal version without

altering the mean current value.

Below the undervoltage lockout threshold (VSD), the drive to the output transistor is turned off to prevent device operation with excessive on-

resistance of the output transistor. The output transistor is not fully enhanced until the supply voltage exceeds approximately 17V. At supply

voltages between VSD and 17V, care must be taken to avoid excessive power dissipation due to the on-resistance.

When operating the device at high ambient temperatures, or when driving maximum load current, care must be taken to avoid exceeding the

circuit is low. This may result from the use of unsuitable coils, or excessive parasitic output capacitance on the switch output.

In order to maximize the thermal capabilities of the DFN3030-6 and the SO-8EP packages, thermal vias should be incorporated into the

PCB. See figures 7 and 8 for examples used in the ZXLD1366 evaluation boards.

Vias ensure an effective path to the ground plane for the heat flow, therefore reducing the thermal impedance between junction and ambient

resistor RS. It’s best to connect VIN directly to one end of RS and ISENSE directly to the opposite end of RS with no other currents flowing in these