MC10EL51, MC100EL51 5VECL Differential Clock D FlipFlop The MC10EL/100EL51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151 the EL51 is ideally suited for those applications which require the ultimate in AC performance. The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EL51 allow the device to be used as a negative edge triggered flip-flop. The differential input employs clamp circuitry to maintain stability under open input (pulled down to VEE) conditions. The 100 Series contains temperature compensation. * * * * * * MARKING DIAGRAMS* 8 8 1 SO-8 D SUFFIX CASE 751 8 TSSOP-8 DT SUFFIX CASE 948R 2.8 GHz Toggle Frequency ESD Protection: > 1 KV HBM, > 100 V MM PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V Internal Input Pulldown Resistors on D, R, and CLK 1 8 8 HL51 ALYW 1 1 KL51 ALYW 1 L = Wafer Lot Y = Year W = Work Week *For additional information, see Application Note AND8002/D ORDERING INFORMATION Package Shipping MC10EL51D Device SO-8 98 Units/Rail MC10EL51DR2 SO-8 2500 Tape & Reel MC100EL51D SO-8 98 Units/Rail MC100EL51DR2 October, 2000 - Rev. 3 KEL51 ALYW 1 H = MC10 K = MC100 A = Assembly Location For Additional Information, see Application Note AND8003/D Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 Transistor Count = 73 devices Semiconductor Components Industries, LLC, 2000 8 HEL51 ALYW 1 475 ps Propagation Delay * * Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test * Moisture Sensitivity Level 1 * http://onsemi.com SO-8 2500 Tape & Reel MC10EL51DT TSSOP-8 98 Units/Rail MC10EL51DTR2 TSSOP-8 2500 Tape & Reel MC100EL51DT TSSOP-8 MC100EL51DTR2 TSSOP-8 2500 Tape & Reel 98 Units/Rail Publication Order Number: MC10EL51/D MC10EL51, MC100EL51 LOGIC DIAGRAM AND PINOUT ASSIGNMENT R 1 8 VCC TRUTH TABLE R D 2 D 7 Q CLK 3 6 Q CLK 4 5 VEE D* R* CLK* Q** L H X L L H Z Z X L H L Z = LOW to HIGH Transition * Pin will default low when left open. **Pin will default low when inputs are left open. PIN DESCRIPTION PIN FUNCTION R D CLK, CLK Q, Q VCC VEE ECL Reset Input ECL Data Input ECL Clock Inputs ECL Data Outputs Positive Supply Negative Supply MAXIMUM RATINGS (Note 1.) Symbol Parameter Condition 1 Condition 2 Rating Units VCC PECL Mode Power Supply VEE = 0 V 8 V VEE NECL Mode Power Supply VCC = 0 V -8 V VI PECL C Mode ode Input u Voltage o age VEE = 0 V VI VCC 6 V NECL Mode Input Voltage VCC = 0 V VI VEE -6 V Iout Output Current Continuous Surge 50 100 mA mA TA Operating Temperature Range -40 to +85 C Tstg Storage Temperature Range -65 to +150 C JA Thermal Resistance (Junction to Ambient) 0 LFPM 500 LFPM 8 SOIC 8 SOIC 190 130 C/W C/W JC Thermal Resistance (Junction to Case) std bd 8 SOIC 41 to 44 C/W JA Thermal Resistance (Junction to Ambient) 0 LFPM 500 LFPM 8 TSSOP 8 TSSOP 185 140 C/W C/W JC Thermal Resistance (Junction to Case) std bd 8 TSSOP 41 to 44 5% C/W Tsol Wave Solder <2 to 3 sec @ 248C 265 C 1. Maximum Ratings are those values beyond which device damage may occur. http://onsemi.com 2 MC10EL51, MC100EL51 10EL SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V (Note 1.) -40C Symbol Characteristic Min 25C Typ Max 24 29 Min 85C Typ Max 24 29 Min Typ Max Unit 24 29 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2.) 3920 4010 4110 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 2.) 3050 3200 3350 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage (Single Ended) 3770 4110 3870 4190 3940 4280 mV VIL Input LOW Voltage (Single Ended) 3050 3500 3050 3520 3050 3555 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3.) 2.5 4.6 2.5 4.6 2.5 4.6 V IIH Input HIGH Current 150 A IIL Input LOW Current 150 0.5 150 0.5 A 0.3 NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. 10EL SERIES NECL DC CHARACTERISTICS VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol Characteristic Min 25C Typ Max 24 29 Min 85C Typ Max 24 29 Min Typ Max Unit 24 29 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2.) -1080 -990 -890 -980 -895 -810 -910 -815 -720 mV VOL Output LOW Voltage (Note 2.) -1950 -1800 -1650 -1950 -1790 -1630 -1950 -1773 -1595 mV VIH Input HIGH Voltage (Single Ended) -1230 -890 -1130 -810 -1060 -720 mV VIL Input LOW Voltage (Single Ended) -1950 -1500 -1950 -1480 -1950 -1445 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3.) -2.5 -0.4 -2.5 -0.4 -2.5 -0.4 V IIH Input HIGH Current 150 A IIL Input LOW Current 150 0.5 150 0.5 0.3 A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. http://onsemi.com 3 MC10EL51, MC100EL51 100EL SERIES PECL DC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V (Note 1.) -40C Symbol Characteristic Min 25C Typ Max 24 29 Min 85C Typ Max 24 29 Min Typ Max Unit 30 36 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2.) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mV VOL Output LOW Voltage (Note 2.) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mV VIH Input HIGH Voltage (Single Ended) 3835 4120 3835 4120 3835 4120 mV VIL Input LOW Voltage (Single Ended) 3190 3525 3190 3525 3190 3525 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3.) 2.5 4.6 2.5 4.6 2.5 4.6 V IIH Input HIGH Current 150 A IIL Input LOW Current 150 0.5 150 0.5 A 0.5 NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. 100EL SERIES NECL DC CHARACTERISTICS VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol Characteristic Min 25C Typ Max 24 29 Min 85C Typ Max 24 29 Min Typ Max Unit 30 36 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2.) -1085 -1005 -880 -1025 -955 -880 -1025 -955 -880 mV VOL Output LOW Voltage (Note 2.) -1830 -1695 -1555 -1810 -1705 -1620 -1810 -1705 -1620 mV VIH Input HIGH Voltage (Single Ended) -1165 -880 -1165 -880 -1165 -880 mV VIL Input LOW Voltage (Single Ended) -1810 -1475 -1810 -1475 -1810 -1475 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3.) -2.5 -0.4 -2.5 -0.4 -2.5 -0.4 V IIH Input HIGH Current 150 A IIL Input LOW Current 150 0.5 150 0.5 0.5 A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 2. Outputs are terminated through a 50 ohm resistor to VCC-2 volts. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. http://onsemi.com 4 MC10EL51, MC100EL51 AC CHARACTERISTICS VCC= 5.0 V; VEE= 0.0 V or VCC= 0.0 V; VEE= -5.0 V (Note 1.) -40C Symbol Characteristic Min Typ 1.8 2.8 325 305 465 455 25C Max Min Typ 2.2 2.8 385 355 475 465 85C Max Min Typ 2.2 2.8 440 410 530 510 Max Unit fmax Maximum Toggle Frequency GHz tPLH tPHL Propagation Delay to Output tS Setup Time 150 0 150 0 150 0 ps tH Hold Time 250 100 250 100 250 100 ps tRR Reset Recovery 400 200 400 200 400 200 ps tPW Minimum Pulse Width 400 ps CLK R 605 605 565 565 400 620 620 400 ps CLK, Reset VPP Input Swing (Note 2.) 150 tJITTER Cycle-to-Cycle Jitter tr tf Output Rise/Fall Times Q (20% - 80%) 1000 150 350 100 TBD 100 225 1000 150 350 100 TBD 225 D Receiver Device Driver Device Qb Db 50 50 V TT V TT = V CC - 2.0 V Figure 1. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.) Resource Reference of Application Notes AN1404 - ECLinPS Circuit Performance at Non-Standard VIH Levels AN1405 - ECL Clock Distribution Techniques AN1406 - Designing with PECL (ECL at +5.0 V) AN1503 - ECLinPS I/O SPICE Modeling Kit AN1504 - Metastability and the ECLinPS Family AN1560 - Low Voltage ECLinPS SPICE Modeling Kit AN1568 - Interfacing Between LVDS and ECL AN1596 - ECLinPS Lite Translator ELT Family SPICE I/O Model Kit AN1650 - Using Wire-OR Ties in ECLinPS Designs AN1672 - The ECL Translator Guide AND8001 - Odd Number Counters Design AND8002 - Marking and Date Codes AND8020 - Termination of ECL Logic Devices http://onsemi.com 5 mV 350 ps TBD 1. 10 Series: VEE can vary +0.25 V / -0.5 V. 100 Series: VEE can vary +0.8 V / -0.5 V. 2. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. Q 1000 225 ps MC10EL51, MC100EL51 PACKAGE DIMENSIONS SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE V -X- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K -Y- G C N X 45 SEATING PLANE -Z- 0.10 (0.004) H M D 0.25 (0.010) M Z Y X S J S DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A 8x 0.15 (0.006) T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U S V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S 5 0.25 (0.010) B -U- L 0.15 (0.006) T U M M 4 A -V- F DETAIL E C 0.10 (0.004) -T- SEATING PLANE D -W- G DETAIL E http://onsemi.com 6 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0 6 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0 6 MC10EL51, MC100EL51 Notes http://onsemi.com 7 MC10EL51, MC100EL51 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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