PF592-05 E0C6233 4-bit Single Chip Microcomputer ge oltan V o Lowerati ts p c O odu Pr Core CPU Architecture SVD Circuit/Comparator Event Counter DESCRIPTION The E0C6233 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 4-bit core CPU. It also contains the ROM, RAM, LCD driver, event counter, SVD circuit, stopwatch counter and time base counter. With wide voltage range and low power consumption, the E0C6233 provides an excellent solution for the low-power consumption systems with manganese dry cell. FEATURES CMOS LSI 4-bit parallel processing Clock ..................................................... 32.768kHz (Typ.)/500kHz (Typ.) (selectable by software) Instruction set ........................................ 108 instructions Instruction cycle time ............................ 153sec, 214sec or 366sec at 32kHz (depending on instruction) 10sec, 14sec or 24sec at 500kHz (depending on instruction) ROM capacity ....................................... 3,072 x 12 bits RAM capacity ........................................ 256 x 4 bits Input port ............................................... 5 bits (pull-down resistors are available by mask option) Output port ............................................ 4 bits (general purpose) 2 bits (buzzer output): BZ, BZ 1 bit (lamp output) 1 bit (clock output) I/O port .................................................. 8 bits LCD driver ............................................. 40 segments x 3 commons/40 segments x 4 commons (1/3 or 1/4 duty is selectable by mask option) Built-in time base counter Built-in serial interface .......................... Clock synchronous Built-in stopwatch counter Built-in watchdog timer Event counter ........................................ 8 lines Built-in AMP .......................................... Operational AMP for MOS input analog comparator Built-in SVD ........................................... 1.2 0.1V/2.4 0.1V (supply voltage detector) Interrupts ............................................... External : Input interrupt 2 lines Internal : Timer interrupt 2 lines Serial interface interrupt 1 line Current consumption ............................ E0C62L33 HALT mode (32kHz) : 1.0A (Typ.) E0C6233 HALT mode (32kHz) : 1.5A (Typ.) E0C62A33 HALT mode (32kHz) : 2.0A (Typ.) OPERATING mode (500kHz) : 135A (Typ.) Package ................................................ QFP5-100pin (plastic) Die form LINE UP Model Supply voltage Clock E0C62L33 1.5V (0.9V to 1.7V) 32kHz (Crystal oscillation) E0C6233 3.0V (1.8V to 3.5V) 32kHz (Crystal oscillation) E0C62A33 3.0V (2.2V to 3.5V) 32kHz (Crystal oscillation) & 500kHz (Ceramic or CR oscillation) SEIKO EPSON CORPORATION 1 E0C6233 ROM 3,072 words x 12 bits OSC RESET OSC4 OSC3 OSC2 OSC1 BLOCK DIAGRAM System Reset Control Core CPU E0C6200 RAM 256 words x 4 bits COM0~3 SEG0~39 LCD Driver Interrupt Generator Input Port K00~03, K10 TEST VDD I/O Port P00~03, P10~13 Output Port R00~03, R10~13 Comparator AMPP AMPM VL1~3 CA~CC Power Controller VS1 VSS Timer SVD Stop Watch Event Counter 2 Serial Interface SIN SOUT SCLK SIOF E0C6233 PIN CONFIGURATION QFP5-100pin 80 51 81 50 E0C6233 INDEX 31 100 1 30 No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Pin name N.C. N.C. TEST N.C. N.C. SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 No. 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Pin name SEG38 SEG39 N.C. AMPP N.C. AMPM K10 K03 K02 K01 K00 P03 P02 P01 P00 P13 P12 P11 P10 R03 R02 N.C. R01 R00 R12 No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 Pin name No. Pin name N.C. 76 SIOF N.C. 77 SCLK N.C. 78 N.C. N.C. 79 N.C. R11 80 N.C. R10 81 SOUT R13 82 SIN VSS 83 SEG0 RESET 84 SEG1 OSC4 85 SEG2 OSC3 86 SEG3 VS1 87 SEG4 OSC2 88 SEG5 OSC1 89 SEG6 VDD 90 SEG7 VL3 91 SEG8 VL2 92 SEG9 VL1 93 SEG10 94 SEG11 CC 95 SEG12 CB 96 SEG13 CA 97 SEG14 COM3 98 SEG15 COM2 99 SEG16 COM1 100 SEG17 COM0 N.C. = No Connection PIN DESCRIPTION Pin name VDD VSS VS1 VL1 VL2 VL3 CA-CC OSC1 OSC2 OSC3 OSC4 K00-K03, K10 P00-P03, P10-P13 R00-R03 R10 R13 R11 R12 AMPP AMPM SEG0-39 COM0-3 SIN SOUT SCLK SIOF RESET TEST Pin No. 65 58 62 68 67 66 69-71 64 63 61 60 32-36 37-44 45, 46, 48, 49 56 57 55 50 29 31 6-27, 83-100 72-75 82 81 77 76 59 3 In/Out I I O O O O - I O I O I I/O O O O O O I I O O I O I/O O I I Function Power source (+) terminal Power source (-) terminal Oscillation and internal logic system regulated voltage output terminal LCD system regulated voltage output terminal (approx. -1.05 V) LCD system booster output terminal (VL1 x 2) LCD system booster output terminal (VL1 x 3) Booster capacitor connecting terminal Crystal oscillation input terminal Crystal oscillation output terminal Ceramic or CR oscillation input terminal (Switchable by mask option, 62A33 only) Ceramic or CR oscillation output terminal (Switchable by mask option, 62A33 only) Input terminal I/O terminal Output terminal Output terminal (DC or BZ output may be selected by mask option) Output terminal (DC or BZ output may be selected by mask option) Output terminal Output terminal (DC or FOUT output may be selected by mask option) Analog comparator non-inverted input terminal Analog comparator inverted input terminal LCD segment output terminal (Convertible to DC output by mask option) LCD common output terminal Serial interface input terminal Serial interface output terminal Serial interface clock input/output terminal Serial interface status output terminal Initial reset input terminal Test input terminal 3 E0C6233 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings E0C6233/62A33 (VDD=0V) Rating Symbol Value Unit Supply voltage VSS -5.0 to 0.5 V Input voltage (1) VI VSS - 0.3 to 0.5 V Input voltage (2) VIOSC VS1 - 0.3 to 0.5 V Permissible total output current *1 IVSS 10 mA Operating temperature Topr -20 to 70 C Storage temperature Tstg -65 to 150 C Soldering temperature / Time Tsol 260C, 10sec (lead section) - Permissible dissipation *2 PD 250 mW 1: The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in). 2: In case of plastic package (QFP5-100pin). E0C62L33 (VDD=0V) Rating Symbol Value Unit Supply voltage VSS -2.0 to 0.5 V Input voltage (1) VI VSS - 0.3 to 0.5 V Input voltage (2) VIOSC VS1 - 0.3 to 0.5 V Permissible total output current *1 IVSS 10 mA Operating temperature Topr -20 to 70 C Storage temperature Tstg -65 to 150 C Soldering temperature / Time Tsol 260C, 10sec (lead section) - Permissible dissipation *2 PD 250 mW 1: The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in). 2: In case of plastic package (QFP5-100pin). Recommended Operating Conditions E0C6233 Condition Supply voltage Oscillation frequency Symbol VSS VDD=0V fOSC1 Remark Min. -3.5 - Typ. -3.0 32.768 (Ta=-20 to 70C) Max. Unit -1.8 V - kHz E0C62L33 (Ta=-20 to 70C) Symbol Remark Min. Typ. Max. Unit VSS VDD=0V -1.7 -1.5 -1.1 V VDD=0V, With software control *1 -1.7 -1.5 -0.9 *2 V VDD=0V, When the analog comparator is used -1.7 -1.5 -1.2 V Oscillation frequency fOSC1 - 32.768 - kHz 1: When switching to heavy load protection mode. Note, however, that the ON time for SVD in the heavy load protection must be limited to 10 msec per second of operation time. 2: The possibility of LCD panel display differs depending on the characteristics of the LCD panel. Condition Supply voltage E0C62A33 Condition Supply voltage Oscillation frequency (1) Oscillation frequency (2) 4 Symbol VSS VDD=0V fOSC1 fOSC3 duty 505% Remark Min. -3.5 - 50 Typ. -3.0 32.768 500 (Ta=-20 to 70C) Max. Unit -2.2 V - kHz 600 kHz E0C6233 DC Characteristics E0C6233/62A33 (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit High level input voltage (1) VIH1 K00-03, K10, P00-03, P10-13 0.2*VSS 0 V SIN, SCLK High level input voltage (2) VIH2 RESET, TEST 0.1*VSS 0 V Low level input voltage (1) VIL1 K00-03, K10, P00-03, P10-13 VSS 0.8*VSS V SIN, SCLK Low level input voltage (2) VIL2 RESET, TEST VSS 0.9*VSS V High level input current (1) IIH1 VIH1=0V K00-03, K10, P00-03, P10-13 0 0.5 A No pull down resistor SIN, SCLK, AMPP, AMPM High level input current (2) IIH2 VIH2=0V K00-03, K10 4 16 A With pull down resistor High level input current (3) IIH3 VIH3=0V P00-03, P10-13 25 100 A With pull down resistor RESET, TEST Low level input current IIL VIL=VSS K00-03, K10, P00-03, P10-13 -0.5 0 A SIN, SCLK, AMPP, AMPM RESET, TEST High level output current (1) IOH1 VOH1=0.1*VSS R10, R11, R13 -1.8 mA High level output current (2) IOH2 VOH2=0.1*VSS R00-03, R12, P00-03, P10-13 -0.9 mA SOUT, SIOF, SCLK Low level output current (1) IOL1 VOL1=0.9*VSS R10, R11, R13 6.0 mA Low level output current (2) IOL2 VOL2=0.9*VSS R00-03, R12, P00-03, P10-13 3.0 mA SOUT, SIOF, SCLK Common output current IOH3 VOH3=-0.05V COM0-COM3 -3 A IOL3 VOL3=VL3+0.05V 3 A Segment output current IOH4 VOH4=-0.05V SEG0-SEG39 -3 A (during LCD output) IOL4 VOL4=VL3+0.05V 3 A Segment output current IOH5 VOH5=0.1*VSS SEG0-SEG39 -200 A (during DC output) IOL5 VOL5=0.9*VSS 200 A E0C62L33 (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit High level input voltage (1) VIH1 K00-03, K10, P00-03, P10-13 0.2*VSS 0 V SIN, SCLK High level input voltage (2) VIH2 RESET, TEST 0.1*VSS 0 V Low level input voltage (1) VIL1 K00-03, K10, P00-03, P10-13 VSS 0.8*VSS V SIN, SCLK Low level input voltage (2) VIL2 RESET, TEST VSS 0.9*VSS V High level input current (1) IIH1 VIH1=0V K00-03, K10, P00-03, P10-13 0 0.5 A No pull down resistor SIN, SCLK, AMPP, AMPM High level input current (2) IIH2 VIH2=0V K00-03, K10 2 10 A With pull down resistor High level input current (3) IIH3 VIH3=0V P00-03, P10-13 12 60 A With pull down resistor RESET, TEST Low level input current IIL VIL=VSS K00-03, K10, P00-03, P10-13 -0.5 0 A SIN, SCLK, AMPP, AMPM RESET, TEST High level output current (1) IOH1 VOH1=0.1*VSS R10, R11, R13 -300 A High level output current (2) IOH2 VOH2=0.1*VSS R00-03, R12, P00-03, P10-13 -150 A SOUT, SIOF, SCLK Low level output current (1) IOL1 VOL1=0.9*VSS R10, R11, R13 1,400 A Low level output current (2) IOL2 VOL2=0.9*VSS R00-03, R12, P00-03, P10-13 700 A SOUT, SIOF, SCLK Common output current IOH3 VOH3=-0.05V COM0-COM3 -3 A IOL3 VOL3=VL3+0.05V 3 A Segment output current IOH4 VOH4=-0.05V SEG0-SEG39 -3 A (during LCD output) IOL4 VOL4=VL3+0.05V 3 A Segment output current IOH5 VOH5=0.1*VSS SEG0-SEG39 -100 A (during DC output) IOL5 VOL5=0.9*VSS 100 A 5 E0C6233 Analog Circuit Characteristics and Current Consumption E0C6233 (Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.9 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.9 -2.55 -2.25 VSVD SVD voltage -2.40 V 100 tSVD SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 10 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.5V, VIM=VIP15mV mS response time Current consumption 1.5 4.0 During HALT IOP A Without panel load 6.0 10.0 During operation *1 A 1: The SVD circuit and analog comparator are in the OFF status. E0C6233 (Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.9 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.9 VSVD -2.55 -2.25 SVD voltage -2.40 V tSVD 100 SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 10 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.5V, VIM=VIP15mV mS response time Current consumption 11.2 34.0 During HALT IOP A Without panel load 14.5 40.0 During operation *1 A 1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status. E0C62L33 (Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.9 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.9 -1.30 -1.10 SVD voltage VSVD -1.20 V tSVD 100 SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 20 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.1V, VIM=VIP30mV mS response time Current consumption 1.0 3.0 During HALT IOP A Without panel load 3.0 8.0 During operation *1 A 1: The SVD circuit and analog comparator are in the OFF status. 6 E0C6233 E0C62L33 (Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.85 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.85 -1.30 -1.10 VSVD SVD voltage -1.20 V 100 tSVD SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 20 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.1V, VIM=VIP30mV mS response time Current consumption 2.0 7.0 During HALT *1 IOP A Without panel load 8.0 18.0 During operation *1 A 1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status. E0C62A33 (Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.9 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.9 -2.55 -2.25 VSVD SVD voltage -2.40 V 100 tSVD SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 10 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.5V, VIM=VIP15mV mS response time Current consumption 2.0 5.0 During HALT IOP Without panel load A 8.0 15.0 During operation at 32kHz *1 OSCC="0" A 135 300 During operation at 500kHz *1 Without panel load A 1: The SVD circuit and analog comparator are in the OFF status. E0C62A33 (Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Max. Condition Characteristic Symbol Min. Typ. Unit -0.95 Connect 1M load resistor between VDD and VL1 Internal voltage VL1 -1.15 -1.05 V (without panel load) 2*VL1 Connect 1M load resistor between VDD and VL2 VL2 2*VL1 V (without panel load) -0.1 x0.9 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 VL3 V (without panel load) -0.1 x0.9 -2.55 -2.25 VSVD SVD voltage -2.40 V 100 tSVD SVD circuit response time S Noninverted input (AMPP) VSS+0.3 VDD-0.9 Analog comparator VIP V Inverted input (AMPM) input voltage VIM Analog comparator 10 VOF mV offset voltage Analog comparator 3 tAMP VIP=-1.5V, VIM=VIP15mV mS response time Current consumption 11.5 35.0 During HALT IOP Without panel load A 16.0 45.0 During operation at 32kHz *1 OSCC="0" A 130 330 During operation at 500kHz *1 Without panel load A 1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status. 7 E0C6233 Oscillation Characteristics The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the following characteristics as reference values. E0C6233 (Crystal oscillation circuit) (Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35k), CG=25pF, CD=built-in, Ta=25C) Condition Unit Characteristic Symbol Min. Typ. Max. V tsta5sec (VSS) Oscillation start voltage Vsta -1.8 V (VSS) tstp10sec Oscillation stop voltage Vstp -1.8 pF Including the parasitic capacity inside the IC Built-in capacitance (drain) CD 18 f/V ppm VSS=-1.8 to -3.5V Frequency/voltage deviation 5 f/IC ppm Frequency/IC deviation -10 10 f/CG CG=5 to 25pF ppm Frequency adjustment range 35 45 V (VSS) Harmonic oscillation start voltage Vhho -3.5 Between OSC1 and VDD, VSS Rleak M Permitted leak resistance 200 E0C62L33 (Crystal oscillation circuit) (Unless otherwise specified: VDD=0V, VSS=-1.5V, Crystal: C-002R (CI=35k), CG=25pF, CD=built-in, Ta=25C) Characteristic Symbol Condition Min. Typ. Max. Unit Oscillation start voltage Vsta tsta5sec (VSS) -1.1 V Oscillation stop voltage Vstp tstp10sec (VSS) -1.1(-0.9)*1 V Built-in capacitance (drain) CD Including the parasitic capacity inside the IC 18 pF Frequency/voltage deviation f/V VSS=-1.1 to -1.7V (-0.9) *1 5 ppm Frequency/IC deviation f/IC -10 10 ppm Frequency adjustment range f/CG CG=5 to 25pF 35 45 ppm Harmonic oscillation start voltage Vhho (VSS) -1.7 V Permitted leak resistance Rleak Between OSC1 and VDD, VSS 200 M 1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode. Note, however, that the ON time for SVD must be limited to 10 msec per second of operation time. E0C62A33 (Crystal oscillation circuit) (Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35k), CG=25pF, CD=built-in, Ta=25C) Characteristic Symbol Min. Typ. Max. Condition Unit tsta5sec (VSS) Oscillation start voltage Vsta -2.2 V (VSS) tstp10sec Oscillation stop voltage Vstp -2.2 V Including the parasitic capacity inside the IC Built-in capacitance (drain) CD 18 pF f/V VSS=-2.2 to -3.5V Frequency/voltage deviation 5 ppm f/IC Frequency/IC deviation -10 10 ppm f/CG CG=5 to 25pF Frequency adjustment range 35 45 ppm (VSS) Harmonic oscillation start voltage Vhho -3.5 V Between OSC1 and VDD, VSS Rleak Permitted leak resistance 200 M E0C62A33 (CR oscillation circuit) Characteristic Oscillation frequency dispersion Oscillation start voltage Oscillation start time Oscillation stop voltage Symbol fOSC3 Vsta tsta VSS=-2.2 to -3.5V Vstp (Unless otherwise specified: VDD=0V, VSS=-3.0V, RCR=82k, Ta=25C) Min. Typ. Max. Unit Condition -30 430kHz 30 % -2.2 V (VSS) 3 mS -2.2 V (VSS) E0C62A33 (Ceramic oscillation circuit) Characteristic Oscillation start voltage Oscillation start time Oscillation stop voltage 8 (Unless otherwise specified: VDD=0V, VSS=-3.0V, ceramic oscillation: 500kHz, CGC=CDC=100pF, Ta=25C) Symbol Condition Min. Typ. Max. Unit Vsta (VSS) -2.2 V tsta VSS=-2.2 to -3.5V 5 mS Vstp (VSS) -2.2 V E0C6233 BASIC EXTERNAL CONNECTION DIAGRAM COM3 C1 C2 CC CB CA K10 C3 V L1 C4 V L2 P10~P13 V DD SIN I/O O C GX E0C 6233/62L33 SIOF SCLK OSC1 OSC2 C6 V S1 OSC4 N.C. AMPP RESET TEST Vss CP LCD PANEL ~ K00~K03 I + R10 (BZ) R13 (BZ) AMPM R11 N.C. R12 (FOUT) OSC3 R00~R03 1.5V (E0C62L33) or 3.0V (E0C6233) X'tal SOUT O C5 I/O ~ COM3 O I V L3 COM0 I/O P00~P03 SEG39 ~ SEG0 K00~K03 I COM0 ~ SEG39 SEG0 LCD PANEL C1 C2 CC CB CA K10 V L1 P00~P03 V L2 V L3 P10~P13 C3 C4 C5 V DD C GX Piezo LAMP O I SIOF I/O O SCLK SIN OSC1 E0C62A33 SOUT X'tal OSC2 C6 V S1 C GC OSC3 CR AMPM RCR C1~C6 CP OSC4 R00~R03 O R10 (BZ) Drain capacitance 100pF Resistance for 82k CR oscillation 0.1F 3.3F 3.0V RESET R13 (BZ) CDC 2 C DC AMPP 32.768kHz, CI(Max.)=35k 5~25pF 500kHz 100pF R11 Crystal oscillator Trimmer capacitor Ceramic oscillator Gate capacitance R12 (FOUT) X'tal CGX CR CGC R CR 1 + TEST Vss CP 1 Ceramic oscillation Piezo 2 CR oscillation LAMP Note: The above table is simply an example, and is not guaranteed to work. PACKAGE DIMENSIONS Plastic QFP5-100pin 25.60.4 200.1 80 51 140.1 INDEX 31 100 1 30 0.30.1 0.26 2.70.1 0.65 3.4max 19.60.4 50 81 0.150.05 0 12 1.5 2.8 Unit: mm 9 E0C6233 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. (c) Seiko Epson Corporation 1999 All right reserved. SEIKO EPSON CORPORATION ELECTRONIC DEVICES MARKETING DIVISION IC Marketing & Engineering Group ED International Marketing Department I (Europe & U.S.A.) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5812 FAX : 042-587-5564 ED International Marketing Department II (Asia) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5814 FAX : 042-587-5110