SEIKO EPSON CORPORATION 1
PF592-05
E0C6233
4-bit Single Chip Microcomputer
Low Voltage
Operation
Products
● Core CPU Architecture
● SVD Circuit/Comparator
● Event Counter
■DESCRIPTION
The E0C6233 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 4-bit core
CPU. It also contains the ROM, RAM, LCD driver, event counter, SVD circuit, stopwatch counter and time base
counter. With wide voltage range and low power consumption, the E0C6233 provides an excellent solution for
the low-power consumption systems with manganese dry cell.
■FEATURES
● CMOS LSI 4-bit parallel processing
● Clock .....................................................32.768kHz (Typ.)/500kHz (Typ.) (selectable by software)
● Instruction set........................................108 instructions
● Instruction cycle time ............................153µsec, 214µsec or 366µsec at 32kHz
(depending on instruction)
10µsec, 14µsec or 24µsec at 500kHz
(depending on instruction)
● ROM capacity .......................................3,072 × 12 bits
● RAM capacity........................................256 × 4 bits
● Input port...............................................5 bits (pull-down resistors are available by mask option)
● Output port ............................................4 bits (general purpose)
2 bits (buzzer output): BZ, BZ
1 bit (lamp output)
1 bit (clock output)
● I/O port ..................................................8 bits
● LCD driver.............................................40 segments × 3 commons/40 segments × 4 commons
(1/3 or 1/4 duty is selectable by mask option)
● Built-in time base counter
● Built-in serial interface ..........................Clock synchronous
● Built-in stopwatch counter
● Built-in watchdog timer
● Event counter........................................8 lines
● Built-in AMP ..........................................Operational AMP for MOS input analog comparator
● Built-in SVD...........................................1.2 ± 0.1V/2.4 ± 0.1V (supply voltage detector)
● Interrupts...............................................External : Input interrupt 2 lines
Internal : Timer interrupt 2 lines
Serial interface interrupt 1 line
● Current consumption ............................E0C62L33 HALT mode (32kHz) : 1.0µA (Typ.)
E0C6233 HALT mode (32kHz) : 1.5µA (Typ.)
E0C62A33 HALT mode (32kHz) : 2.0µA (Typ.)
OPERATING mode (500kHz) : 135µA (Typ.)
● Package ................................................QFP5-100pin (plastic)
Die form
■LINE UP
Model Supply voltage
1.5V (0.9V to 1.7V)
3.0V (1.8V to 3.5V)
3.0V (2.2V to 3.5V)
E0C62L33
E0C6233
E0C62A33
Clock
32kHz (Crystal oscillation)
32kHz (Crystal oscillation)
32kHz (Crystal oscillation) & 500kHz (Ceramic or CR oscillation)
2
E0C6233
■BLOCK DIAGRAM
COM0~3
V
K00~03, K10
P00~03, P10~13
R00~03, R10~13
AMPP
AMPM
DD
OSC4
OSC3
OSC2
OSC1
RESET
SEG0~39 TEST
V
L1~3
CA~CC
V
S1
V
SS
Power
Controller
LCD Driver
RAM
256 words x 4 bits
ROM
3,072 words x 12 bits
OSC
System Reset
Control
Event
Counter
Interrupt
Generator
Input Port
I/O Port
Output Port
Comparator
Timer
Stop Watch
Core CPU E0C6200
SVD
Serial Interface SIN
SOUT
SCLK
SIOF
3
E0C6233
■PIN CONFIGURATION
5180
31
50
INDEX
301
100
81
E0C6233
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
N.C.
N.C.
TEST
N.C.
N.C.
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
No. Pin name 26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
SEG38
SEG39
N.C.
AMPP
N.C.
AMPM
K10
K03
K02
K01
K00
P03
P02
P01
P00
P13
P12
P11
P10
R03
R02
N.C.
R01
R00
R12
No. Pin name 51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
N.C.
N.C.
N.C.
N.C.
R11
R10
R13
VSS
RESET
OSC4
OSC3
VS1
OSC2
OSC1
VDD
VL3
VL2
VL1
CC
CB
CA
COM3
COM2
COM1
COM0
N.C. = No Connection
No. Pin name 76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
SIOF
SCLK
N.C.
N.C.
N.C.
SOUT
SIN
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
No. Pin name
QFP5-100pin
■PIN DESCRIPTION
V
DD
V
SS
V
S1
V
L1
V
L2
V
L3
CA–CC
OSC1
OSC2
OSC3
OSC4
K00–K03, K10
P00–P03, P10–P13
R00–R03
R10
R13
R11
R12
AMPP
AMPM
SEG0–39
COM0–3
SIN
SOUT
SCLK
SIOF
RESET
TEST
Pin name I
I
O
O
O
O
–
I
O
I
O
I
I/O
O
O
O
O
O
I
I
O
O
I
O
I/O
O
I
I
In/Out Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage output terminal
LCD system regulated voltage output terminal (approx. -1.05 V)
LCD system booster output terminal (V
L1
x 2)
LCD system booster output terminal (V
L1
x 3)
Booster capacitor connecting terminal
Crystal oscillation input terminal
Crystal oscillation output terminal
Ceramic or CR oscillation input terminal (Switchable by mask option, 62A33 only)
Ceramic or CR oscillation output terminal (Switchable by mask option, 62A33 only)
Input terminal
I/O terminal
Output terminal
Output terminal (DC or BZ output may be selected by mask option)
Output terminal (DC or BZ output may be selected by mask option)
Output terminal
Output terminal (DC or FOUT output may be selected by mask option)
Analog comparator non-inverted input terminal
Analog comparator inverted input terminal
LCD segment output terminal (Convertible to DC output by mask option)
LCD common output terminal
Serial interface input terminal
Serial interface output terminal
Serial interface clock input/output terminal
Serial interface status output terminal
Initial reset input terminal
Test input terminal
65
58
62
68
67
66
69–71
64
63
61
60
32–36
37–44
45, 46, 48, 49
56
57
55
50
29
31
6–27, 83–100
72–75
82
81
77
76
59
3
Pin No. Function
4
E0C6233
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
E0C6233/62A33
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current *1
Operating temperature
Storage temperature
Soldering temperature / Time
Permissible dissipation *2
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package (QFP5-100pin).
Symbol
VSS
VI
VIOSC
ΣIVSS
Topr
Tstg
Tsol
PD
Value
-5.0 to 0.5
VSS - 0.3 to 0.5
VS1 - 0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
(VDD=0V)
E0C62L33
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current *1
Operating temperature
Storage temperature
Soldering temperature / Time
Permissible dissipation *2
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package (QFP5-100pin).
Symbol
VSS
VI
VIOSC
ΣIVSS
Topr
Tstg
Tsol
PD
Value
-2.0 to 0.5
VSS - 0.3 to 0.5
VS1 - 0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
(VDD=0V)
●Recommended Operating Conditions
E0C6233
Condition
Supply voltage
Oscillation frequency
Symbol
V
SS
f
OSC1
Remark
V
DD
=0V Unit
V
kHz
(Ta=-20 to 70°C)
Max.
-1.8
–
Typ.
-3.0
32.768
Min.
-3.5
–
E0C62L33
Condition
Supply voltage
Oscillation frequency
∗1:
∗2:
When switching to heavy load protection mode. Note, however, that the ON time for SVD in the heavy load protection must be limited
to 10 msec per second of operation time.
The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Symbol
VSS
fOSC1
Remark
VDD=0V
VDD=0V, With software control *1
VDD=0V, When the analog comparator is used
Unit
V
V
V
kHz
(Ta=-20 to 70°C)
Max.
-1.1
-0.9 *2
-1.2
–
Typ.
-1.5
-1.5
-1.5
32.768
Min.
-1.7
-1.7
-1.7
–
E0C62A33
Condition
Supply voltage
Oscillation frequency (1)
Oscillation frequency (2)
Symbol
VSS
fOSC1
fOSC3
Remark
VDD=0V
duty 50±5%
Unit
V
kHz
kHz
(Ta=-20 to 70°C)
Max.
-2.2
–
600
Typ.
-3.0
32.768
500
Min.
-3.5
–
50
5
E0C6233
●DC Characteristics
E0C6233/62A33
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.9•VSS
0.5
16
100
0
-1.8
-0.9
-3
-3
-200
Typ.Min.
0.2•VSS
0.1•VSS
VSS
VSS
0
4
25
-0.5
6.0
3.0
3
3
200
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOL1
IOL2
IOH3
IOL3
IOH4
IOL4
IOH5
IOL5
VIH1=0V
No pull down resistor
VIH2=0V
With pull down resistor
VIH3=0V
With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
VOL1=0.9•VSS
VOL2=0.9•VSS
VOH3=-0.05V
VOL3=VL3+0.05V
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=0.1•VSS
VOL5=0.9•VSS
Condition
K00–03, K10, P00–03, P10–13
SIN, SCLK
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK, AMPP, AMPM
K00–03, K10
P00–03, P10–13
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK, AMPP, AMPM
RESET, TEST
R10, R11, R13
R00–03, R12, P00–03, P10–13
SOUT, SIOF, SCLK
R10, R11, R13
R00–03, R12, P00–03, P10–13
SOUT, SIOF, SCLK
COM0–COM3
SEG0–SEG39
SEG0–SEG39
E0C62L33
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.9•VSS
0.5
10
60
0
-300
-150
-3
-3
-100
Typ.Min.
0.2•VSS
0.1•VSS
VSS
VSS
0
2
12
-0.5
1,400
700
3
3
100
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
Low level output current (1)
Low level output current (2)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOL1
IOL2
IOH3
IOL3
IOH4
IOL4
IOH5
IOL5
VIH1=0V
No pull down resistor
VIH2=0V
With pull down resistor
VIH3=0V
With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
VOL1=0.9•VSS
VOL2=0.9•VSS
VOH3=-0.05V
VOL3=VL3+0.05V
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=0.1•VSS
VOL5=0.9•VSS
Condition
K00–03, K10, P00–03, P10–13
SIN, SCLK
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK, AMPP, AMPM
K00–03, K10
P00–03, P10–13
RESET, TEST
K00–03, K10, P00–03, P10–13
SIN, SCLK, AMPP, AMPM
RESET, TEST
R10, R11, R13
R00–03, R12, P00–03, P10–13
SOUT, SIOF, SCLK
R10, R11, R13
R00–03, R12, P00–03, P10–13
SOUT, SIOF, SCLK
COM0–COM3
SEG0–SEG39
SEG0–SEG39
6
E0C6233
●Analog Circuit Characteristics and Current Consumption
E0C6233 (Normal Mode)
∗1: The SVD circuit and analog comparator are in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
4.0
10.0
Typ.
-1.05
-2.40
1.5
6.0
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
E0C6233 (Heavy Load Protection Mode)
∗1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
34.0
40.0
Typ.
-1.05
-2.40
11.2
14.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
E0C62L33 (Normal Mode)
∗1: The SVD circuit and analog comparator are in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-1.10
100
V
DD
-0.9
20
3
3.0
8.0
Typ.
-1.05
-1.20
1.0
3.0
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT
During operation *
1
Without panel load
7
E0C6233
E0C62L33 (Heavy Load Protection Mode)
∗1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
-1.10
100
V
DD
-0.9
20
3
7.0
18.0
Typ.
-1.05
-1.20
2.0
8.0
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT *
1
During operation *
1
Without panel load
E0C62A33 (Normal Mode)
∗1: The SVD circuit and analog comparator are in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
5.0
15.0
300
Typ.
-1.05
-2.40
2.0
8.0
135
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation at 32kHz *
1
During operation at 500kHz *
1
Without panel load
OSCC="0"
Without panel load
E0C62A33 (Heavy Load Protection Mode)
∗1: The SVD circuit is in the ON status (HVLD="1", SVDON="0"). The analog comparator is in the OFF status.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
35.0
45.0
330
Typ.
-1.05
-2.40
11.5
16.0
130
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
AMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (AMPP)
Inverted input (AMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation at 32kHz *
1
During operation at 500kHz *
1
Without panel load
OSCC="0"
Without panel load
8
E0C6233
●Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-
ing characteristics as reference values.
E0C6233 (Crystal oscillation circuit)
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
18
45
Min.
-1.8
-1.8
-10
35
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤5sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.8 to -3.5V
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62L33 (Crystal oscillation circuit)
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Note, however, that the ON time for SVD must be limited to 10 msec per second of operation time.
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: VDD=0V, VSS=-1.5V, Crystal: C-002R (CI=35kΩ), CG=25pF, CD=built-in, Ta=25°C)
Max.
5
10
-1.7
Typ.
18
45
Min.
-1.1
-1.1(-0.9)*1
-10
35
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
CD
∂f/∂V
∂f/∂IC
∂f/∂CG
Vhho
Rleak
Condition
tsta≤5sec
tstp≤10sec
Including the parasitic capacity inside the IC
VSS=-1.1 to -1.7V (-0.9) *1
CG=5 to 25pF
Between OSC1 and VDD, VSS
(VSS)
(VSS)
(VSS)
E0C62A33 (Crystal oscillation circuit)
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
18
45
Min.
-2.2
-2.2
-10
35
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤5sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-2.2 to -3.5V
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62A33 (CR oscillation circuit)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=82kΩ, Ta=25°C)
Max.
30
3
Typ.
430kHz
Min.
-30
-2.2
-2.2
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC3
Vsta
t
sta
Vstp
Condition
V
SS
=-2.2 to -3.5V (V
SS
)
(V
SS
)
E0C62A33 (Ceramic oscillation circuit)
Unit
V
mS
V
(Unless otherwise specified: VDD=0V, VSS=-3.0V, ceramic oscillation: 500kHz, CGC=CDC=100pF, Ta=25°C)
Max.
5
Typ.Min.
-2.2
-2.2
Characteristic
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
Vsta
tsta
Vstp
Condition
VSS=-2.2 to -3.5V (VSS)
(VSS)
9
E0C6233
E0C
6233/62L33
LCD PANEL
I
O
K00~K03
K10
P00~P03
P10~P13
AMPM
AMPP
R00~R03
R12 (FOUT)
R11
R13 (BZ)
R10 (BZ)
TEST
OSC3
OSC4
RESET
S1V
OSC2
OSC1
CC
L1
SEG0
SEG39
COM0
COM3
LAMP
Piezo
C1
C2
C3
C4
C5
CGX
X'tal
C6
+
1.5V
(E0C62L33)
or
3.0V
(E0C6233)
I/O
V
CB
CA
L2V
L3V
DDV
Vss
~~
CP
SIOF
SIN
SCLK
SOUT
O
O
I
I/O N.C.
N.C.
E0C62A33
LCD PANEL
I
O
∗1
∗2
K00~K03
K10
P00~P03
P10~P13
AMPM
AMPP
R00~R03
R12 (FOUT)
R11
R13 (BZ)
R10 (BZ)
TEST
OSC4
RESET
OSC3
S1V
OSC2
OSC1
CC
L1
SEG0
SEG39
COM0
COM3
LAMP
Piezo
C1
C2
C3
C4
C5
CGX
X'tal
C6
CDC
CGC
CR ∗1∗2
RCR
+
Ceramic oscillation
CR oscillation
3.0V
I/O
V
CB
CA
L2V
L3V
DDV
Vss
~~
CP
SIOF
SIN
SCLK
SOUT
O
O
I
I/O
Unit: mm
20
±0.1
25.6
±0.4
5180
14
±0.1
19.6
±0.4
31
50
INDEX
0.3
±0.1
301
100
81
2.7
±0.1
0.26
3.4
max
2.8
1.5
0°
12°
0.15
±0.05
0.65
X'tal
C
GX
CR
C
GC
C
DC
R
CR
C1~C6
CP
Crystal oscillator
Trimmer capacitor
Ceramic oscillator
Gate capacitance
Drain capacitance
Resistance for
CR oscillation
32.768kHz, CI(Max.)=35kΩ
5~25pF
500kHz
100pF
100pF
82kΩ
0.1µF
3.3µF
■BASIC EXTERNAL CONNECTION DIAGRAM
Note: The above table is simply an example, and is not guaranteed
to work.
■PACKAGE DIMENSIONS
Plastic QFP5-100pin
E0C6233
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
