TLE42794 Low Dropout Fixed Voltage Regulator T LE42794G T LE42794GM T LE42794E Data Sheet Rev. 1.2, 2014-07-03 Automotive Power Low Dropout Fixed Voltage Regulator 1 TLE42794 Overview Features * Output Voltage 5 V 2% * Ouput Current up to 150 mA * Very low Current Consumption * Early Warning * Power-on and Undervoltage Reset with Programmable Delay Time * Reset Low Down to VQ = 1 V * Adjustable Reset Threshold * Very Low Dropout Voltage * Output Current Limitation * Reverse Polarity Protection * Overtemperature Protection * Suitable for Use in Automotive Electronics * Wide Temperature Range from -40 C up to 150 C * Input Voltage Range from -42 V to 45 V * Green Product (RoHS compliant) * AEC Qualified PG-DSO-8 PG-DSO-14 Description The TLE42794 is a monolithic integrated low dropout voltage regulator, especially designed for automotive applications. An input voltage up to 45 V is regulated to an output voltage of 5.0 V. The component is able to drive loads up to 150 mA. It is short-circuit protected by the implemented current limitation and has an integrated overtemperature shutdown. A reset signal is generated for an output voltage VQ,rt of typically 4.65 V. This threshold can be decreased by an external resistor divider. The power-on reset delay time can be programmed by the external delay capacitor. The additional sense comparator provides an early warning function: Any voltage (e.g. the PG-SSOP-14 exposed pad Type Package Marking TLE42794G PG-DSO-8 42794G TLE42794GM PG-DSO-14 42794GM TLE42794E PG-SSOP-14 exposed pad 42794E Data Sheet 2 Rev. 1.2, 2014-07-03 TLE42794 Overview input voltage) can be monitored, an under-voltage condition is indicated by setting the comparator's output to low. If pull-up resistors are desired at the outputs of the reset and the sense comparator, the TLE42694 with integrated pull-up reistors can be used instead of the TLE42794. Dimensioning Information on External Components The input capacitor CI is recommended for compensation of line influences. The output capacitor CQ is necessary for the stability of the control loop. Circuit Description The control amplifier compares a reference voltage to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any oversaturation of the power element. The component also has a number of internal circuits for protection against: * Overload * Overtemperature * Reverse polarity Data Sheet 3 Rev. 1.2, 2014-07-03 TLE42794 Block Diagram 2 Block Diagram Q Error Amplifier Current and Saturation Control Reference Trimming D RO & Reference SO RADJ SI GND Figure 1 Data Sheet AEB01955 Block Diagram 4 Rev. 1.2, 2014-07-03 TLE42794 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment TLE42794G (PG-DSO-8) S RADJ D 1 2 3 4 8 7 6 5 Q SO RO GND AEP01668 Figure 2 Pin Configuration (top view) 3.2 Pin Definitions and Functions TLE42794G (PG-DSO-8) Pin Symbol Function 1 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 2 SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed 3 RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 4 D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 5 GND Ground 6 RO Reset Output open collector output; external pull-up resistor required, respecting values given in Reset Output External Pull-up Resistor to VQ; leave open if the reset function is not needed 7 SO Sense Output open collector output; external pull-up resistor required, respecting values given in Sense Output External Pull-up Resistor to VQ; leave open if the sense comparator is not needed 8 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in "Functional Range" on Page 9 Data Sheet 5 Rev. 1.2, 2014-07-03 TLE42794 Pin Configuration 3.3 Pin Assignment TLE42794GM (PG-DSO-14) RADJ D GND GND GND GND RO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SI GND GND GND Q SO AEP02248 Figure 3 Pin Configuration (top view) 3.4 Pin Definitions and Functions TLE42794GM (PG-DSO-14) Pin Symbol Function 1 RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 2 D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 3, 4, 5, 6 GND Ground connect all pins to PCB and heatsink area 7 RO Reset Output open collector output; external pull-up resistor required, respecting values given in Reset Output External Pull-up Resistor to VQ; leave open if the reset function is not needed 8 SO Sense Output open collector output; external pull-up resistor required, respecting values given in Sense Output External Pull-up Resistor to VQ; leave open if the sense comparator is not needed 9 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in the table "Functional Range" on Page 9 10, 11, 12 GND Ground connect all pins to PCB and heatsink area 13 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 14 SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed Data Sheet 6 Rev. 1.2, 2014-07-03 TLE42794 Pin Configuration 3.5 Pin Assignment TLE42794E (PG-SSOP-14 exposed pad) RADJ n.c. D GND n.c. n.c. RO 14 13 12 11 10 9 8 1 2 3 4 5 6 7 SI I n.c. Q n.c. n.c. SO PinConfig_SSOP-14.vsd Figure 4 Pin Configuration (top view) 3.6 Pin Definitions and Functions TLE42794E (PG-SSOP-14 exposed pad) Pin Symbol Function 1 RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 2, 5, 6 n.c. not connected 3 D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 4 GND Ground connect all pins to PCB and heatsink area 7 RO Reset Output open collector output; external pull-up resistor required, respecting values given in Reset Output External Pull-up Resistor to VQ; leave open if the reset function is not needed 8 SO Sense Output open collector output; external pull-up resistor required, respecting values given in Sense Output External Pull-up Resistor to VQ; leave open if the sense comparator is not needed 9, 10, 12 n.c. not connected 11 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in the table "Functional Range" on Page 9 13 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 14 SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed Data Sheet 7 Rev. 1.2, 2014-07-03 TLE42794 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings1) -40 C Tj 150 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. -40 - 45 V - P_4.1.1 -0.3 - 7 V - P_4.1.2 VD -0.3 - 7 V - P_4.1.3 Tj Tstg -40 - 150 C - P_4.1.4 -50 - 150 C - P_4.1.5 -2 - 2 kV Human Body Model (HBM)2) P_4.1.6 ESD Absorption VESD,HBM VESD,CDM -500 - 500 V Charge Device Model (CDM)3) P_4.1.7 ESD Absorption VESD,CDM -750 - 750 V Charge Device Model (CDM)3) at corner pins P_4.1.8 Input, Sense Input Voltage VI Output, Reset Output, Sense Output Voltage VQ Reset Delay, Reset Threshold Voltage Temperature Junction Temperature Storage Temperature ESD Absorption ESD Absorption 1) not subject to production test, specified by design 2) ESD susceptibility Human Body Model "HBM" according to AEC-Q100-002 - JESD22-A114 3) ESD susceptibility Charged Device Model "CDM" according to ESDA STM5.3.1 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 8 Rev. 1.2, 2014-07-03 TLE42794 General Product Characteristics 4.2 Functional Range Table 2 Functional Range Parameter Symbol VI Output Capacitor's Requirements CQ Input Voltage Values Min. Typ. Max. 5.5 - 45 Unit Note / Test Condition Number V - P_4.2.1 1) P_4.2.2 10 - - F - - - 3 -2) P_4.2.3 -40 - 150 C - P_4.2.4 for Stability Output Capacitor's Requirements ESR(CQ) for Stability Junction Temperature Tj 1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30% 2) relevant ESR value at f = 10 kHz Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Data Sheet 9 Rev. 1.2, 2014-07-03 TLE42794 General Product Characteristics 4.3 Thermal Resistance Table 3 Thermal Resistance Parameter Symbol Values Min. Typ. Max. RthJSP RthJA RthJA - 80 - Junction to Ambient1) Junction to Ambient1) Unit Note / Test Condition Number K/W measured to pin 5 TLE42794G (PG-DSO-8) Junction to Soldering Point1) Junction to Ambient 1) Junction to Ambient 1) 2) P_4.3.1 - 113 - K/W FR4 2s2p board P_4.3.2 - 172 - K/W FR4 1s0p board, footprint only3) RthJA - 142 - K/W FR4 1s0p board, P_4.3.4 300mm2 heatsink area on PCB3) RthJA - 136 - K/W FR4 1s0p board, P_4.3.5 600mm2 heatsink area on PCB3) Junction to Soldering Point1) RthJSP - 27 - K/W measured to group of pins 3, 4, 5, 10, 11, 12 P_4.3.6 Junction to Ambient1) RthJA RthJA - 63 - K/W FR4 2s2p board2) P_4.3.7 - 104 - K/W FR4 1s0p board, footprint only3) P_4.3.8 Junction to Ambient1) RthJA - 73 - K/W FR4 1s0p board, P_4.3.9 300mm2 heatsink area on PCB3) Junction to Ambient1) RthJA - 65 - K/W FR4 1s0p board, P_4.3.10 2 600mm heatsink area on PCB3) P_4.3.3 TLE42794GM (PG-DSO-14) Junction to Ambient 1) TLE42794E (PG-SSOP-14 exposed pad) Junction to Case1) RthJC - 10 - K/W measured to Exposed Pad P_4.3.11 Junction to Ambient1) RthJA RthJA - 47 - K/W FR4 2s2p board2) P_4.3.12 - 145 - K/W FR4 1s0p board, footprint only3) P_4.3.13 Junction to Ambient1) RthJA - 63 - K/W FR4 1s0p board, P_4.3.14 300mm2 heatsink area on PCB3) Junction to Ambient1) RthJA - 53 - K/W FR4 1s0p board, P_4.3.15 600mm2 heatsink area on PCB3) Junction to Ambient 1) 1) not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m Cu, 2 x 35m Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 1 copper layer (1 x 70m Cu). Data Sheet 10 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5 Block Description and Electrical Characteristics 5.1 Voltage Regulator The output voltage VQ is controlled by comparing a portion of it to an internal reference and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the poles/zeros introduced by the integrated circuit. To ensure stable operation, the output capacitor's capacitance and its equivalent series resistor ESR requirements given in the table "Functional Range" on Page 9 have to be maintained. For details see also the typical performance graph "Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ" on Page 14. As the output capacitor also has to buffer load steps it should be sized according to the application's needs. An input capacitor CI is strongly recommended to compensate line influences. Connect the capacitors close to the component's terminals. A protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events. These safeguards contain an output current limitation, a reverse polarity protection as well as a thermal shutdown in case of overtemperature. In order to avoid excessive power dissipation that could never be handled by the pass element and the package, the maximum output current is decreased at input voltages above VI = 22 V. The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator restarts. This leads to an oscillatory behaviour of the output voltage until the fault is removed. However, junction temperatures above 150 C are outside the maximum ratings and therefore significantly reduce the IC's lifetime. The TLE42794 allows a negative supply voltage. In this fault condition, small currents are flowing into the IC, increasing its junction temperature. This has to be considered for the thermal design, respecting that the thermal protection circuit is not operating during reverse polarity conditions. Supply II I Q Regulated Output Voltage IQ Saturation Control Current Limitation C CI Temperature Shutdown BlockDiagram_VoltageRegulator.vsd Figure 5 Data Sheet Bandgap Reference ESR } CQ LOAD GND Voltage Regulator 11 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.2 Electrical Characteristics Voltage Regulator Table 4 Electrical Characteristics Voltage Regulator VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition Number Output Voltage VQ 4.9 5.0 5.1 V 100 A < IQ < 100 mA 6 V < VI < 18 V P_5.2.1 Output Current Limitation IQ,max VQ, load 150 200 500 mA P_5.2.2 -30 -15 - mV Line Regulation steady-state VQ, line - 10 40 mV Dropout Voltage1) Vdr = VI - VQ Vdr - 250 500 mV VQ = 4.8V IQ = 5 mA to 100 mA VI = 6 V VI = 6 V to 32 V IQ = 5 mA IQ = 100 mA Overtemperature Shutdown Threshold Tj,sd 151 - 200 C Tj increasing2) P_5.2.6 Overtemperature Shutdown Threshold Hysteresis Tj,sdh - 15 - C Tj decreasing2) P_5.2.7 - 70 - dB fripple = 100 Hz Vripple = 0.5 Vpp P_5.2.8 Load Regulation steady-state Power Supply Ripple Rejection2) PSRR P_5.2.3 P_5.2.4 P_5.2.5 1) measured when the output voltage VQ has dropped 100mV from the nominal value obtained at VI = 13.5V 2) not subject to production test, specified by design Data Sheet 12 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.3 Typical Performance Characteristics Voltage Regulator Output Voltage VQ versus Junction Temperature TJ Output Current IQ versus Input Voltage VI 01_VQ_TJ.VSD 5,2 02_IQ_VI.VSD 300 V Q = 4.8 V I Q = 5 mA V I = 13.5 V 5,1 250 I Q,max [mA] 4,9 V Q [V] 5 4,8 200 150 100 4,7 50 4,6 0 -40 0 40 80 120 T j = 150 C 0 160 10 Power Supply Ripple Rejection PSRR versus ripple frequency fr 3,5 T j = 25 C I Q = 10 mA C Q = 10 F ceramic [mV] 3 VQ P SRR [d B ] T j = 150 C I Q = 5 mA 4 40 2 1,5 20 1 10 0,5 0 0,01 T j = 25 C 2,5 30 T j = -40 C 0 0,1 1 10 100 1000 0 f [kHz] Data Sheet 40 04_DVQ_DVI.VSD 4,5 03_PSRR_FR.VSD 70 50 30 Line Regulation VQ,line versus Input Voltage VI 80 60 20 V I [V] T j [C] 90 T j = -40 C T j = 25 C 10 20 30 40 V I [V] 13 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics Load Regulation VQ,load versus Output Current IQ Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ 05_DVQ_DIQ.VSD 0 06_ESR_IQ.VSD 100 VI = 13.5 V C Q = 10 F V I = 13.5 V -2 VQ -8 ESR(C Q ) [ ] [mV] -6 Unstable Region 10 -4 T j = -40 T j = 25 C T j = 150 -10 1 Stable Region 0,1 -12 0,01 -14 0 20 40 60 80 0 100 50 100 150 IQ [mA] I Q [mA] Dropout Voltage Vdr versus Output Current IQ Dropout Voltage Vdr versus Junction Temperature Ti 07_VDR_IQ.VSD 300 08_VDR_TJ.VSD 300 I Q = 100 mA 250 T j = 25 C 200 200 T j = -40 C V DR [mV] V DR [mV] 250 T j = 150 C 150 150 100 100 50 50 I Q = 25 mA I Q = 5 mA I Q = 100 A 0 0 0 20 40 60 80 -40 100 40 80 120 160 T j [C] I Q [mA] Data Sheet 0 14 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.4 Current Consumption Table 5 Electrical Characteristics Voltage Regulator VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition Number P_5.4.1 P_5.4.4 Current Consumption Iq = IQ - II Iq - 210 280 A Current Consumption Iq - 240 300 A Iq - 0.7 1 mA IQ = 100 A Tj = 25 C IQ = 100 A Tj 85 C IQ = 10 mA Iq - 3.5 8 mA IQ = 50 mA Iq = IQ - II Current Consumption Iq = IQ - II Current Consumption Iq = IQ - II Data Sheet 15 P_5.4.2 P_5.4.3 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.5 Typical Performance Characteristics Current Consumption Current Consumption Iq versus Output Current IQ (IQ low) Current Consumption Iq versus Output Current IQ 09_IQ_IQ_IQLOW.VSD 1,6 V I = 13.5 V T j = 25 C 1,4 V I = 13.5 V T j = 25 C 10 8 1 I q [mA] I q [mA] 1,2 10_IQ_IQ.VSD 12 0,8 0,6 6 4 0,4 2 0,2 0 0 0 5 10 15 20 25 0 I Q [mA] 20 40 60 80 100 120 I Q [mA] Current Consumption Iq versus Input Voltage VI 11_IQ_VI.VSD 6 5 I q [mA] 4 R LOAD = 100 3 2 1 R LOAD = 50 k 0 0 10 20 30 40 V I [V] Data Sheet 16 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.6 Reset Function The reset function provides several features: Output Undervoltage Reset: An output undervoltage condition is indicated by setting the Reset Output RO to "low". This signal might be used to reset a microcontroller during low supply voltage. Power-On Reset Delay Time: The power-on reset delay time trd allows a microcontoller and oscillator to start up. This delay time is the time frame from exceeding the reset switching threshold VRT until the reset is released by switching the reset output "RO" from "low" to "high". The power-on reset delay time trd is defined by an external delay capacitor CD connected to pin D charged by the delay capacitor charge current ID,ch starting from VD = 0 V. If the application needs a power-on reset delay time trd different from the value given in Power On Reset Delay Time, the delay capacitor's value can be derived from the specified values in Power On Reset Delay Time and the desired power-on delay time: (1) t rd, new C D = ---------------- x 47nF t rd with * * * CD: capacitance of the delay capacitor to be chosen trd,new: desired power-on reset delay time trd: power-on reset delay time specified in this datasheet For a precise calculation also take the delay capacitor's tolerance into consideration. Reset Reaction Time: The reset reaction time avoids that short undervoltage spikes trigger an unwanted reset "low" signal. The reset reaction rime trr considers the internal reaction time trr,int and the discharge time trr,d defined by the external delay capacitor CD (see typical performance graph for details). Hence, the total reset reaction time becomes: (2) t rr = t rd, int + t rr, d with * * * trr: reset reaction time trr,int: internal reset reaction time trr,d: reset discharge Reset Output Pull-Up Resistor RRO: The Reset Output RO is an open collector output requiring an external pull-up resistor. In Table 6 "Electrical Characteristics Reset Function" on Page 19 a minimum value for the external resistor RRO is given. Keep in mind to stay within the values specified for the Reset Output RO in Table 1 "Absolute Maximum Ratings" on Page 8 Data Sheet 17 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics Reset Adjust Function The undervoltage reset switching threshold can be adjusted according to the application's needs by connecting an external voltage divider (RADJ1, RADJ2) at pin RADJ. For selecting the default threshold connect pin RADJ to GND. When dimensioning the voltage divider, take into consideration that there will be an additional current constantly flowing through the resistors. With a voltage divider connected, the reset switching threshold VRT,new is calculated as follows: (3) R ADJ, 1 + R ADJ, 2 V RT, new = ------------------------------------------ x V RADJ, th R ADJ, 2 with * * * VRT,new: the desired new reset switching threshold RADJ1, RADJ2: resistors of the external voltage divider VRADJ,th: reset adjust switching threshold given in Table 6 "Electrical Characteristics Reset Function" on Page 19 Supply I Q Int. Supply Control VDD CQ ID,ch Reset I RO VDST VRADJ,th RRO RO OR RADJ,1 MicroController RADJ I RADJ GND optional ID,dch D BlockDiagram_ResetAdjust.vsd RADJ,2 GND CD Figure 6 Data Sheet Block Diagram Reset Function 18 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics VI t t < trr,total VQ VRT 1V t t rd VD V DU V DRL t t rd VRO V RO,low trr,total trd t rr,total t rd t rr,total 1V t Thermal Shutdown Input Voltage Dip Undervoltage Figure 7 Timing Diagram Reset Table 6 Electrical Characteristics Reset Function Spike at output Overload T i mi n g Di a g ra m_ Re se t . vs VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. 4.5 4.65 4.8 V VQ decreasing P_5.6.1 Output Undervoltage Reset Default Output Undervoltage Reset VRT Switching Thresholds Output Undervoltage Reset Threshold Adjustment Reset Adjust Switching Threshold VRADJ,th 1.26 1.35 1.44 V 3.5 V VQ < 5 V P_5.6.2 Reset Adjustment Range1) VRT,range 3.50 - 4.65 V - P_5.6.3 Data Sheet 19 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics Table 6 Electrical Characteristics Reset Function (cont'd) VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Number Reset Output RO Reset Output Low Voltage VRO,low - 0.1 0.4 V 1 V VQ VRT P_5.6.4 external RRO,ext = 10 k Reset Output External Pull-up Resistor to VQ RRO,ext 10 - - k 1 V VQ VRT ; VRO 0.4 V P_5.6.5 VD trd VDU - - 5 V - P_5.6.6 17 28 39 ms CD = 100 nF P_5.6.7 - 1.8 - V - P_5.6.8 Lower Delay Switching Threshold VDL - 0.45 - V - P_5.6.9 Delay Capacitor Charge Current ID,ch - 6.5 - A VD = 1 V P_5.6.10 Delay Capacitor Reset Discharge Current ID,dch - 70 - mA VD = 1 V P_5.6.11 Delay Capacitor Discharge Time trr, d - 1.9 3 s Calculated Value: trr,d = CD*(VDU - VDL)/ P_5.6.12 Reset Delay Timing Delay Pin Output Voltage Power On Reset Delay Time Upper Delay Switching Threshold Internal Reset Reaction Time Reset Reaction Time trr, int trr, total - 3 7 s - 4.9 10 s ID,dch CD= 100 nF CD = 0 nF 2) P_5.6.13 Calculated Value: trr, total = trr, int + trr,d CD = 100 nF P_5.6.14 1) VRT is scaled linearly, in case the Reset Switching Threshold is modified 2) parameter not subject to production test; specified by design Data Sheet 20 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.7 Typical Performance Characteristics Reset Power On Reset Delay Time trd versus Junction Temperature Tj 12_TRD_TJ.VSD 35 C D = 100 nF 30 t rd [ms] 25 20 15 10 5 0 -40 0 40 80 120 160 T j [C] Data Sheet 21 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics 5.8 Early Warning Function The additional sense comparator provides an early warning function: Any voltage (e.g. the input voltage) can be monitored, an undervoltage condition is indicated by setting the comparator's output to low. Sense Input Voltage VSI, High VSI, Low t Sense Output High Low t AED03049 Figure 8 Sense Timing Diagram Table 7 Electrical Characteristics Early Warning Function VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number 1.38 V - P_5.8.1 1.22 1.28 V - P_5.8.2 20 90 160 mV - P_5.8.3 -1 -0.1 1 A - P_5.8.4 Min. Typ. Max. 1.24 1.31 1.16 Sense Comparator Input Sense Threshold High Sense Threshold Low Sense Switching Hysteresis Sense Input Current Data Sheet VSI,high VSI,low VSI,hy ISI 22 Rev. 1.2, 2014-07-03 TLE42794 Block Description and Electrical Characteristics Table 7 Electrical Characteristics Early Warning Function (cont'd) VI = 13.5 V, -40 C Tj 150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition Number VSI < VSI,low VI > 5.5 V RSO,ext = 10 k VI > 5.5 V VSO 0.4 V P_5.8.5 Sense Comparator Output Sense Output Low Voltage VSO,low - 0.1 0.4 V Sense Output External Pull-up Resistor to VQ RSO,ext 10 - - k Data Sheet 23 P_5.8.6 Rev. 1.2, 2014-07-03 TLE42794 Application Information 6 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 6.1 Application Diagram Supply II DI <45V R SI1 CI2 C I1 10 F 100 nF I Q IQ Regulated Output Voltage CQ 10F SI R SO (ESR <3) RADJ R RO TLE42794 R SI2 Load (e .g. Micro Controller) SO RO D GND GND CD 100nF Figure 9 Application Diagram with Selecting Default Reset Thresholds Supply II DI <45V R SI1 CI2 C I1 10 F 100 nF I Q IQ Regulated Output Voltage CQ 10F SI RADJ TLE42794 R SI2 R RADJ1 R SO (ESR <3) R RO RRADJ 2 Load (e .g. Micro Controller) SO RO D CD GND GND 100nF Figure 10 Data Sheet Application Diagram with Reset Thresholds Adjustment 24 Rev. 1.2, 2014-07-03 TLE42794 Application Information 6.2 Selection of External Components 6.2.1 Input Pin The typical input circuitry for a linear voltage regulator is shown in the application diagram above. A ceramic capacitor at the input, in the range of 100 nF to 470 nF, is recommended to filter out the high frequency disturbances imposed by the line e.g. ISO pulses 3a/b. This capacitor must be placed very close to the input pin of the linear voltage regulator on the PCB. An aluminum electrolytic capacitor in the range of 10 F to 470 F is recommended as an input buffer to smooth out high energy pulses, such as ISO pulse 2a. This capacitor should be placed close to the input pin of the linear voltage regulator on the PCB. An overvoltage suppressor diode can be used to further suppress any high voltage beyond the maximum rating of the linear voltage regulator and protect the device against any damage due to over-voltage. The external components at the input are not mandatory for the operation of the voltage regulator, but they are recommended in case of possible external disturbances. 6.2.2 Output Pin An output capacitor is mandatory for the stability of linear voltage regulators. The requirement to the output capacitor is given in "Thermal Resistance" on Page 10. The graph "Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ" on Page 14 shows the stable operation range of the device. TLE42794 is designed to be stable with extremely low ESR capacitors. According to the automotive environment, ceramic capacitors with X5R or X7R dielectrics are recommended. The output capacitor should be placed as close as possible to the regulator's output and GND pins and on the same side of the PCB as the regulator itself. In case of rapid transients of input voltage or load current, the capacitance should be dimensioned in accordance and verified in the real application that the output stability requirements are fulfilled. Data Sheet 25 Rev. 1.2, 2014-07-03 TLE42794 Application Information 6.3 Thermal Considerations Knowing the input voltage, the output voltage and the load profile of the application, the total power dissipation can be calculated: (4) PD = ( VI - VQ ) x IQ + VI x Iq with * * * * * PD: continuous power dissipation VI: input voltage VQ: output voltage IQ: output current Iq: quiescent current The maximum acceptable thermal resistance RthJA can then be calculated: (5) R thJA, max T j, max - T a = --------------------------PD with * * Tj,max: maximum allowed junction temperature Ta: ambient temperature Based on the above calculation the proper PCB type and the necessary heat sink area can be determined with reference to the specification in "Thermal Resistance" on Page 10. Example Application conditions: VI = 13.5 V VQ = 5 V IQ = 50 mA Ta = 105 C Calculation of RthJA,max: PD = (VI - VQ) * IQ + VI * Iq = (13.5 V - 5 V) * 50 mA + 13.5 V * 8 mA = 0.425 W + 0.108 W = 0.533 W RthJA,max = (Tj,max - Ta) / PD = (150 C - 105 C) / 0.533 W = 84.4 K/W As a result, the PCB design must ensure a thermal resistance RthJA lower than 84.4 K/W. By considering TLE42794E (PG-SSOP-14 EP package) and according to "Thermal Resistance" on Page 10, at least 300 mm heatsink area is needed on the FR4 1s0p PCB, or the FR4 2s2p board can be used. Data Sheet 26 Rev. 1.2, 2014-07-03 TLE42794 Application Information 6.4 Reverse Polarity Protection TLE42794 is self protected against reverse polarity faults and allows negative supply voltage. External reverse polarity diode is not needed. However, the absolute maximum ratings of the device as specified in "Absolute Maximum Ratings" on Page 8 must be kept. The reverse voltage causes several small currents to flow into the IC hence increasing its junction temperature. As the thermal shut down circuitry does not work in the reverse polarity condition, designers have to consider this in their thermal design. Data Sheet 27 Rev. 1.2, 2014-07-03 TLE42794 Package Outlines 7 Package Outlines 0.1 2) 0.41+0.1 -0.06 0.2 8 5 1 4 5 -0.2 1) M B 0.19 +0.06 C 8 MAX. 1.27 4 -0.21) 1.75 MAX. 0.175 0.07 (1.45) 0.35 x 45 0.64 0.25 6 0.2 A B 8x 0.2 M C 8x A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01181 Figure 11 Data Sheet PG-DSO-8 28 Rev. 1.2, 2014-07-03 TLE42794 Package Outlines 1.75 MAX. C 1) 4 -0.2 B 1.27 0.64 0.25 0.1 2) 0.41+0.10 -0.06 60.2 0.2 M A B 14x 14 0.2 M C 8 1 7 1) 8.75 -0.2 8MAX. 0.19 +0.06 0.175 0.07 (1.47) 0.35 x 45 A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01230 Figure 12 Data Sheet PG-DSO-14 29 Rev. 1.2, 2014-07-03 TLE42794 0.35 x 45 6 x 0.65 = 3.9 0.25 0.05 2) 0.19 +0.06 0.1 H D 2x H 0.08 C SEATING PLANE 0.64 0.25 D 8 MAX. C 0.65 3.9 0.11) 1.7 MAX. 0.05 0.05 STAND OFF (1.45) Package Outlines 0.2 C 14x 6 0.2 0.15 M C A-B D 14x A 14 1 8 1 7 Index Marking 4.9 0.11) Exposed Diepad B 0.1 H A-B 2x 14 7 8 2.65 0.2 Bottom View 3 0.2 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area Figure 13 PG-SSOP-14 exposed pad Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 30 Dimensions in mm Rev. 1.2, 2014-07-03 TLE42794 Revision History 8 Revision History Revision Date Changes 1.2 2014-07-03 "Application Information" on Page 24 added PG-SSOP-14 EP package outline updated 1.1 2008-10-09 package version TLE42794E in PG-SSOP-14 exposed pad and all related information added In "Overview" on Page 2 package graphic for PG-SSOP-14 exposed pad and product name "TLE42794E" added In Chapter 3 "Pin Assignment TLE42794E (PG-SSOP-14 exposed pad)" on Page 7 and "Pin Definitions and Functions TLE42794E (PG-SSOP-14 exposed pad)" on Page 7 added In "Thermal Resistance" on Page 10 values for TLE42794E added In "Package Outlines" on Page 28 outlines for TLE4279E added 1.0 Data Sheet 2008-09-19 initial version data sheet 31 Rev. 1.2, 2014-07-03 Edition 2014-07-03 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2014 Infineon Technologies AG All Rights Reserved. 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