Single and Dual Single Supply Ultra-Low Noise, Low Distortion Rail-to-Rail Output, Op Amp ISL28191, ISL28291 Features The ISL28191 and ISL28291 are tiny single and dual ultra-low noise, ultra-low distortion operational amplifiers. They are fully specified to operate down to +3V single supply. These amplifiers have outputs that swing rail-to-rail and an input common mode voltage that extends to ground (ground sensing). * 1.7nV/Hz input voltage noise at 1kHz The ISL28191 and ISL28291 are unity gain stable with an input referred voltage noise of 1.7nV/Hz. Both parts feature 0.00018% THD+N at 1kHz. * 3A input bias current The ISL28191 is available in the space-saving 6 Ld UTDFN (1.6mmx1.6mm) and 6 Ld SOT-23 packages. The ISL28291 is available in the 8 Ld SOIC, 10 Ld 1.8mmx1.4mm UTQFN and 10 Ld MSOP packages. All devices are guaranteed over -40C to +125C. Ordering Information PART NUMBER (Note 5) PART MARKING PACKAGE (Pb-free) PKG. DWG. # ISL28191FHZ-T7 (Notes 1, 2) GABJ 6 Ld SOT-23 P6.064A (Note 4) ISL28191FRUZ-T7 (Notes 1, 3) M8 6 Ld UTDFN L6.1.6x1.6A ISL28291FUZ (Note 2) 8291Z 10 Ld MSOP M10.118A ISL28291FUZ-T7 (Notes 1, 2) 8291Z 10 Ld MSOP M10.118A ISL28291FBZ (Note 2) 28291 FBZ 8 Ld SOIC M8.15E ISL28291FBZ-T7 (Notes 1, 2) 28291 FBZ 8 Ld SOIC M8.15E ISL28291FRUZ-T7 (Notes 1, 3) F 10 Ld UTQFN L10.1.8x1.4A * 1kHz THD+N typical 0.00018% at 2VP-P VOUT * Harmonic Distortion -76dBc, -70dBc, fo = 1MHz * 61MHz -3dB bandwidth * 630V maximum offset voltage * 100dB typical CMRR * 3V to 5.5V single supply voltage range * Rail-to-rail output * Ground Sensing * Enable pin (not available in the 8 Ld SOIC package option) * Pb-free (RoHS compliant) Applications * Low noise signal processing * Low noise microphones/preamplifiers * ADC buffers * DAC output amplifiers * Digital scales * Strain gauges/sensor amplifiers * Radio systems * Portable equipment ISL28191EVAL1Z Evaluation Board * Infrared detectors ISL28291EVAL1Z Evaluation Board Related Literature NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pbfree material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD-020. * AN1343: ISL2829xEVAL1Z, ISL5529xEVAL1Z Evaluation Board User's Guide 3. These Intersil Pb-free plastic packaged products employ special Pbfree material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. The part marking is located on the bottom of the part. 5. For Moisture Sensitivity Level (MSL), please see device information page for ISL28191, ISL28291. For more information on MSL please see techbrief TB363. January 26, 2012 FN6156.9 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2006-2008, 2011, 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL28191, ISL28291 Pin Configurations ISL28191 (6 LD 1.6X1.6X0.5 UTDFN) TOP VIEW ISL28191 (6 LD SOT-23) TOP VIEW OUT 1 V- 2 IN+ 3 OUT 1 6 V+ 5 EN IN- 2 5 EN 4 IN- IN+ 3 + + V- 4 7 OUT_B IN-_A 2 6 IN-_B IN+_A 3 V- 4 5 IN+_B EN_A 5 10 V+ 9 OUT_B + + 8 IN-_B 7 IN+_B 6 EN_B IN-_A V+ OUT_B ISL28291 (10 LD UTQFN) TOP VIEW OUT_A 10 9 8 1 7 2 6 IN+_B 2 3 4 5 EN_B IN+_A IN-_B + + EN_A IN+_A 3 OUT_A 1 8 V+ V- IN-_A 2 4 V- ISL28291 (10 LD MSOP) TOP VIEW ISL28291 (8 LD SOIC) TOP VIEW OUT_A 1 - + + - 6 V+ FN6156.9 January 26, 2012 ISL28191, ISL28291 Pin Descriptions ISL28191 (6 Ld SOT-23) ISL28191 (6 Ld UTDFN) 4 2 ISL28291 (8 Ld SOIC) ISL28291 (10 Ld MSOP) ISL28291 (10 Ld UTQFN) PIN NAME 2 (A) 6 (B) 2 (A) 8 (B) 1 (A) 7 (B) ININ-_A IN-_B FUNCTION EQUIVALENT CIRCUIT Inverting input V+ IN- IN+ VCircuit 1 3 3 (A) 5 (B) 3 (A) 7 (B) 2 (A) 6 (B) IN+ IN+_B IN+_B 4 4 3 V- 1 (A) 7 (B) 1 (A) 9 (B) 10 (A) 8 (B) OUT OUT_A OUT_B 3 2 4 1 1 Non-inverting input (See circuit 1) Negative supply Output V+ OUT VCircuit 2 6 6 8 5 5 N/A 3 10 9 V+ 5 (A) 6 (B) 4 (A) 5 (B) EN EN_A EN_B Positive supply Enable BAR pin internal pull-down; Logic "1" selects the disabled state; Logic "0" selects the enabled state. V+ EN VCircuit 3 FN6156.9 January 26, 2012 ISL28191, ISL28291 Absolute Maximum Ratings (TA = +25C) Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/s Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Tolerance Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200V Thermal Resistance (Typical, Note 6) JA (C/W) 6 Ld SOT-23 Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . 230 6 Ld UTDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8 Ld SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 10 Ld UTQFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 143 Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Ambient Operating Temperature Range . . . . . . . . . . . . . .-40C to +125C Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . +125C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3V to 5.5V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 6. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per amplifier. Typical values are at V+= 5V, TA = +25C. Boldface limits apply over the operating temperature range, -40C to +125C. PARAMETER DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT DC SPECIFICATIONS VOS V OS ------------T Input Offset Voltage Input Offset Drift vs Temperature 270 Figure 21 630 840 3.1 V V/C IIO Input Offset Current 35 500 900 nA IB Input Bias Current 3 6 7 A CMIR Common-Mode Input Range 3.8 V CMRR Common-Mode Rejection Ratio VCM = 0V to 3.8V 78 100 dB PSRR Power Supply Rejection Ratio VS = 3V to 5V 74 80 dB AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 1k 90 86 98 dB VOUT Maximum Output Voltage Swing Output low, RL = 1k 0 Output high, RL = 1k, V+ = 5V 20 4.95 4.92 50 80 4.97 mV V IS,ON Supply Current per Amplifier, Enabled 2.6 3.5 3.9 mA IS,OFF Supply Current per Amplifier, Disabled 26 35 48 A IO+ Short-Circuit Output Current RL = 10 95 90 130 mA IO- Short-Circuit Output Current RL = 10 95 90 130 mA VSUPPLY Supply Operating Range V+ to V- 3 4 5.5 V FN6156.9 January 26, 2012 ISL28191, ISL28291 Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1k, AV = -1 unless otherwise specified. Parameters are per amplifier. Typical values are at V+= 5V, TA = +25C. Boldface limits apply over the operating temperature range, -40C to +125C. (Continued) PARAMETER DESCRIPTION CONDITIONS VENH EN High Level Referred to V- VENL EN Low Level Referred to V- IENH EN Pin Input High Current VEN = V+ IENL EN Pin Input Low Current MIN (Note 7) TYP MAX (Note 7) 2 UNIT V 0.8 V 0.8 1.1 1.3 A VEN = V- 20 80 100 nA 61 MHz 0.0001 8 % -76 dBc -70 dBc AC SPECIFICATIONS GBW -3dB Unity Gain Bandwidth RF = 0, CL = 20pF, AV = 1, RL = 10k THD+N Total Harmonic Distortion + Noise f = 1kHz. VOUT + 2VP-P, AV = +1, RL = 10k HD (1MHz) 2nd Harmonic Distortion 2VP-P output voltage, AV = 1 ISO Off-state Isolation fO = 100kHz AV = +1, VIN = 100mVP-P, RF = 0 CL = 20pF, AV = 1, RL = 10k -38 dB X-TALK ISL28291 Channel-to-Channel Crosstalk fO = 100kHz VS = 2.5V, AV = +1, VIN = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k -105 dB PSRR Power Supply Rejection Ratio fO = 100kHz VS = 2.5V, AV = +1, VSOURCE = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k -70 dB CMRR Common Mode Rejection Ratio fO = 100kHz VS = 2.5V, AV = +1, VCM = 1VP-P, RF = 0, CL = 20pF, AV = 1, RL = 10k -65 dB en Input Referred Voltage Noise fO = 1kHz 1.7 nV/Hz in Input Referred Current Noise fO = 1kHz 1.8 pA/Hz 17 V/s 7 ns 12 ns 44 ns 50 ns 190 ns 190 ns ENABLE to Output Turn-on Delay Time; AV = 1, VOUT = 1VDC, RL = 10k, CL = 1.2pF 10% EN - 10% VOUT 330 ns AV = 1, VOUT = 0VDC, RL = 10k, CL = 1.2pF 50 ns 3rd Harmonic Distortion TRANSIENT RESPONSE SR Slew Rate 12 12 tr, tf, Small Signal Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% tr, tf Large Signal Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% Rise Time, tr 10% to 90% Fall Time, tf 90% to 10% tEN AV = 1, VOUT = 0.1VP-P, RL = 10k, CL = 1.2pF ENABLE to Output Turn-off Delay Time; 10% EN - 10% VOUT AV = 2, VOUT = 1VP-P; RL = 10k, RF /RG = 499/499, CL = 1.2pF AV = 2, VOUT = 4.7VP-P; RL = 10k, RF /RG = 499/499, CL = 1.2pF NOTE: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 5 FN6156.9 January 26, 2012 ISL28191, ISL28291 Typical Performance Curves 10 3 CLOSED LOOP GAIN (dB) 2 CLOSED LOOP GAIN (dB) RL = 100k 1 0 -1 -2 RL = 10k -3 -4 RL = 1k V+ = 5V AV = +1 CL = 10pF VOUT = 10mVP-P -5 -6 -7 10k 1M 10M CL = 110pF 6 CL = 57pF 4 CL = 57pF 2 CL = 32pF 0 CL = 10pF -2 -4 -8 -10 10k 100M 100k FREQUENCY (Hz) AV = 1000, RF = 499k, RG = 499 VOUT = 100mVP-P -3 VOUT = 1VP-P -5 -7 -8 10k 40 30 AV = 100, RF = 49.9k, RG = 499 20 AV = 10, RF = 4.42k, RG = 499 V+ = 5V AV = +1 RL = 10k CL = 10pF -6 10 0 100k 1M 10M AV = 1, RF = 0, RG = INF -10 10k 100M 100k 1M 100M 100k OUTPUT IMPEDANCE () INPUT IMPEDANCE () 10M FIGURE 4. FREQUENCY RESPONSE vs CLOSED LOOP GAIN FIGURE 3. -3dB BANDWIDTH vs VOUT 100k V+ = 5V, 3V ENABLED AND DISABLED VSOURCE = 1VP-P 1k 100 10k 1M FREQUENCY (Hz) FREQUENCY (Hz) 10k V+ = 5V RL = 10k VOUT = 100mVP-P 50 GAIN (dB) CLOSED LOOP GAIN (dB) 60 0 -4 100M 70 -1 -2 10M FIGURE 2. GAIN vs FREQUENCY FOR VARIOUS CLOAD VOUT = 1mVP-P VOUT = 10mVP-P 1 1M FREQUENCY (Hz) FIGURE 1. GAIN vs FREQUENCY FOR VARIOUS RLOAD 2 CL = 20pF V+ = 5V AV = +1 RL = 10k VOUT = 10mVP-P -6 RL = 100 100k 8 100k 1M 10M FREQUENCY (Hz) FIGURE 5. INPUT IMPEDANCE vs FREQUENCY 6 100M 10k V+ = 5V, 3V VSOURCE = 1VP-P 1k 100 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 6. DISABLED OUTPUT IMPEDANCE vs FREQUENCY FN6156.9 January 26, 2012 ISL28191, ISL28291 Typical Performance Curves (Continued) 100 10 0 -10 VSOURCE = 1V -20 10 -30 CMRR (dB) OUTPUT IMPEDANCE () V+ = 5V, 3V VSOURCE = 0.1V -40 -50 -60 1 V+ = 5V AV = +1 RL = 10k CL = 10pF VOUT = 100mVP-P -70 -80 0.10 10k 100k 1M 10M -90 -100 1k 100M 10k 100k FIGURE 7. ENABLED OUTPUT IMPEDANCE vs FREQUENCY 0 -10 PSRR (dB) -20 0 V+ = 5V AV = +1 RL = 10k CL = 10pF VOUT = 100mVP-P -30 -40 PSRR+ -50 -60 PSRR+ PSRR- -70 -80 -100 1k -10 VP-P = 1V -20 VP-P = 10mV -30 VP-P = 100mV -40 -50 V+ = 5V AV = +1 RL = 10k CL = 10pF -60 -70 -90 10k 100k 1M FREQUENCY (Hz) 10M -80 10k 100M 100k 1M 10M 100M 1G FREQUENCY (Hz) FIGURE 10. OFF ISOLATION vs FREQUENCY FIGURE 9. PSRR vs FREQUENCY 0.1 -30 V+ = 5V RL = 10k -40 RF = 0, AV = 1 VOUT = 2VP-P 400Hz TO 22kHz FILTER THD + NOISE (%) -50 CROSSTALK (dB) 100M FIGURE 8. CMRR vs FREQUENCY OFF ISOLATION (dB) 10 10M 1M FREQUENCY (Hz) FREQUENCY (Hz) -60 -70 VP-P = 1V -80 -90 0.01 0.001 -100 -110 -120 10k 100k 1M 10M FREQUENCY (Hz) 100M 1G FIGURE 11. CHANNEL TO CHANNEL CROSSTALK vs FREQUENCY 7 0.0001 0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k FREQUENCY (Hz) FIGURE 12. THD+N vs FREQUENCY FN6156.9 January 26, 2012 ISL28191, ISL28291 Typical Performance Curves (Continued) 1 INPUT VOLTAGE NOISE (nV/Hz) 0.1 THD +NOISE (%) 10 V+ = 5V AV = +1 RL = 10k FREQUENCY = 1kHz FILTER = 400Hz TO 22kHz 0.01 0.001 0.0001 0 0.5 1.0 1.5 2.0 VOUT (VP-P) 2.5 3.0 1 0.1 3.5 10 100 1k 10k 100k FREQUENCY (Hz) FIGURE 13. THD+N @ 1kHz vs VOUT FIGURE 14. INPUT REFERRED NOISE VOLTAGE vs FREQUENCY 5 100 10 V+ = 5V AV = +1 RL = 10k CL = 10pF VIN = 1VDC EN INPUT 4 VOLTS (V) CURRENT NOISE (pA/Hz) 1 3 2 ENABLE DISABLE ENABLE 1 OUTPUT 1 0.1 1 10 100 1k 10k 0 100k -1 0 1 FREQUENCY (Hz) FIGURE 15. INPUT REFERRED NOISE CURRENT vs FREQUENCY 0.08 0.8 0.06 0.6 VOUT 0.4 VIN VOUT 0.04 0.02 VIN 0 -0.02 V+ = 2.5V AV = +1 RL = 10k VOUT = 100mVP-P -0.04 -0.06 -0.08 0 20 40 60 80 100 120 TIME (ns) 4 0.2 0 -0.2 V+ = 2.5V AV = +2 RF = RG = 499 RL = 10k VOUT = 1VP-P -0.4 -0.6 140 160 FIGURE 17. SMALL SIGNAL STEP RESPONSE 8 3 FIGURE 16. ENABLE/DISABLE TIMING LARGE SIGNAL (V) SMALL SIGNAL (V) 2 TIME (s) 180 200 -0.8 0 100 200 300 400 500 TIME (ns) 600 700 800 FIGURE 18. LARGE SIGNAL (1V) STEP RESPONSE FN6156.9 January 26, 2012 ISL28191, ISL28291 Typical Performance Curves (Continued) 3 3.5 VOUT VIN CURRENT (mA) LARGE SIGNAL (V) 3.1 1 0 -1 V+ = 2.5V AV = +2 RF = RG = 499 RL = 10k VOUT = 4.7VP-P -2 -3 0 400 MEDIAN 2.9 2.7 2.5 MIN 2.3 2.1 1.7 800 1200 TIME (ns) 1600 1.5 -40 2000 -20 0 20 40 60 80 TEMPERATURE (C) -3.0 MAX MAX -3.4 400 IBIAS+ (A) VOS (V) 500 MEDIAN 300 200 -3.6 MEDIAN -3.8 -4.0 100 MIN -4.2 MIN 0 -4.4 -100 -200 -40 -20 0 20 40 60 80 100 -4.6 -40 120 -20 0 TEMPERATURE (C) FIGURE 21. VOS vs TEMPERATURE, VS = 2.5V -3.2 800 n = 100 -3.6 MAX 100 120 n = 100 600 MEDIAN 400 -4.0 IIO (nA) -3.8 MIN -4.2 MEDIAN 200 MAX 0 -4.4 -4.6 -200 -4.8 -5.0 -40 20 40 60 80 TEMPERATURE (C) FIGURE 22. I BIAS+ vs TEMPERATURE, VS = 2.5V -3.4 IBIAS- (A) 120 n = 100 -3.2 600 -3.0 100 FIGURE 20. SUPPLY CURRENT vs TEMPERATURE, VS = 2.5V ENABLED, RL = INF n = 100 700 MAX 1.9 FIGURE 19. LARGE SIGNAL (4.7V) STEP RESPONSE 800 n = 100 3.3 2 MIN -20 0 20 40 60 80 TEMPERATURE (C) 100 FIGURE 23. IBIAS- vs TEMPERATURE, VS = 2.5V 9 120 -400 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 FIGURE 24. I IO vs TEMPERATURE, VS = 2.5V FN6156.9 January 26, 2012 ISL28191, ISL28291 Typical Performance Curves (Continued) 160 82 n = 100 150 MAX 130 PSRR (dB) CMRR (dB) MAX 80 140 120 110 n = 100 MEDIAN 100 78 MEDIAN 76 MIN 74 90 80 72 MIN 70 -40 -20 0 20 40 60 80 100 70 -40 120 -20 0 TEMPERATURE (C) 60 80 100 120 60 n = 100 55 4.985 45 VOUT (mV) 4.980 MEDIAN 4.975 4.970 40 MAX 35 30 25 MEDIAN 20 4.965 15 MIN 4.960 -40 n = 100 50 MAX VOUT (V) 40 FIGURE 26. PSRR vs TEMPERATURE 1.5V TO 2.5V FIGURE 25. CMRR vs TEMPERATURE, VCM = 3.8V, VS = 2.5V 4.990 20 TEMPERATURE (C) -20 0 20 40 60 80 100 120 10 -40 MIN -20 0 40 60 80 100 120 FIGURE 28. NEGATIVE VOUT vs TEMPERATURE, RL = 1k VS = 2.5V FIGURE 27. POSITIVE VOUT vs TEMPERATURE, RL = 1k VS = 2.5V VCM OVERHEAD TO SUPPLY RAILS (V) 20 TEMPERATURE (C) TEMPERATURE (C) 1.2 1.0 0.8 INPUT VOLTAGE TO THE POSITIVE RAIL (V+ - VCM) 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -60 INPUT VOLTAGE TO THE NEGATIVE RAIL (V- + VCM) -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140 FIGURE 29. INPUT COMMON MODE VOLTAGE vs TEMPERATURE 10 FN6156.9 January 26, 2012 ISL28191, ISL28291 Applications Information Using Only One Channel Product Description The ISL28291 is a dual channel op amp. If the application only requires one channel when using the ISL28291, the user must configure the unused channel to prevent it from oscillating. Oscillation can occur if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 31). The ISL28191 and ISL28291 are voltage feedback operational amplifiers designed for communication and imaging applications requiring low distortion, very low voltage and current noise. Both parts feature high bandwidth while drawing moderately low supply current. They use a classical voltage-feedback topology, which allows them to be used in a variety of applications where currentfeedback amplifiers are not appropriate because of restrictions placed upon the feedback element used with the amplifier. - Enable/Power-Down The ISL28191 and ISL28291 amplifiers are disabled by applying a voltage greater than 2V to the EN pin, with respect to the V- pin. In this condition, the output(s) will be in a high impedance state and the amplifier(s) current will be reduced to 13A/Amp. By disabling the part, multiple parts can be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pin. The EN pin also has an internal pulldown. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Both parts have additional back-to-back diodes across the input terminals (as shown in Figure 30). In pulse applications where the input Slew Rate exceeds the Slew Rate of the amplifier, the possibility exists for the input protection diodes to become forward biased. This can cause excessive input current and distortion at the outputs. If overdriving the inputs is necessary, the external input current must never exceed 5mA. An external series resistor may be used to limit the current, as shown in Figure 30. R + FIGURE 30. LIMITING THE INPUT CURRENT TO LESS THAN 5mA 11 + FIGURE 31. PREVENTING OSCILLATIONS IN UNUSED CHANNELS Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Low impedance ground plane construction is essential. Surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7F tantalum capacitor in parallel with a 0.01F capacitor has been shown to work well when placed at each supply pin. For good AC performance, parasitic capacitance should be kept to a minimum, especially at the inverting input. When ground plane construction is used, it should be removed from the area near the inverting input to minimize any stray capacitance at that node. Carbon or Metal-Film resistors are acceptable with the Metal-Film resistors giving slightly less peaking and bandwidth because of additional series inductance. Use of sockets, particularly for the SOIC package, should be avoided if possible. Sockets add parasitic inductance and capacitance, which will result in additional peaking and overshoot. Current Limiting The ISL28191 and ISL28291 have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. This is why the output short circuit current is specified and tested with RL = 10. FN6156.9 January 26, 2012 ISL28191, ISL28291 Power Dissipation It is possible to exceed the +125C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1: (EQ. 1) T JMAX = T MAX + ( JA xPD MAXTOTAL ) where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated in Equation 2: V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x -----------------------R L (EQ. 2) where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 FN6156.9 January 26, 2012 ISL28191, ISL28291 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION January 18, 2012 FN6156.9 CHANGE Page 1 - Ordering Information Update: Added Eval Board ISL28191EVAL1Z Changed micro TDFN and TQFN to Ultra matching POD Description Added SOT-23 Note Page 10 - Typical Performance Curves: Added Figure 29 - INPUT COMMON MODE VOLTAGE vs TEMPERATURE Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL28191,ISL28291 To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff FITs are available from our website at: http://rel.intersil.com/reports/search.php 13 FN6156.9 January 26, 2012 ISL28191, ISL28291 Package Outline Drawing P6.064A 6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10 1.90 0-3 0.95 D 0.08-0.20 A 5 6 4 PIN 1 INDEX AREA 2.80 3 1.60 3 0.15 C D 2x 5 (0.60) 1 3 2 0.20 C 2x 0.40 0.05 B SEE DETAIL X 3 0.20 M C A-B D TOP VIEW 2.90 5 END VIEW 10 TYP (2 PLCS) 0.15 C A-B 2x H 1.14 0.15 1.45 MAX C SIDE VIEW 0.10 C 0.05-0.15 SEATING PLANE DETAIL "X" (0.25) GAUGE PLANE 0.450.1 4 (0.60) (1.20) NOTES: (2.40) (0.95) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 3. Dimension is exclusive of mold flash, protrusions or gate burrs. 4. Foot length is measured at reference to guage plane. 5. This dimension is measured at Datum "H". 6. Package conforms to JEDEC MO-178AA. (1.90) TYPICAL RECOMMENDED LAND PATTERN 14 FN6156.9 January 26, 2012 ISL28191, ISL28291 Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN) A A E 6 B 6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE 4 MILLIMETERS D PIN 1 REFERENCE 2X 0.15 C 1 2X L6.1.6x1.6A 3 MIN NOMINAL MAX NOTES A 0.45 0.50 0.55 - A1 - - 0.05 - 0.127 REF A3 0.15 C A1 TOP VIEW e 1.00 REF 4 6 L CO.2 D2 SYMBOL - b 0.15 0.20 0.25 - D 1.55 1.60 1.65 4 D2 0.40 0.45 0.50 - E 1.55 1.60 1.65 4 E2 0.95 1.00 1.05 - 0.50 BSC e - DAP SIZE 1.30 x 0.76 L 3 1 b 6X 0.10 M C A B E2 0.25 0.30 0.35 Rev. 1 6/06 NOTES: 1. Dimensions are in mm. Angles in degrees. BOTTOM VIEW 2. Coplanarity applies to the exposed pad as well as the terminals. Coplanarity shall not exceed 0.08mm. DETAIL A 6X 0.10 C 3. Warpage shall not exceed 0.10mm. 0.08 C 4. Package length/package width are considered as special characteristics. 5. JEDEC Reference MO-229. A3 SIDE VIEW C SEATING PLANE 6. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. 0.1270.008 0.127 +0.058 -0.008 TERMINAL THICKNESS A1 DETAIL A 0.25 0.50 1.00 0.45 1.00 2.00 0.30 1.25 LAND PATTERN 15 6 FN6156.9 January 26, 2012 ISL28191, ISL28291 Package Outline Drawing M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 0.10 A DETAIL "A" 0.22 0.03 B 6.0 0.20 3.90 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45 4 4 0.43 0.076 1.27 0.25 M C A B SIDE VIEW "B" TOP VIEW 1.75 MAX 1.45 0.1 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.175 0.075 SIDE VIEW "A 0.63 0.23 DETAIL "A" (0.60) (1.27) NOTES: (1.50) (5.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. TYPICAL RECOMMENDED LAND PATTERN 16 FN6156.9 January 26, 2012 ISL28191, ISL28291 Package Outline Drawing L10.1.8x1.4A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 1.80 6 PIN #1 ID A 9 X 0.40 B 1 1 3 10 0.50 6 PIN 1 INDEX AREA 1.40 2 10X 0.20 4 0.10 M C A B 0.05 M C 0.70 8 5 0.10 7 2X 4X 0.30 6 6X 0.40 TOP VIEW BOTTOM VIEW SEE DETAIL "X" 0.10 C MAX. 0.55 C SEATING PLANE 0.08 C (9 X 0.60) 1 (10X 0.20) 3 10 (0.70) SIDE VIEW (0.70) (4X 0.30) 8 C 5 6 0 .1 27 REF 7 (6X 0.40) PACKAGE OUTLINE 0-0.05 TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. JEDEC reference MO-255. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 17 FN6156.9 January 26, 2012 ISL28191, ISL28291 Package Outline Drawing M10.118A (JEDEC MO-187-BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 A 3.0 0.1 0.25 10 DETAIL "X" CAB 0.18 0.05 SIDE VIEW 2 4.9 0.15 3.0 0.1 1.10 Max B PIN# 1 ID 1 2 0.95 BSC 0.5 BSC TOP VIEW Gauge Plane 0.86 0.09 H 0.25 C 33 SEATING PLANE 0.55 0.15 0.10 0.05 0.10 C 0.23 +0.07/ -0.08 0.08 C A B DETAIL "X" SIDE VIEW 1 5.80 4.40 3.00 NOTES: 0.50 0.30 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. Plastic interlead protrusions of 0.25mm max per side are not included. 4. 1.40 5. Dimensions "D" and "E1" are measured at Datum Plane "H". TYPICAL RECOMMENDED LAND PATTERN 6. This replaces existing drawing # MDP0043 MSOP10L. 18 FN6156.9 January 26, 2012