TOSHIBA Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS DUAL J-K FLIP- FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. In accordance with the logic levels applied to the J and K inputs, the outputs change state on the negative going tran- sition of the clock pulse. CLEAR and PRESET are independent of the clock and are accomplished by a low logic level on the corresponding input. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High Speed: fix = E8MHZ(Typ.) at Vog = 5V Low Power Dissipation: log = 4uA(Max.) at Ta = 25C High Noise Immunity: Vi = Van = 28%Vec(Min.) * Output Drive Capability: 10 LSTTL Loads Symmetrical Output impedance: Ilo4! = lo. = 4MA(Min.) * Balanced Propagation Delays: tan = tout * Wide Operating Voltage Range: V,,(opr) = 2V ~ 6V * Pin and Function Compatible with 74LS109 IEC Logic Symbol TC74HC109AP/AF/AFN F FN 1cLR 1 16 Voc i 2 16 2CcLR K 3 4 2d 1cK 4 13. 2K IPR 12, 20K 1a 6 11 2PR a 67 10 20 GND 6 9 20 (TOP VIEW) Pin Assignment Truth Table Inputs Outputs Function CIR | PA! J K | CK | Q a L H x x L H Clear H L x x H L Preset L L xX X H H - H H L H | p] & a, No Change H L - H t r L L H H H H r H L - H H H L fr tm | G, Toggle H H x x qt a, | & No Change X: Dont Care TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 219 TC74HC109AP/AF/AFN C?MOS Logic TC74HC/HCT Series Absolute Maximum Ratings Parameter Symbol Value Unit Supply Voltage Range Veo -0.5-7 Vv DC Input Voltage Vin 0.5 - Veo +05 V DC Output Voltage Vout -0.5~Vo5+05 V Input Diode Current lic +20 mA Qutput Diode Current low #20 mA OC Output Current lour #5 mA DC Vec/Ground Current loc +50 mA Power Dissipation Py 500(DIP)*/180(MFP) mw Storage Temperature Tyg -65 ~ 150 Lead Temperature 10sec Tr 300 C *500mW in the range of Ta = -40C ~ 65C. From Ta = 65C to 85C a derating factor of - 1OmW/C shall be applied until 300mW. Recommended Operating Conditions Parameter Symbol Value Unit Supply Voltage Veo 2~6 y Input Voltage Vin 0~Voo Vv Output Voltage Vour 0-Voeo V Operating Temperature Topr -40 ~ 85 C 0 ~ 1000(Veg = 2.0V} Input Rise and Fall Time tity 0 ~ 500(Veg = 4.5) ns 0 ~ 400(Vo = 6.0V) DC Electrical Characteristics Ta = 25C Ta = -40 ~ 85C Parameter Symbol Test Condition Unit Vee Min Typ. Max. Min. Max. 2.0 15 - - 15 - High-Level _ _ Input Voltage Vin ~ e . - . . . V 2.0 - - 05 - 05 Low-Level Input Voltage Yi 7 a - - ; - V 2.0 19 2.0 - 1.9 - , lon =-20mA | 4.5 44 45 - 44 - High-Level Vou Vin = 6.0 59 6.0 - 59 - v Output Voltage Vin OF Vip lop=-4mA | 4.5 4.18 431 - 413 - lon =-5.2mA | 6.0 5.68 5.80 - 5.63 - 2.0 - 0.0 01 - 01 lope 20pA | 45 - 0.0 04 - 0.1 Low-Level V Vin= 6.0 - 0.0 0.1 - 0.1 Vv Output Voltage OL Vig OF Vi, lo.=4mA | 45 - 0.17 0.26 - 0.33 lo. =5.2mA | 6.0 - 0.18 0.26 - 0.33 Input Leakage Current ly Vin= Voc or GND 6.0 - - 10.1 ~ H0 WA Quiescent Supply Current lec Vin = Veo oF GND 6.0 - - 2.0 - 20.0 220 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. CMOS Logic TC74HC/HCT Series TC74HC109AP/AF/AFN Timing Requirements (Input t, = t, = 6ns) Ta = 25C Ta = -40 ~ 85C Parameter Symbol Test Condition Unit Voc Typ. Limit Limit Minimum Pulse Width tw _ is : te " (CLOCK) wen 6.0 - B 16 Minimum Pulse Width 20 15 % (PR, TER) Wo ~ 45 - 15 19 , 6.0 - 13 16 2.0 - 75 95 Minimum Set-up Time t, - 45 - 15 19 ns 6.0 ~ 13 16 2.0 - 0 0 Minimum Hold Time th - 45 - 0 0 6.0 - 0 0 Minimum Removal Time ' _ o - ) (PR. CTR} _ 60 - 9 i 2.0 - 6 5 Clock Frequency t - 45 - 31 25 MHz 6.0 ~ 36 29 AC Electrical Characteristics (C, = 15pF, Voc = 5V, Ta = 25C) Parameter Symbol Test Condition Min. Typ. Max. Unit Output Transition Time tru - - 6 12 trae Propagation Delay Time tou _ _ {CLOCK - 0, 0) ton 13 26 as Propagation Delay Time tou _ _ (PR, CIR - 0, 0) tout 12 26 Maximum Clock Frequency Imax - 3 683 - MHz AC Electrical Characteristics (C, = 50pF, Input t, = t, = 6ns) Ta = 26C Ta = -40 ~ 85C Parameter Symbol Test Condition Unit Voc Min Typ. Max. Min. Max. ' 2.0 - 30 15 - 95 Output Transition Time i - 45 - 8 15 - 19 THE 6.0 - 7 13 - 16 Propagation Delay Time tou 20 ~ 50 160 ~ 190 i - 45 ~ 16 30 - 38 ns (CLOCK - Q, 0) tone 60 _ 13 26 _ 32 Propagation Delay Time too - is - *. _ e (PR, CLR - Q, 0) toa 60 - 3 26 ~ 32 . 2.0 6 17 - - Maximum Clock fax _ 45 31 59 _ 25 _ MHz Frequency 6.0 36 67 - 29 - input Capacitance Cy ~ - 5 10 ~ 10 . Power Dissipation Capacitance Cop (1) - - 4 - - ~ p Note (1) Cap is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: loctopy = Cep * Voc * fin + loo/2(per F/F) TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 221 TC74HC109AP/AF/AFN C?MOS Logic TC74HC/HCT Series pRESET_>_1_ > ____ cem>L Logic Diagram (1/2 package) 222 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.