1
FEATURES
APPLICATIONS
SYS_IN
L1
SM1
PGND1
PGND2
SM2
L2
AGND0
SM3
FB3
L3
SM3SW
OUT
SIM
OUT
GPIO1
USB
GPIO2
LDO_PM
PWM
AC
RED
BAT
GREEN
BAT
BLUE
TMR
SCLK
ISET1
SDAT
DPPM
INT
TS
RESPWRON
RTC_OUT
TRSTPWON
HOT_RST
LDO1
LDO0
LDO3
LDO35_REF
VIN_LDO35
LDO4
ADC_REF
AGND2
ANLG1
ANLG2
LDO5
GPIO3
GROUNDPAD
AGND1
VIN_LDO02
PGND3
VIN_SM2
VIN_SM1
2
11
8
13
10
12
9
6
7
5
3
4
14
38
41
36
39
37
40
42
34
35
33
32
31
30
27
29
25 282624232219 21201817
LED_PWM
LDO2
48 47 434446 4549505154 5256 5355
1
1615
QFN56-Pin,7x7mmPackage
(TopView-NotToScale)
TPS65820
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.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
SINGLE-CELL Li-ION BATTERY- AND POWER-MANAGEMENT IC
•HOST INTERFACE•BATTERY CHARGER – Host can set system parameters andaccess system status using I
2
C interface– Complete charge management solution forsingle Li-Ion/Li-Pol cell with thermal – Interrupt function with programmablefoldback, dynamic power management and masking signals system status modifictionpack temperature sensing, supporting up to hostto 1.5-A max charge current
– 3 GPIO ports, programmable as drivers,– Programmable charge parameters for AC integrated A/D trigger or buck convertersadapter and USB port operation standby mode control•INTEGRATED POWER SUPPLIES– A total of 9 LDOs are integrated:
•PDAs– Six adjustable output LDOs (1.25-V to
•Smart Phones3.3-V)
•MP3s– Two fixed-voltage LDOs (3.3-V)
•Internet Appliances– One fixed-voltage, always-on LDO
•Handheld Devices(3.3-V)
– One RTC backup supply with lowleakage (3.1-V)– Two 600-mA output current, 0.6-V to 3.4-Vprogrammable dc/dc buck converters withenable, standby mode operation, andautomatic low-power mode setting•DISPLAY FUNCTIONS
– Two open-drain PWM outputs withprogrammable frequency and duty cycle.Can be used to control keyboard backlight,vibrator, or other external peripheralfunctions
– RGB LED driver with programmableflashing period and individual R/G/Bbrightness control– Constant-current white LED driver, withprogrammable current level, brightnesscontrol, and overvoltage protection candrive up to 6 LEDs in series configuration•SYSTEM MANAGEMENT
– Dual input power path function with inputcurrent limiting and OVP protection– POR function with programmable maskingmonitors all integrated supplies outputs– Software and hardware reset functions– 8-channel integrated A/D samples systemparameters with single conversion, peakdetection, or averaging operating modesspacer1
spacer
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
DESCRIPTION
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
The TPS65820 provides an easy to use, fully integrated solution for handheld devices, integrating chargemanagement, multiple regulated power supplies, system management and display functions, in a smallthermally-enhanced 7-mm ×7-mm package. The high level of integration enables typical board area spacesavings of 70% when compared to equivalent discrete solutions, while implementing a high-performance andflexible solution, portable across multiple platforms. If required, an external host may control the TPS65820 viaI
2
C interface, with access to all integrated systems. The I
2
C enables setting output voltages, current thresholds,and operation modes. Internal registers have a complete set of status information, enabling easy diagnostics,and host-controlled handling of fault conditions. The TPS65820 can operate in stand-alone mode, with noexternal host control, if the internal power-up defaults are compatible with the system requirements
AVAILABLE OPTIONS
(1)
T
J
DEVICES
(2) (3) (4)
MARKING
– 40 °C to 125 °C TPS65820RSH TPS65820
(1) For the most current package and ordering information, see the Package Option Addendum at the endof this document, or see the TI Web site at www.ti.com .(2) The RSH package is available in tape and reel. Add suffix R (TPS65820RSHR) to order quantities of2000 parts per reel. Add suffix T (TPS65820RSHT) to order quantities of 250 parts per reel.(3) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of totalproduct weight, and is suitable for use in specified lead-free soldering processes. In addition, thisproduct uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb)above 0.1% of total product weight.(4) Other power-up sequences and default power-up states for the supplies can be implemented uponrequest. Consult factory for available options
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FUNCTIONAL BLOCK DIAGRAM
RTC_OUT
AC
BAT
OUT
USB
TMR
ISET1
TS
I2CINTERFACE
ANDINTERRUPT
CONTROLLER
INT
SDAT
SCLK
RESET
CONTROLLER
HOT_RST
RESPWRON
TRSTPWON
L1
PGND1
SM2
L2
L3
SM3
SIM
RED
BLUE
GREEN
SYS_IN
1.25V-3.3V
150 mA
LDO1
1.25V-3.3V
150 mA
LDO2
LDO3 1.224V-4.4V
100 mA
VIN_ LDO35
1.224V-4.4V
100 mA
LDO4
LDO35_REF
ANLG1
ANLG2
GPIO1
GPIO2
3.3V
10 mA
LDO_PM
FB3
BAT
OUT
ADC_REF
GPIO3
AGND2
PGND3
VIN_SM1
VIN_ SM2
PGND2
VIN_LDO12
DPPM
PWM
1.224V-4.4V
100 mA
LDO5
AGND1
LED_PWM
3.3V
150 mA
LDO0
AGND0
LDO3,4,5
LDO0,1,2
CONTROL
LOGIC
PWM
DRIVER
RGB
DRIVER
WHITELED
DRIVER
DISPLAY ANDI /O
GPIO’S
OUT
SM1
8 CHANNEL
MUX
A/D
CONVERTER
6 INTERNAL
CHANNELS
SM3_SW
2.6V/3.1V
8 mA
POWERPATH
CONTROL
LINEAR
CHARGER
0.6-1.8V
600 mA
1.0V-3.4V
600 mA
LDO_PM
CHARGE
MANAGEMENT
DC/DC
HOSTINTERFACE AND
SEQUENCING
ADC
AGND2
REFERENCE
SYSTEM
INTERNAL BIAS OUT
OUT
OUT
TPS65820
SIM,RTCLDOS
SYSTEM
POWER
ON/OFF
OUT
AGND1AGND1
AGND1
OUT
AGND1
AGND1
AGND1
OUT
AGND1
BAT
AGND1
AGND 0, AGND 1 AND AGND 2PINSSHORTEDTOEACHOTHERINSIDETPS 65800. ALL AGNDPINS AREINTERNALLY CONNECTEDTO
THETPS 65800 THERMAL PAD ANDSUBSTRATE .
PGND1, PGND 3 ANDPGND 3PINS ARENOTCONNECTEDTOEACHOTHERORTOTHETPS 65800 SUBSTRATE / POWERPAD
DISPLAY ANDI /O
OUT
1.8V/3V
8mA
TPS65820
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.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Figure 1. TPS65820 Simplified Block Diagram
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
AC and USB with respect to AGND1 – 0.3 to 18ANLG1, ANLG2 with respect to AGND2 – 0.3 to V(OUT)V(OUT) with respect to AGND1 5VIN_LDO12, VIN_LDO35, LDO3, LDO4, LDO5 with respect to AGND2 – 0.3 to V(OUT)LDO35_REF, ADC_REF with respect to AGND2 – 0.3 to smaller of: 3.6 or V(OUT)SIM, RTC_OUT with respect to AGND1 – 0.3 to smaller of: 3.6 or V(OUT)SM1, L1, VIN_SM1 with respect to PGND1 – 0.3 to V(OUT) VSM2, L2, VIN_SM2 with respect to PGND2 – 0.3 to V(OUT)SM3, L3 with respect to PGND3 – 0.3 to 29SM3SW with respect to PGND3 – 0.3 to V(OUT)FB3 with respect to PGND3 – 0.3 to 0.5All other pins (except AGND and PGND), with respect to AGND1 – 0.3 to V(OUT)AGND2, AGND0, PGND1, PGND2, PGND3 with respect to AGND1 – 0.3 to +0.3Input Current, AC pin 2750Input Current, USB pin 600Output continuous current, OUT pin 3000 mAOutput conitnuous current, BAT pin – 3000Continuous current at L1, PGND1, L2, PGND2 1800T
A
Operating free-air temperature – 40 to 85T
J
Maximum junction temperature 125
°CT
STG
Storage temperature – 65 to 150Lead temperature 1,6 mm (1/16-inch) from case for 10 seconds 260ESD rating, all pins 1.5 kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
T
A
≤55 °C DERATING FACTORPACKAGE θ
JA
POWER RATING ABOVE T
A
= 55 °C
RSH
(1) (2)
21.7 °C/W 3.22 W 0.046 W/ °C
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cupad on the board. This is connected to the ground plane by a via matrix.(2) The RSH package MSL Level : HIR3 at 260 °C
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RECOMMENDED OPERATING CONDITIONS
TPS65820
www.ti.com
.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
MIN MAX UNIT
AC and USB with respect to AGND1 4.35 16.5
(1)
VANLG1,ANLG2 with respect to AGND2 0 2.6 VVIN_LDO35 with respect to AGND2 Greater of : 3.6 V OR minimum input 4.7voltage required for LDO/converterVIN_LDO12 with respect to AGND1 4.7operation outside dropout region
VVIN_SM1 with respect to PGND1 4.7VIN_SM2 with respect to PGND2 4.7SM3 with respect to PGND3 28 VT
A
Operating free-air temperature – 40 85 °CT
J(op)
Junction temperature, functional operation assured – 40 125 °CT
J
Junction temperature, electrical characteristics assured 0 125 °C
(1) Thermal operating restrictions are reduced or avoided if input voltage does not exceed 5 V.
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ELECTRICAL CHARACTERISTICS – I
2
C INTERFACE
tsu(STOP)
t(BUF)
STOP
START
19873
2
19873
2
ACK
ACK
SCL
SCL
SDA
SDA
tsu(STA)
START
tr
STOP
th(STA) th(DAT)
tsu(DAT)
SCL
SDA
tw(H) tw(L)
tf
trtf
th(DAT)
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in figure (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
2
C TIMING CHARACTERISTICS
t
R
SCLK/SDATA rise time 300t
F
SCLK/SDATA fall time 300 nst
W(H)
SCLK pulse width high 600t
W(L)
SCLK Pulse Width Low 1.3 µst
SU(STA)
Setup time for START condition 600t
H(STA)
START condition hold time after which first clock pulse is generated 600t
SU(DAT)
Data setup time 100 nst
H(DAT)
Data hold time 0t
SU(STOP)
Setup time for STOP condition 600t
(BUF)
Bus free time between START and STOP condition 1.3 µsFSCL Clock Frequency 400 kHz
I
2
C INTERFACE LOGIC LEVELS
V
IH
High level input voltage 1.3 6
VV
IL
Low level input voltage 0 0.6I
H
Input bias current 0.01 µA
Figure 2. I
2
C Timing
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ELECTRICAL CHARACTERISTICS – SYSTEM SEQUENCING AND OPERATING MODES
TPS65820
www.ti.com
.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
QUIESCENT CURRENT
BAT pin current, sleepI
BAT(SLEEP)
Input power not detected, V(BAT) = 4.2 V, Sleep mode set 370 µAmode setBAT pin current, charge Charger function enabled by I
2
C, termination detected, inputI
BAT(DONE)
3µAterminated power detected and selectedBAT pin current, charge Charger function disabled by I
2
C, termination not detected,I
BAT(CHGOFF)
3µAfunction OFF input power detected and selectedCharger function disabled by I
2
C, termination not detected,AC or USB pin current,I
INP(CHGOFF)
input power detected and selected. All integrated supplies 200 µAcharge function OFF
and drivers OFF, no load at OUT pin.
UNDER-VOLTAGE LOCKOUT
Internal UVLO detection NO POWER mode set at V(OUT) < V
UVLO
,V
UVLO
– 3% 2.5 3% Vthreshold V(OUT) decreasingUVLO detectionV
UVLO_HYS
V(OUT) increasing 120 mVhysteresis
UVLO detection deglitcht
DGL(UVLO)
Falling voltage only 5 mstime
SYSTEM LOW VOLTAGE THRESHOLD
Minimum system voltage System voltage V(SYS_IN) decreasing, SLEEP mode set ifV
LOW_SYS
0.97 1 1.03 Vdetection threshold V(SYS_IN) < V
LOW_SYS
Minimum system voltageV
HYS(LOWSYS)
V(SYS_IN) increasing 50 mVdetection hysteresisMinimum system voltage
V(SYS_IN) decreasing, valid only for initial power-up, seet
DGL(HOTPLUG)
detection hotplug 650 msstate machine diagramdeglitch timeMinimum system voltaget
DGL(LOWSYS)
V(SYS_IN) decreasing, hotplug deglitch time expired 5 msdetection deglitch time
THERMAL FAULT
T
SHUT
Thermal shutdown Increasing junction temperature 165 °CThermal shudownT
HYS(SHUT)
Decreasing junction temperature 30 °Chysteresis
INTEGRATED SUPPLY POWER FAULT DETECTION
Power good fault Falling output voltage, applies to all integrated supply outputs.V
PGOOD
84% 90% 96%detection threshold Referenced to the programmed output voltage valuePower good fault Rising output voltage, applies to all integrated supply outputs.V
HYS(PGOOD)
3% 5% 7%detection hysteresis Referenced to V
PGOOD
threshold
HOT RESET FUNCTION
V
HRSTON
Low level input voltage RESET mode set at V( HOT_RESET) < V
HRSTON
0.4 VV
HRSTOFF
High level input voltage HOT reset not active at V( HOT_RESET) > V
HRSTOFF
1.3 Vt
DGL(HOTRST)
Hot reset input deglitch 5000 µs
SYSTEM RESET – OPEN DRAIN OUTPUT RESPWRON
V
RSTLO
Low level output voltage I
IL
= 10 mA, V( RESPWRON ) < V
RSTLO
0 0.3 VI
TRSTPWON
Pullup current source Internally connected to TRSTPWRON pin 0.9 1 1.2 µAK
RESET
Reset timer constant T
RESET
= K
RESET
°C
TRSTPWON
1 ms/nF
SEQUENCING DELAYS
t
DLY(D1)
Sequencing delay See sequencing timing diagram 0.24 mst
DLY(D1)
Sequencing delay See sequencing timing diagram 12 ms
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ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOLTAGE DETECTION THRESHOLDS
Input voltage detection AC detected at V(AC) – V(BAT) > V
IN(DT)
;V
IN(DT)
190 mVthreshold USB detected at V(USB) – V(BAT) > V
IN(DT)
Input Voltage removal AC not detected at V(AC) – V(BAT) < V
IN(NDT)
;V
IN(NDT)
125 mVthreshold USB not detected at V(USB) – V(BAT) < V
IN(NDT)
t
DGL(NDT)
Power not detected deglitch 22.5 ms
Supplement detectionV
SUP(DT)
Battery switch ON at V(BAT) – V(OUT) > V
SUP(DT)
60 mVthreshold
Supplement not detectedV
SUP(NDT)
Battery switch OFF at V(BAT) – V(OUT) < V
SUP(NDT)
20 mVthreshold
POWER PATH INTEGRATED MOSFETs CHARACTERISTICS
AC switch dropout voltage V
ACDO
= V(AC) – V(OUT); V(AC) = 4.75-V AC input current limit set to 2.75 AV
ACDO
350 375 mV(typ), I
O(OUT)
= 1 A
V
USBDO
= V(USB) – V(OUT); V(USB) = 4.6 V I(OUT) + I(BAT)= 0.5 A 175 190 mVV
USBDO
USB switch dropout voltage
USB input current limit set to 2.75 A (typ)
I(OUT) + I(BAT)= 0.1 A 35 45 mV
Battery switch dropoutV
BATDODCH
V(BAT): 3 V →V
CH(REG)
, I(BAT) = – 1 A 60 100 mVvoltage, discharge
Battery switch dropoutV
BATDOCH
Charger on, V(BAT): 3 V →4.2 V, I(BAT) = 1 A 60 100 mVvoltage, charge
POWER PATH INPUT CURRENT LIMIT
Selected Input current limit,
Selected input switch not in dropout, I
2
C settings : ISET2 = LO,I
INP(LIM1)
80 100 mAapplies to USB input only
PSEL = LO
Selected Input current limit,I
INP(LIM2)
400 500 mASelected input switch not in dropout, I
2
C settings: ISET2 = HI, PSEL = LOapplies to USB input only
Selected Input current limit,
Selected input switch not in dropout, I
2
C settings: ISET2 = HI OR LO,I
INP(LIM3)
applies to either AC or USB 2.75 APSEL = HIinput
SYSTEM REGULATION VOLTAGE
V
SYS(REG)
= V(OUT), DPPM loop not active, selected input current limit notV
SYS(REG)
Output regulation voltage 4.6 4.7 Vreached. Selected input voltage (AC or USB) > 5.1 V
POWER PATH PROTECTION AND RECOVERY FUNCTIONS
Input-to-output short-circuitV
INOUTSH
AC and USB switches set to OFF if V(OUT) < V
INOUTSH
0.6 Vdetection threshold
OUT short-circuit recoveryR
SH(USBSH)
V(OUT) < 1 V, internal resistor connected from USB to OUT 500 Ωpullup resistor
OUT short-circuit recoveryR
SH(ACSH)
V(OUT) < 1 V, internal resistor connected from AC to OUT 500 Ωpullup resistor
Overvoltage detection Rising voltage, overvoltage detected when V(AC) > V
OVP
or
6 6.5 6.8 Vthreshold V(USB) > V
OVPV
OVP
Overvoltage detection
Falling voltage, relative to detection threshold 0.1 Vhysteresis
Battery-to-output short-circuitV
BATOUTSH
BAT switch set to OFF if V(BAT) – V(OUT)> V
BATOUTSH
200 mVdetection threshold
Battery-to-ouput short-circuit V
(DPPM)
< 1V, t
BLK(SHBAT)
= K
BLK(SHBAT)
×C
DPPM,
C
DPPM
capacitor is connectedK
BLK(SHBAT)
1 mS/nFblanking time constant from DPPM pin to AGND1
OUT short-circuit recovery V
(BAT)
– V
(OUT)
> V
BATOUTSH
,I
SH(BAT)
10 mApullup current source Internal current source connected between OUT and BAT
BAT short-circuit recovery V
(BAT)
< 1V,R
SHBAT)
1 k Ωresistor Internal resistor connected from OUT to BAT
Internal resistor connected from BAT to AGND1 when battery is not detectedR
DCH(BAT)
BAT pulldown resistor 500 Ωby ANLG1
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ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT (Continued)
V(OUT)*1.2
500 kW
IO(BAT) +K(SET) V(SET)
RSET
IO(PRECHG) +V(PRECHG) K(SET)
RSET
I(TERM) +V(TERM) K(SET)
RSET
TPS65820
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.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER PATH TIMING CHARACTERISTICS, DPPM AND THERMAL LOOPS NOT ACTIVE, R
TMR
= 50 k Ω
t
BOOT
Boot-up time Measured from input power detection 120 200 300 ms
No USB: measured from V(AC) – V(BAT) < V
IN(NDT)
, USBt
SW(ACBAT)
Switching from AC to BAT 50 µsdetected: CE = LO (after CE hold-off time)
No AC: measured from V(USB) – V(BAT) < V
IN(NDT)
, USBt
SW(USBBAT)
Switching from USB to BAT 50 µsdetected: CE = LO (after CE hold-off time)
t
SW(PSEL)
Switching from USB to AC 50 µsToggling I
2
C PSEL bit
Switching from AC to USB or USB tot
SW(ACUSB)
AC power removed or USB power removed 100 µsAC
BATTERY REMOVAL DETECTION
V
NOBATID
Battery ID resistor detection ID resistor not detected at V(OUT) – V(ANLG1) < V
NOBATID
0.5 V
Deglitch time for battery removalt
DGL(NOBAT)
0.6 1.2 msdetection
00, V
(OUT)
: 2.5 V to 4.4 V
Set via I
2
C bits (BATID1,
µA01 10BATID2) ADC_WAIT registerI
O(ANLG1)
ANLG1 pullup current
10 50
11 60
Total accuracy 25% 25%
FAST CHARGE CURRENT, V(OUT) > V(BAT) + 0.1 V, V(BAT) > V
LOWV
I
O(BAT)
Charge current range 100 1500 mA
11, 100% scaling 2.475 2.5 2.525
10, 75% scaling 1.875 1.9 1.925V
SET
= V(ISET1),V
SET
Battery charge current set voltage V(ISET1_1, ISET1_0) =
01, 50% scaling 1.225 1.25 1.275
00, 25% scaling 0.575 0.6 0.625
100 mA < I
O(BAT)
≤1 A 350 400 450K
SET
Battery charge current set factor
1 mA < I
O(BAT)
≤100 mA 100 400 1000
PRECHARGE CURRENT, V(OUT) > V(BAT) + 0.1 V, V
BATSH
< V(BAT) < V
LOWV
, t < t
(PRECHG)
I
O(PRECHG)
Precharge current range 10 150 mA
V
PRECHG
Precharge set voltage V
PRECHG
= V(ISET1) 220 250 270 mV
V
LOWV
Precharge to fast-charge transition Fast charge at V(BAT) > V
LOWV
2.8 3 3.2 V
Deglitch time for fast charge tot
DGL(PRE)
Decreasing battery voltage, R
TMR
= 50 k Ω22.5 msprecharge transition
CHARGE REGULATION VOLTAGE, V(OUT) > V
O(BATREG)
+ 0.1V
4.2
VVoltage options, selection via I
2
C
4.356V
O(BATREG)
Battery charge voltage
Accuracy, T
A
= 25 °C – 0.5% 0.5%
Total accuracy – 1% 1%
CHARGE TERMINATION, V(BAT) > V
RCH
, VOLTAGE REGULATION MODE SET
I
TERM
Charge termination current range 10 150 mA
11, 100% scaling 240 260 280
10, 75% scaling 145 160 175Battery termination detection set V
TERM
= V(ISET1),V
TERM
mVvoltage (ISET1_1, SET1_0) =
01, 50% scaling 90 110 130
00, 25% scaling 40 60 75
t
DGL(TERM)
Deglitch time for termination detection V(ISET1) < V
TERM
, R
TMR
= 50 k Ω22.5 ms
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ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT (Continued)
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BATTERY RECHARGE DETECTION
V
RCH
New charge cycle starts if V(BAT) < V
O(BATREG)
– V
RCH
, afterRecharge threshold voltage 80 100 130 mVtermination was detected
t
DGL(RCH)
Deglitch time for recharge detection R
TMR
= 50 k Ω22.5 ms
DPPM FUNCTION
V
DPPM
DPPM regulation point range V
(DPPM)
= R
DPPM
×K
DPPMM
x I
O(DPPM)
2.6 4.4 V
I
O(DPPM)
DPPM pin current source AC or USB present 95 100 105 µA
K
DPPM
DPPM scaling factor 1.139 1.15 1.162
Status bit set indicating DPPM loop active after deglitch time,t
DGL(DPPM)
DPPM de-glitch time 500 µsR
TMR
= 50 k Ω
PACK TEMPERATURE SENSING
V
LTF
Low temperture threshold Pack low temperature fault at V(TS) > V
LTF
2.465 2.500 2.535 V
V
HTF
High temperture threshold Pack low temperature fault at V(TS) < V
HTF
0.485 0.500 0.515 V
I
O(TS)
Temperature sense current source Thermistor bias current 18.8 20 21.2 µA
Deglitch time for temperature fault R(TMR) = 50 k Ω,t
DLG(TFAULT)
22.5 msdetection V(TS) > V
LTF
OR V(TS) < V
HTF
CHARGE AND PRECHARGE SAFETY TIMER
Charge safety timer programmed Safety timer range, thermal/DPPM loop not active,t
CHG
3 5 10 hoursvalue t
CHG
= R
TMR
×K
TMR
K
TMR
Charge timer set factor 0.313 0.360 0.414 s/ Ω
Total elapsed time when DPPM or fast charge on, t
CHGADD
is the maximum add-on time added tot
CHGADD
2 t
CHG
hoursthermal loop are active t
CHG
Precharge safety timer programmed Pre charge safety timer range, thermal/DPPM loop not active,t
PRECHG
18 30 60 minvalue t
PRECHG
= K
PRE
×R
TMR
×K
TMR
K
PRE
Precharge timer set factor 0.09 0.1 0.11
Total elapsed time when DPPM or Precharge on, t
PCHGADD
is the maximum add-on time added to 2 ×t
PCHGADD
hoursthermal loop are active t
PRECHG
t
PRECHG
R
TMR
External timer resistor limits 30 100 k Ω
Internal resistor connected from OUT to BAT after safety timerR
TMR(FLT)
Timer fault recovery pullup resistor 1 k Ωtimeout
THERMAL REGULATION LOOP
Charge current decreasesd and timer extended when T
J
>T
THREG
Temperature regulation limit 115 135 °CT
THREG
CHARGER THERMAL SHUTDOWN
T
THCHG
Charger thermal shutdown Charger turned off when T
J
> T
THCHG
150 °C
T
THCHGHYS
Charger thermal shutdown hysteresis 30 °C
10 Submit Documentation Feedback Copyright © 2006 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65820
ELECTRICAL CHARACTERISTICS – LINEAR REGULATORS
TPS65820
www.ti.com
.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SELECTABLE OUTPUT VOLTAGE LDO ’ S : LDO1, LDO2
I
(LDO1,2)
= – 1 mA 15Quiescent current, either LDO1 orI
Q(LDO12)
I
Q(LDO12)
= I(VIN_LDO02) µALDO2 enabled, LDO0 disabled
I
(LDO1,2)
= – 150 mA 160
I
O(LDO1,2)
Output current range 150 mA
Available output voltages:V
O(LDO1,2)
VOutput voltage, selectable via I
2
C.
TYP = 1.25, 1.5, 1.8, 2.5,2.85, 3, 3.2, 3.3
Dropout voltage, 150 mA load 300 mVV
O(LDO1,2)
LDO1, LDO2 output voltage
Total accuracy, V(VIN_LDO02) = 3.65 V – 3% 3%
Line regulation, 100 mA load,
– 1% 1%V(VIN_LDO02): V
(LDO1,2)TYP
+ 0.5 V →4.7 V
Load regulation, load: 10 mA →150 mA
– 1.5% 1.5%V(VIN_LDO02) > V
O(LDO1,2) TYP
+ 0.5V
P
SR(LDO12)
PSRR at 20 kHz 150-mA load at output, V(VIN_LDO02) – V
O(LDO1,2)
= 1 V 40 dB
LDO1 and -2 short-circuit currentI
SC(LDO1,2)
Output grounded 300 mAlimit
R
DCH(LDO1,2)
Discharge resistor 300 ΩLDO disabled by I
2
C command
I
LKG(LDO1,2)
Leakage current LDO off 2 µA
SIM LINEAR REGULATOR
I
Q(SIM)
Quiescent current Internally connected to OUT pin 20 µA
I
O(SIM)
Output current range 8 mA
Available output voltages:
VOutput voltage, selectable via I
2
C.
V
O(SIM)TYP
= 1.8 or 3
Dropout voltage, 8-mA load 0.2 V
Total accuracy, V(OUT): 3.2 V to 4.7 V, 8 mA – 5% 5%V
O(SIM)
SIM LDO output voltage
Load regulation, load: 1 mA →8 mA,
– 3% 3%V(OUT) > V
O(SIM) TYP
+ 0.5 V
Line regulation, 5 mA load, V(OUT):
– 2% 2%V
O(SIM) TYP
+ 0.5 V →4.7 V
I
SC(SIM)
Short-circuit current limit Output grounded 20 mA
I
LKG(SIM)
Leakage current LDO off 1 µA
PROGRAMMABLE OUTPUT VOLTAGE LDO ’ S: LDO3, LDO4, LDO5
Quiescent current, only one ofI
Q(LDO35)
I
Q(LDO35)
= I(VIN_LDO35) 70 µALDO3, LDO4, LDO5 is enabled
I
O(LDO35)
Output current range 100 mA
Available output voltages :V
O(LDO35)TYP
= 1.224 V to VOutput voltage, selectable via I
2
C
4.46 V, 25 mV steps
Dropout voltage, 100-mA load 240 mV
Total accuracy, 100 mA load V
(VIN_LDO35)
= 5 V – 3% 3%V
O(LDO35)
LDO3, LDO4, LDO5 output voltage
Load regulation,
V(VIN_LDO35) > V
O(LDO35)TYP
+ load: 1 mA →50 mA – 1% 1%0.5 V
Line regulation, 10 mA load,
– 1% 1%V(VIN_LDO35): V
O(LDO35)TYP
+ 0.5 V →4.7 V
I
SC(LDO35)
Short-circuit current limit Output grounded 250 mA
PSR
(LDO35)
PSRR at 10 kHz V(VIN_LDO35) > V
O(LDO3,5)
+ 1 V, 50 mA load at output 40 dB
R
DCH(LDO35)
Discharge resistor 400 ΩLDO is disabled by I
2
C command
I
LKG(LDO35)
Leakage current LDO off 1 µA
Copyright © 2006 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS65820
ELECTRICAL CHARACTERISTICS – LINEAR REGULATORS (continued)
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RTC_OUT LINEAR REGULATOR
I
Q(RTC_OUT)
Quiescent current for RTC LDO Internally connected to OUT pin 20 µA
I
O(RTC_OUT)
Output current range 8 mA
Available output voltages:
VOutput voltage value, selectable via I
2
C.
2.6 V or 3.1 V
Dropout voltage, I(RTC_OUT) = – 8 mA 200 mV
Total accuracy, V(OUT): 2 V to 4.7 V, 8 mA load,
– 5% 5%V
O(RTC_OUT)
RTC_OUT output voltage sleep mode not set
Load regulation, load: 1 mA →8 mA, 2 V < V(OUT) < 4.7
– 3% 3%V
Line regulation, 5 mA load
– 2% 2%V(OUT): 2 V →4.7 V
I
SH(RTC_OUT)
Short-circuit current limit V(RTC_OUT) = 0 V 20 mA
T
J
= 85 °C 880V(RTC_OUT) = 1.5 V,I
LKG(RTC_OUT)
Leakage current nAV(OUT) = 0 V
T
J
= 25 °C 250
LDO0 LINEAR REGULATOR
I(LDO0) = – 1 mA 15Internally connected to VIN_LDO12I
Q(LDO0)
Quiescent current µApin
I(LDO0) = – 150 mA 160
I
O(LDO0)
Output current range 150 mA
Fixed output voltage value 3.3 V
Dropout voltage, I(LDO0) = – 150 mA 300 mV
Total accuracy – 3% 3%V
O(LDO0)
Output voltage
Line regulation, V(OUT): V
O(LDO0)
+ 0.5 →4.7 V, I(LDO0) =
– 1% 1%– 100 mA
Load regulation, I(LDO0) = – 10 mA →– 150 mA – 1.5% 1.5%
PSR
(LDO0)
PSRR at 20 kHz 150-mA load at output, V(VIN_LDO12) – V
O(LDO1,2)
= 1 V 40 dB
I
SC(LDO0)
Short-circuit current limit V(LDO0) = 0 V 300 mA
I
LKG(LDO0)
Leakage current LDO off 1 µA
LDO_PM LINEAR REGULATOR
I
Q(LD0_PM)
Output current range 20 mA
Fixed output voltage value, V(OUT) > 4 V 3.3 V
V
O(LDO_PM)
Output voltage Dropout voltage, I(LDOPM) = – 12 mA 0.5 0.7 V
Total accuracy – 5% 5%
I
LKG(LDOPM)
Leakage current LDO off 1 µA
12 Submit Documentation Feedback Copyright © 2006 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65820
ELECTRICAL CHARACTERISTICS – SWITCHED MODE SM1 STEP-DOWN CONVERTER
TPS65820
www.ti.com
.............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
Over recommended operating conditions (typical values at T
J
= 25 °C), V
O(SM1)
= 1.24 V, application circuit as in Figure 3(unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
Q(SM1)
= I(VIN_ SM1), no output load Not switching 10I
Q(SM1)
Quiescent current for SM1 µASM1 OFF, set via I
2
C 0.1I
O(SM1)
Output current range 600 mAAvailable outputvoltages: V
O(SM1)TYP
=Output voltage, selectable via I
2
C, standby OFF 0.6 V to 1.8 V,adjustable in 40 mVsteps
VAvailable outputvoltages: V
SBY(SM1)
=V
O(SM1)
= V
SBY(SM1)
, output voltage range, standby ON 0.6 V to 1.8 V,V
O(SM1)
Output voltage, PWM mode
adjustable in 40 mVstepsTotal accuracy, V
O(SM1)TYP
= V
SBY(SM1)
= 1.24 V,
– 3% 3%V(VIN_SM1) = 3 V to 4.7 V; 0 mA ≤I
O(SM1)
≤600 mALine regulation, V(VIN_SM1): 3 V →4.7 V,
0.027 %/VI
O(SM1)
= 10 mALoad regulation, V(VIN_SM1) = 4.7 V,
0.139 %/AI
O(SM1)
: 60 mA →540 mAP-channel MOSFETR
DSON(PSM1)
V(VIN_SM1) = 3.6 V, 100% duty cycle set 310 500 m Ωon-resistanceI
LKG(PSM1)
P-channel leakage current 0.1 µAN-channel MOSFETR
DSON(NSM1)
V(VIN_SM1) = 3.6 V, 0% duty cycle set 220 330 m Ωon-resistanceI
LKG(PSM1)
N-channel leakage current 5 µAI
LIM(SM1)
P- and N-channel current limit 3 V < V(VIN_SM1) < 4.7 V 900 1050 1200 mAf
S(SM1)
Oscillator frequency PWM mode set 1.3 1.5 1.7 MHzV(VIN_SM1) = 4.2 V, PWM mode, I
O(SM1)
= 300 mA,EFF
(SM1)
Efficiency 90%V
O(SM1)
= 3 VConverter OFF →ON, V
O(SM1)
: 5% →95% of targett
SS(SM1)
Soft start ramp time 750 µsvaluet
DLY(SM1)
GPIO1 pin programmed as SM1 converter enableConverter turn-on delay 170 µscontrol. Measured from V(GPIO1): LO →HI
Copyright © 2006 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TPS65820
ELECTRICAL CHARACTERISTICS – SWITCHED MODE SM2 STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS – GPIOs
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Over recommended operating conditions (typical values at T
J
= 25 °C), V
O(SM1)
= 1.24 V, application circuit as in Figure 3(unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Not 10I
Q(SM2)
= I(VIN_ SM2), no output load
switchingI
Q(SM2)
Quiescent current for SM2 µASM2 OFF, set via I
2
C 0.1I
O(SM2)
Output current range 600 mAAvailable outputvoltages: V
O(SM2)TYP
=Output voltage, selectable via I
2
C, standby OFF
1 V to 3.4 V, adjustable
in 80 mV steps
VAvailable outputV
O(SM2)
= V
SBY(SM2)
, output voltage range, standby voltages: V
SBY(SM2)
= 1ON V to 3.4 V, adjustable in80 mV stepsV
O(SM2)
Output voltage
Total accuracy, V
O(SM2)TYP
= V
SM2(SBY)
= 1.8 V,V(VIN_SM2) = greater of [3 V or (V
O(SM2)
+ 0.3 V)] – 3% 3%to 4.7 V; 0 mA ≤I
O(SM2)
≤600 mALine regulation, V(VIN_SM2) = greater of %/V[3 V or (V
O(SM2)
+ 0.3 V)] 0.027to 4.7 V; 0 mA ≤I
O(SM2)
≤600 mALoad regulation, V(VIN_SM2) = 4.7 V,
0.139 %/AI
O(SM2)
: 60 mA →540 mAP-channel MOSFETR
DSON(PSM2)
V(VIN_SM2) = 3.6 V, 100% duty cycle set 310 500 m Ωon-resistanceI
LKG(PSM2)
P-channel leakage current 0.1 µAN-channel MOSFETR
DSON(NSM2)
V(VIN_SM2) = 3.6 V, 0% duty cycle set 220 330 m Ωon-resistanceI
LKG(PSM2)
N-channel leakage current 5 µAI
LIM(SM2)
P- and N-channel current limit 3 V < V(VIN_SM2) < 4.7 V, TPS65820 900 1050 1200 mAf
S(SM2)
Oscillator frequency PWM mode set 1.3 1.5 1.7 MHzV(VIN_SM2) = 4.2 V, I
O(SM2)
= 300 mA,EFF
(SM2)
Efficiency 90%V
O(SM2)
= 3 VConverter OFF →ON, V
O(SM2)
: 5% →95% of targett
SS(SM2)
Soft start ramp time 750 µsvaluet
DLY(SM2)
Converter turn-on delay GPIO2 pin programmed as SM2 converter enable 170 µscontrol. Measured from V(GPIO2): LO →HI
Over recommended operating conditions (typical values at T
J
= 25 °C), application circuit as in Figure 3 (unless otherwisenoted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
GPIO1 – 3
V
OL
Low level output voltage GPIO0 I
OL
= 20 mA 0.5 VI
OGPIO
Low level sink current into GPIO1, 2, 3 V(GPIOn) = V(OUT) 20 mAV
IL
Low level input voltage 0.4 VI
LKG(GPIO)
Input leakage current V(GPIOn) = V(OUT) 1 µA
14 Submit Documentation Feedback Copyright © 2006 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65820