ISSI IS71VPCF32XS04 3.0 Volt-Only Flash & SRAM COMBO with Stacked Multi-Chip Package (MCP) -- 32 Mbit Simultaneous Operation Flash Memory and 4 Mbit Static RAM MCP FEATURES * Power supply voltage 2.7V to 3.3V * High performance: PRELIMINARY INFORMATION AUGUST 2002 * Over 100,000 write/erase cycles * Low supply voltage (Vccf 2.5V) inhibits writes * WP/ACC input pin: If VIL, allows protection of boot sectors If VIH, allows removal of boot sector protection If Vacc, program time is reduced by 40% Flash: 70ns maximum access time SRAM: 70ns maximum access time * Package: 73-ball BGA * Operating Temperature: -40C to +85C * Boot sector: Top or Bottom FLASH FEATURES * Power Dissipation: SRAM FEATURES (4 Mb density) * Power Dissipation: Read Current at 1 Mhz: 7 mA maximum Read Current at 5 Mhz: 18 mA maximum Sleep Mode: 5 A maximum * Simultaneous Read and Write Operations: Zero latency between read and write operations; Data can be programmed or erased in one bank while data is simultaneously being read from the other bank * Low-Power Mode: A period of no activity causes flash to enter a low-power state * Erase Suspend/Resume: Suspends of erase activity to allow a read in the same bank * Sector Erase Architecture: 8 words of 4k size and 63 words of 32K size (32 Mbit) Any combination of sectors, or the entire flash can be simultaneously erased * Erase Algorithms: Automatically preprograms/erases the flash memory entirely, or by sector * Program Algorithms: Automatically writes and verifies data at specified address * Hidden ROM Region: 64KB with a Factory-serialized secure electronic serial number (ESN), which is accessible through a command sequence * Data Polling and Toggle Bit: Allow for detection of program or erase cycle completion * Ready-Busy output (RY/BY) Detection of program or erase cycle completion (R) Operating: 40 mA maximum Standby: 7 A maximum * * * * Chip Selects: CE1s, CE2s Power down feature using CE1s, or CE2s Data retention supply voltage: 1.5 to 3.3 volt Byte data control: LBs (DQ0-DQ7), UBs (DQ8-DQ15) -- in x16 mode GENERAL DESCRIPTION The flash and SRAM MCP is available in 32 Mbit Flash/4 Mbit SRAM having a data bus of either x8 or x16. The 32 Mbit flash is composed of 2,097,152 words of 16 bits or 4,194,304 bytes of 8 bits. The 4Mb SRAM has 262,144 words of 16 bits or 524,288 bytes of 8 bits. Data lines DQ0DQ7 handle the x8 format, while lines DQ0-DQ15 handle the x16 format. The package uses a 3.0V power supply for all operations. No other source is required for program and erase operations. The flash can be programmed in system using this 3.0V supply, or can be programmed in a standard EPROM programmer. The 32 Mbit flash/4 Mbit SRAM is offered in a 73-pin BGA package. The flash is compatible with the JEDEC Flash command set standard . The flash access time is 70ns or 85ns and the SRAM access time is 70ns or 85ns. The Flash architecture is composed of two banks which allows simultaneous operation on each. Optimized performance can be achieved by first initializing a program or erase function in one bank, then immediately starting a read from the other bank. Both operations would then be operating simultaneously, with zero latency. Copyright (c) 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 1 ISSI IS71VPCF32XS04 (R) MCP BLOCK DIAGRAM VCCf GND A0-A20 RY/BY A0-A20 A-1 WP/ACC RESET CEf I/Of 32-MBIT Flash Memory DQ0-DQ15/A-1 VCCS GND A0-A17 DQ0-DQ15 SA LBs UBs WE OE CE1s CE2s I/Os 4-MBIT Static RAM LOGIC SYMBOL 22 A0-A20, A-1 SA CEf RY/BY CE1s CE2s OE WE 16 or 8 DQ0-DQ15 WP/ACC RESET UBs LBs I/Of I/Os 2 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH MEMORY BLOCK DIAGRAM VCC OE GND BYTE Upper Bank Address A0-A20 Y-Decoder Upper Bank Latches and Control Logic RY/BY A0-A20 X-Decoder A0-A20 RESET WE CE BYTE DQ0-DQ15 DQ0-DQ15 Status STATE CONTROL & COMMAND REGISTER Control WP/ACC DQ0-DQ15 DQ0-DQ15 A0-A20 Lower Bank Address A0-A20 Y-Decoder Lower Bank Latches and Control Logic X-Decoder OE BYTE FLASH BANK ORGANIZATION Organization Type Type A Type B Type C Type D Type E Type F Bank 1 Size 4Mb 8Mb 16Mb 4Mb 8Mb 16Mb Bank 2 Size 28Mb 24Mb 16Mb 28Mb 24Mb 16Mb Boot Block Top Top Top Bottom Bottom Bottom Note: For device part number, see Part Number Logic Diagram or Ordering Information Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 3 ISSI IS71VPCF32XS04 (R) PIN CONFIGURATION (32 Mb Flash and 4 Mb SRAM) PACKAGE CODE: B 73 BALL FBGA (Top View) (8.00 mm x 11.60 mm Body, 0.8 mm Ball Pitch) 1 A B C D E F G H J K L M 2 3 4 5 6 7 8 9 10 NC NC NC NC NC / WE NC A7 LB A3 A6 UB RESET CE2s A19 A12 A15 A2 A5 A18 RY//BY A20 A9 A13 NC NC A1 A4 A17 A10 A14 NC NC NC A0 Vss DQ1 Q DQ6 SA A16 NC CEf OE DQ9 Q DQ3 DQ4 DQ13 NC CE1S DQ0 Q Q DQ10 A8 A11 I/Of Vccf VccS DQ12 DQ7 GND DQ8 DQ2 DQ11 I/Os DQ5 DQ14 Shared NC NC NC NC Flash Only NC NC SRAM Only * DQ15/A-1 PIN DESCRIPTIONS 4 A0-A17 Address Inputs, Common LBs Lower-byte Control(DQ0-DQ7), SRAM A18-A20, A-1 Address Inputs, Flash UBs Upper-byte Control (DQ8-DQ15), SRAM DQ0-DQ15/A-1 Data Inputs/Outputs WP/ACC Write Protect/Acceleration Pin, Flash RESET Reset RY/BY Ready/Busy Output CE1s, CE2s Chip Selects, SRAM SA High Order Address Pin, SRAM (x8) I/Of I/O Configuration, Flash NC No Connection CEf Chip Enable Input, Flash Vccf Power, Flash OE Output Enable Input Vccs Power, SRAM WE Write Enable Input GND Ground I/Os I/O Configuration, SRAM Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) DEVICE BUS OPERATIONS User Bus Operations (Flash=Word mode: I/Of = Vccf, SRAM= Word Mode: I/Os = Vccs) OPERATION(1,3) CE CEf CE CE1s CE2s OE WE SA(6) LB LBs UB UBs DQ0-DQ7 DQ8-DQ15 RESET WP /ACC(5) Full Standby Output Disable Read from Flash(2) Write to Flash Read from SRAM Write to SRAM H H H H L L L L L L H H H H H H X Temporary Sector Group Unprotection(4) Flash Hardware X Reset X Boot Block Sector X Write Protection H X L L H X H X H X L L L L L L X X L H H X L X L X L H H H H H H X X X H X H H L L H H L L L X X X X X X H X H H H H L L H H H L L L X X X X X X X X X X X X X X X X X X X X X H X X X X X X L H L L H L X X X X H X X X X X X L L H L L H X High-Z High-Z High-Z High-Z High-Z High-Z DOUT DOUT DIN DIN DOUT High-Z DOUT DIN High-Z DIN X High-Z High-Z High-Z High-Z High-Z High-Z DOUT DOUT DIN DIN DOUT DOUT High-Z DIN DIN High-Z X H H H H H H H H H H H H H H H H VID(8) X X X X X X X X X X X X X X X X X H X X X L X X X X X X X X X X X X X X X X High-Z High-Z X High-Z High-Z X L L X X X L Notes: 1. 2. 3. 4. 5. Any operations not indicated this column are inhibited. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once. It is also used for the extended sector group protections. WP/ACC = VIL: protection of boot sectors. WP/ACC = VIH: removal of boot sectors protection. WP/ACC = VACC (9V): Program time will reduce by 40%. 6. SA: Don't care or open. 7. L = VIL, H = VIH, X = VIL or VIH. 8. See DC CHARACTERISTICS. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 5 ISSI IS71VPCF32XS04 (R) DEVICE BUS OPERATIONS User Bus Operations (Flash=BYTE mode: I/Of = GND, SRAM= Word Mode: I/Os = Vccs) OPERATION(1,3) CE CEf Full Standby CE1 CE1s CE2s DQ15/A-1 OE WE SA(6) LB LBs UB UBs DQ0-DQ7 DQ8-DQ15 RESET WP/ACC(5) H H X X X X X X X High-Z High-Z H X H X L X X X X X X High-Z High-Z H X H L H X H H X X X High-Z High-Z H X H L H X X X X H H High-Z High-Z H X L H X A-1 H H X X X High-Z High-Z H X L X L A-1 H H X X X High-Z High-Z H X L H X A-1 L H X X X DOUT DOUT H X L X L A-1 L H X X X DOUT DOUT H X L H X A-1 H L X X X DIN DIN H X L X L A-1 H L X X X DIN DIN H X H L H X L H X L L DOUT DOUT H X H H L L H H X X L L H H X X H L L H High-Z DOUT DOUT High-Z H H X X H L H X X L X L L DIN DIN H X H H L L H H X X X X L L X X H L L H High-Z DIN DIN High-Z H H X X Temporary Sector X Group Unprotection(4) X X X X X X X X X X VID(8) X Flash Hardware set X X H X X L X X X X X X X X X X X X High-Z High-Z High-Z High-Z L L X X Boot Block Sector Write Protection X X X X X X X X X X X X L Output Disable Read from Flash (2) Write to Flash Read from SRAM Write to SRAM Re- Notes: 1. 2. 3. 4. 5. Any operations not indicated this column are inhibited.. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once. It is also used for the extended sector group protections. WP/ACC = VIL: protection of boot sectors. WP/ACC = VIH: removal of boot sectors protection. WP/ACC = VACC (9V): Program time will reduce by 40%. 6. LBs, UBs: Don't care or open. 7. L = VIL, H = VIH, X = VIL or VIH. 8. See DC CHARACTERISTICS. 6 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) DEVICE BUS OPERATIONS User Bus Operations (Flash=WORD mode: I/Of = Vccf, SRAM= Byte Mode: I/Os = GND OPERATION(1,3) Full Standby CE CEf CE CE1s CE2s OE WE SA LB LBs(6) UB UBs(6) DQ0-DQ7 DQ8-DQ15 RESET WP /ACC(5) H H X X X X X X High-Z High-Z H X H X L X X X X X High-Z High-Z H X H L H H H X X X High-Z High-Z H X H L H X X X H H High-Z High-Z H X L H X H H X X X High-Z High-Z H X L X L H H X X X High-Z High-Z H X L H X L H X X X DOUT DOUT H X L X L L H X X X DOUT DOUT H X L H X H L X X X DIN DIN H X L X L H L X X X DIN DIN H X H L H L H SA X X DOUT High-Z H X Write to SRAM H Temporary Sector X Group Unprotection(4) L X H X X X L X SA X X X X X DIN X High-Z X H VID X X Flash Hardware Reset X X H X X L X X X X X X X X X X High-Z High-Z High-Z High-Z L L X X Boot Block Sector Write Protection X X X X X X X X X X X L Output Disable Read from Flash(2) Write to Flash Read from SRAM (8) Notes: 1. 2. 3. 4. 5. Any operations not indicated this column are inhibited.. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once. It is also used for the extended sector group protections. WP/ACC = VIL: protection of boot sectors. WP/ACC = VIH: removal of boot sectors protection. WP/ACC = VACC (9V): Program time will reduce by 40%. 6. LBs, UBs: Don't care or open. 7. L = VIL, H = VIH, X = VIL or VIH. 8. See DC CHARACTERISTICS. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 7 ISSI IS71VPCF32XS04 (R) DEVICE BUS OPERATIONS User Bus Operations (Flash=Byte mode: I/Of = GND, SRAM= Byte Mode: I/Os = GND) CE CEf CE1 CE1s CE2s DQ15/A-1 OE WE OPERATION(1,3) Full Standby SA LB LBs(6)UB UBs(6) DQ0-DQ7 DQ8-DQ15 RESET WP/ACC(5) H H X X X X X X X High-Z High-Z H X H X L X X X X X X High-Z High-Z H X H L H X H H X X X High-Z High-Z H X H L H X X X X H H High-Z High-Z H X L H X A-1 H H X X X High-Z High-Z H X L X L A-1 H H X X X High-Z High-Z H X L H X A-1 L H X X X DOUT DOUT H X L X L A-1 L H X X X DOUT DOUT H X L H X A-1 H L X X X DIN DIN H X L X L A-1 H L X X X DIN DIN H X H L H X L H SA X X DOUT High-Z H X Write to SRAM H Temporary Sector X Group Unprotection(4) L X H X X X X X L X SA X X X X X DIN X High-Z X H VID X X Flash Hardware X H X X X X X X X High-Z High-Z L X Reset X X L X X X X X X High-Z High-Z L X Boot Block Sector Write Protection X X X X X X X X X X X X L Output Disable Read from Flash (2) Write to Flash Read from SRAM (8) Notes: 1. 2. 3. 4. 5. Any operations not indicated this column are inhibited. WE can be VIL if OE is VIL, OE at VIH initiates the write operations. Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once. It is also used for the extended sector group protections. WP/ACC = VIL: protection of boot sectors. WP/ACC = VIH: removal of boot sectors protection. WP/ACC = VACC (9V): Program time will reduce by 40%. 6. LBs, UBs: Don't care or open. 7. L = VIL, H = VIH, X = VIL or VIH. 8. See DC CHARACTERISTICS. 8 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH - TOP BOOT SECTOR ADDRESS Sector Sector Address A20-A12 Sector Size KB/KW Type C Type B Type A (x8) Address Range Bank2 Bank2 Bank2 SA0 000000xxx 64/32 000000h-00FFFFh 000000h-007FFFh Bank2 Bank2 Bank2 SA1 000001xxx 64/32 010000h-01FFFFh 008000h-00FFFFh Bank2 Bank2 Bank2 SA2 000010xxx 64/32 020000h-02FFFFh 010000h-017FFFh Bank2 Bank2 Bank2 SA3 000011xxx 64/32 030000h-03FFFFh 018000h-01FFFFh Bank2 Bank2 Bank2 SA4 000100xxx 64/32 040000h-04FFFFh 020000h-027FFFh Bank2 Bank2 Bank2 SA5 000101xxx 64/32 050000h-05FFFFh 028000h-02FFFFh Bank2 Bank2 Bank2 SA6 000110xxx 64/32 060000h-06FFFFh 030000h-037FFFh Bank2 Bank2 Bank2 SA7 000111xxx 64/32 070000h-07FFFFh 038000h-03FFFFh Bank2 Bank2 Bank2 SA8 001000xxx 64/32 080000h-08FFFFh 040000h-047FFFh Bank2 Bank2 Bank2 SA9 001001xxx 64/32 090000h-09FFFFh 048000h-04FFFFh Bank2 Bank2 Bank2 SA10 001010xxx 64/32 0A0000h-0AFFFFh 050000h-057FFFh Bank2 Bank2 Bank2 SA11 001011xxx 64/32 0B0000h-0BFFFFh 058000h-05FFFFh Bank2 Bank2 Bank2 SA12 001100xxx 64/32 0C0000h-0CFFFFh 060000h-067FFFh Bank2 Bank2 Bank2 SA13 001101xxx 64/32 0D0000h-0DFFFFh 068000h-06FFFFh Bank2 Bank2 Bank2 SA14 001110xxx 64/32 0E0000h-0EFFFFh 070000h-077FFFh Bank2 Bank2 Bank2 SA15 001111xxx 64/32 0F0000h-0FFFFFh 078000h-07FFFFh Bank2 Bank2 Bank2 SA16 010000xxx 64/32 100000h-10FFFFh 080000h-087FFFh Bank2 Bank2 Bank2 SA17 010001xxx 64/32 110000h-11FFFFh 088000h-08FFFFh Bank2 Bank2 Bank2 SA18 010010xxx 64/32 120000h-12FFFFh 090000h-097FFFh Bank2 Bank2 Bank2 SA19 010011xxx 64/32 130000h-13FFFFh 098000h-09FFFFh Bank2 Bank2 Bank2 SA20 010100xxx 64/32 140000h-14FFFFh 0A0000h-0A7FFFh Bank2 Bank2 Bank2 SA21 010101xxx 64/32 150000h-15FFFFh 0A8000h-0AFFFFh Bank2 Bank2 Bank2 SA22 010110xxx 64/32 160000h-16FFFFh 0B0000h-0B7FFFh Bank2 Bank2 Bank2 SA23 010111xxx 64/32 170000h-17FFFFh 0B8000h-0BFFFFh Bank2 Bank2 Bank2 SA24 011000xxx 64/32 180000h-18FFFFh 0C0000h-0C7FFFh Bank2 Bank2 Bank2 SA25 011001xxx 64/32 190000h-19FFFFh 0C8000h-0CFFFFh Bank2 Bank2 Bank2 SA26 011010xxx 64/32 1A0000h-1AFFFFh 0D0000h-0D7FFFh Bank2 Bank2 Bank2 SA27 011011xxx 64/32 1B0000h-1BFFFFh 0D8000h-0DFFFFh Bank2 Bank2 Bank2 SA28 011100xxx 64/32 1C0000h-1CFFFFh 0E0000h-0E7FFFh Bank2 Bank2 Bank2 SA29 011101xxx 64/32 1D0000h-1DFFFFh 0E8000h-0EFFFFh Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 (x16) Address Range 9 ISSI IS71VPCF32XS04 (R) FLASH - TOP BOOT SECTOR ADDRESS (Continued) Type C Type B Type A Sector Sector Address A20-A12 Bank2 Bank2 Bank2 SA30 011110xxx 64/32 1E0000h-1EFFFFh 0F0000h-0F7FFFh Bank2 Bank2 Bank2 SA31 011111xxx 64/32 1F0000h-1FFFFFh 0F8000h-0FFFFFh Bank1 Bank2 Bank2 SA32 100000xxx 64/32 200000h-20FFFFh 100000h-107FFFh Bank1 Bank2 Bank2 SA33 100001xxx 64/32 210000h-21FFFFh 108000h-10FFFFh Bank1 Bank2 Bank2 SA34 100010xxx 64/32 220000h-22FFFFh 110000h-117FFFh Bank1 Bank2 Bank2 SA35 100011xxx 64/32 230000h-23FFFFh 118000h-11FFFFh Bank1 Bank2 Bank2 SA36 100100xxx 64/32 240000h-24FFFFh 120000h-127FFFh Bank1 Bank2 Bank2 SA37 100101xxx 64/32 250000h-25FFFFh 128000h-12FFFFh Bank1 Bank2 Bank2 SA38 100110xxx 64/32 260000h-26FFFFh 130000h-137FFFh Bank1 Bank2 Bank2 SA39 100111xxx 64/32 270000h-27FFFFh 138000h-13FFFFh Bank1 Bank2 Bank2 SA40 101000xxx 64/32 280000h-28FFFFh 140000h-147FFFh Bank1 Bank2 Bank2 SA41 101001xxx 64/32 290000h-29FFFFh 148000h-14FFFFh Bank1 Bank2 Bank2 SA42 101010xxx 64/32 2A0000h-2AFFFFh 150000h-157FFFh Bank1 Bank2 Bank2 SA43 101011xxx 64/32 2B0000h-2BFFFFh 158000h-15FFFFh Bank1 Bank2 Bank2 SA44 101100xxx 64/32 2C0000h-2CFFFFh 160000h-167FFFh Bank1 Bank2 Bank2 SA45 101101xxx 64/32 2D0000h-2DFFFFh 168000h-16FFFFh Bank1 Bank2 Bank2 SA46 101110xxx 64/32 2E0000h-2EFFFFh 170000h-177FFFh Bank1 Bank2 Bank2 SA47 101111xxx 64/32 2F0000h-2FFFFFh 178000h-17FFFFh Bank1 Bank1 Bank2 SA48 110000xxx 64/32 300000h-30FFFFh 180000h-187FFFh Bank1 Bank1 Bank2 SA49 110001xxx 64/32 310000h-31FFFFh 188000h-18FFFFh Bank1 Bank1 Bank2 SA50 110010xxx 64/32 320000h-32FFFFh 190000h-197FFFh Bank1 Bank1 Bank2 SA51 110011xxx 64/32 330000h-33FFFFh 198000h-19FFFFh Bank1 Bank1 Bank2 SA52 110100xxx 64/32 340000h-34FFFFh 1A0000h-1A7FFFh Bank1 Bank1 Bank2 SA53 110101xxx 64/32 350000h-35FFFFh 1A8000h-1AFFFFh Bank1 Bank1 Bank2 SA54 110110xxx 64/32 360000h-36FFFFh 1B0000h-1B7FFFh Bank1 Bank1 Bank2 SA55 110111xxx 64/32 370000h-37FFFFh 1B8000h-1BFFFFh Bank1 Bank1 Bank1 SA56 111000xxx 64/32 380000h-38FFFFh 1C0000h-1C7FFFh Bank1 Bank1 Bank1 SA57 111001xxx 64/32 390000h-39FFFFh 1C8000h-1CFFFFh Bank1 Bank1 Bank1 SA58 111010xxx 64/32 3A0000h-3AFFFFh 1D0000h-1D7FFFh 10 Sector Size KB/KW (x8) Address Range (x16) Address Range Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH - TOP BOOT SECTOR ADDRESS (Continued) Type C Type B Type A Sector Sector Address A20-A12 Sector Size KB/KW (x8) Address Range (x16) Address Range Bank1 Bank1 Bank1 SA59 111011xxx 64/32 3B0000h-3BFFFFh 1D8000h-1DFFFFh Bank1 Bank1 Bank1 SA60 111100xxx 64/32 3C0000h-3CFFFFh 1E0000h-1E7FFFh Bank1 Bank1 Bank1 SA61 111101xxx 64/32 3D0000h-3DFFFFh 1E8000h-1EFFFFh Bank1 Bank1 Bank1 SA62 111110xxx 64/32 3E0000h-3EFFFFh 1F0000h-1F7FFFh Bank1 Bank1 Bank1 SA63 111111000 8/4 3F0000h-3F1FFFh 1F8000h-1F8FFFh Bank1 Bank1 Bank1 SA64 111111001 8/4 3F2000h-3F3FFFh 1F9000h-1F9FFFh Bank1 Bank1 Bank1 SA65 111111010 8/4 3F4000h-3F5FFFh 1FA000h-1FAFFFh Bank1 Bank1 Bank1 SA66 111111011 8/4 3F6000h-3F7FFFh 1FB000h-1FBFFFh Bank1 Bank1 Bank1 SA67 111111100 8/4 3F8000h-3F9FFFh 1FC000h-1FCFFFh Bank1 Bank1 Bank1 SA68 111111101 8/4 3FA000h-3FBFFFh 1FD000h-1FDFFFh Bank1 Bank1 Bank1 SA69 111111110 8/4 3FC000h-3FDFFFh 1FE000h-1FEFFFh Bank1 Bank1 Bank1 SA70 111111111 8/4 3FE000h-3FFFFFh 1FF000h-1FFFFFh Note: The address range is A20:A-1 in byte mode (I/Of=VIL ) or A20:A0 in word mode (I/Of=VIH ). The bank address bits are A20-A18 for Type A, A20 and A19 for Type B, and A20 for Type C. FLASH - TOP BOOT SECURITY SECTOR ADDRESSES (Hidden-ROM) Device Type C Type B Type A Sector Address A20-A12 Size KB/KW (x8) Address Range (x16) Address Range 111111xxx 64/32 3F0000h-3FFFFFh 1F8000h-1FFFFFh Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 11 ISSI IS71VPCF32XS04 (R) FLASH - BOTTOM BOOT SECTOR ADDRESS Type F Type E Type D Sector Sector Address A20-A12 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 12 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001xxx 000010xxx 000011xxx 000100xxx 000101xxx 000110xxx 000111xxx 001000xxx 001001xxx 001010xxx 001011xxx 001100xxx 001101xxx 001110xxx 001111xxx 010000xxx 010001xxx 010010xxx 010011xxx 010100xxx 010101xxx 010110xxx Sector Size KB/KW (x8) Address Range (x16) Address Range 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 000000h-001FFFh 002000h-003FFFh 004000h-005FFFh 006000h-007FFFh 008000h-009FFFh 00A000h-00BFFFh 00C000h-00DFFFh 00E000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 000000h-000FFFh 001000h-001FFFh 002000h-002FFFh 003000h-003FFFh 004000h-004FFFh 005000h-005FFFh 006000h-006FFFh 007000h-007FFFh 008000h-00FFFFh 010000h-017FFFh 018000h-01FFFFh 020000h-027FFFh 028000h-02FFFFh 030000h-037FFFh 038000h-03FFFFh 040000h-047FFFh 048000h-04FFFFh 050000h-057FFFh 058000h-05FFFFh 060000h-067FFFh 068000h-06FFFFh 070000h-077FFFh 078000h-07FFFFh 080000h-087FFFh 088000h-08FFFFh 090000h-097FFFh 098000h-09FFFFh 0A0000h-0A7FFFh 0A8000h-0AFFFFh 0B0000h-0B7FFFh Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH - BOTTOM BOOT SECTOR ADDRESS (Continued) Type F Type E Type D Sector Sector Address A20-A12 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank1 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 SA30 SA31 SA32 SA33 SA34 SA35 SA36 SA37 SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 010111xxx 011000xxx 011001xxx 011010xxx 011011xxx 011100xxx 011101xxx 011110xxx 011111xxx 100000xxx 100001xxx 100010xxx 100011xxx 100100xxx 100101xxx 100110xxx 100111xxx 101000xxx 101001xxx 101010xxx 101011xxx 101100xxx 101101xxx 101110xxx 101111xxx 110000xxx 110001xxx 110010xxx 110011xxx Sector Size KB/KW (x8) Address Range (x16) Address Range 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 0B8000h-0BFFFFh 0C0000h-0C7FFFh 0C8000h-0CFFFFh 0D0000h-0D7FFFh 0D8000h-0DFFFFh 0E0000h-0E7FFFh 0E8000h-0EFFFFh 0F0000h-0F7FFFh 0F8000h-0FFFFFh 100000h-107FFFh 108000h-10FFFFh 110000h-117FFFh 118000h-11FFFFh 120000h-127FFFh 128000h-12FFFFh 130000h-137FFFh 138000h-13FFFFh 140000h-147FFFh 148000h-14FFFFh 150000h-157FFFh 158000h-15FFFFh 160000h-167FFFh 168000h-16FFFFh 170000h-177FFFh 178000h-17FFFFh 180000h-187FFFh 188000h-18FFFFh 190000h-197FFFh 198000h-19FFFFh Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 13 ISSI IS71VPCF32XS04 (R) FLASH - BOTTOM BOOT SECTOR ADDRESS (Continued) Type F Type E Type D Sector Sector Address A20-A12 Sector Size KB/KW (x8) Address Range (x16) Address Range Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 Bank2 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 110100xxx 110101xxx 110110xxx 110111xxx 111000xxx 111001xxx 111010xxx 111011xxx 111100xxx 111101xxx 111110xxx 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 1A0000h-1A7FFFh 1A8000h-1AFFFFh 1B0000h-1B7FFFh 1B8000h-1BFFFFh 1C0000h-1C7FFFh 1C8000h-1CFFFFh 1D0000h-1D7FFFh 1D8000h-1DFFFFh 1E0000h-1E7FFFh 1E8000h-1EFFFFh 1F0000h-1F7FFFh Bank2 Bank2 Bank2 SA70 111111xxx 64/32 3F0000h-3FFFFFh 1F8000h-1FFFFFh Note: The address range is A20:A-1 in byte mode (I/Of=VIL ) or A20:A0 in word mode (I/Of=VIH ). The bank address bits are A20-A18 for Type D, A20 and A19 for Type E, and A20 for Type F. FLASH - BOTTOM BOOT SECURITY SECTOR ADDRESSES (Hidden-ROM) Device Type F 14 Type E Type D Sector Address A20-A12 Size KB/KW (x8) Address Range (x16) Address Range 000000xxx 64/32 000000h-00FFFFh 000000h-007FFFh Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) SECTOR GROUP ADDRESS (TYPE A, TYPE B, TYPE C) (Top Boot Block) Sector Group A20 A19 A18 A17 A16 A15 A14 A13 A12 Sectors SGA0 0 0 0 0 SGA1 0 0 0 0 SGA2 SGA3 SGA4 SGA5 SGA6 SGA7 SGA8 SGA9 SGA10 SGA11 SGA12 SGA13 SGA14 SGA15 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 SGA16 1 1 1 1 SGA17 SGA18 SGA19 SGA20 SGA21 SGA22 SGA23 SGA24 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 X X X X X X X X X X X X X X 0 0 1 1 1 1 1 1 1 1 1 0 1 0 1 X X X X X X X X X X X X X X 0 1 0 1 1 1 1 1 1 1 1 X X X SA0 X X X SA1 to SA3 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X SA4 to SA7 SA8 to SA11 SA12 to SA15 SA16 to SA19 SA20 to SA23 SA24 to SA27 SA28 to SA31 SA32 to SA35 SA36 to SA39 SA40 to SA43 SA44 to SA47 SA48 to SA51 SA52 to SA55 SA56 to SA59 X X X SA60 to SA62 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 15 ISSI IS71VPCF32XS04 (R) SECTOR GROUP ADDRESS (TYPE D, TYPE E, TYPE F) (Bottom Boot Block) Sector Group A20 A19 A18 A17 A16 A15 A14 A13 A12 Sectors SGA0 SGA1 SGA2 SGA3 SGA4 SGA5 SGA6 SGA7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SGA8 0 0 0 0 SGA9 SGA10 SGA11 SGA12 SGA13 SGA14 SGA15 SGA16 SGA17 SGA18 SGA19 SGA20 SGA21 SGA22 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 SGA23 1 1 1 1 SGA24 1 1 1 1 16 0 0 0 0 0 0 0 0 0 1 1 X X X X X X X X X X X X X X 0 0 1 1 0 0 0 0 0 0 0 0 1 0 1 X X X X X X X X X X X X X X 0 1 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 X X X SA8 to SA10 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X SA11 to SA14 SA15 to SA18 SA19 to SA22 SA23 to SA26 SA27 to SA30 SA31 to SA34 SA35 to SA38 SA39 to SA42 SA43 to SA46 SA47 to SA50 SA51 to SA54 SA55 to SA58 SA59 to SA62 SA63 to SA66 X X X SA67 to SA69 X X X SA70 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH MEMORY AUTOSELECT CODES Type Manufacturer's Code TYPE A Device ID TYPE D Device ID TYPE B Device ID TYPE E Device ID TYPE C Device ID TYPE F Device ID Sector Group Protect A12 to A19 A6 A1 A0 A-1(1) Code (HEX) X VIL VIL VIL VIL 04h Byte X VIL VIL VIH VIL 55h Word X VIL VIL VIH X 2255h Byte X VIL VIL VIH VIL 56h Word X VIL VIL VIH X 2256h Byte X VIL VIL VIH VIL 50h Word X VIL VIL VIH X 2250h Byte X VIL VIL VIH VIL 53h Word X VIL VIL VIH X 2253h Byte X VIL VIL VIH VIL 5Ch Word X VIL VIL VIH X 225Ch Byte X VIL VIL VIH VIL 5Fh Word X VIL VIL VIH X 225Fh Sector VIL VIH VIL VIL 01h(2) Group Address Note: 1. A-1 is used for Byte mode. 2. Output 01h at protected sector address and output 00h at unprotected sector address. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 17 ISSI IS71VPCF32XS04 (R) FLASH MEMORY COMMAND DEFINITIONS Command Sequence Bus Read / Reset First Bus Cycle Second Bus Write Cycle Third Bus Write Cycle Fourth Bus Read/Write Bus Write Cycle Req'd Addr. Data Addr. Data Addr. Data Addr. Data 1 XXXH F0H -- -- -- -- -- -- Fifth Bus Cycle Addr. Sixth Bus Cycle Data Addr. Data -- -- -- -- Read / Reset * 1 Word Byte 3 555H AAAH AAH 2AAH 555H 55H 555H AAAH F0H RA RD -- -- -- -- Autoselect Word Byte 3 555H AAAH AAH 2AAH 555H 55H (BA) 555H (BA) AAAH 90H -- -- -- -- -- -- Program Word Byte 4 555H AAAH AAH 2AAH 555H 55H 555H AAAH A0H PA PD -- -- -- -- Chip Erase Word Byte 6 555H AAAH AAH 2AAH 555H 55H 555H AAAH 80H 555H AAAH AAH 2AAH 555H 55H 555H AAAH 10H Sector Erase Word Byte 6 555H AAAH AAH 2AAH 555H 55H 555H AAAH 80H 555H AAAH AAH 2AAH 555H 55H SA 30H Sector Erase Suspend Word Byte 1 BA B0H -- -- -- -- -- -- -- -- -- -- Sector Erase Resume Word Byte 1 BA 30H -- -- -- -- -- -- -- -- -- -- Set to Fast Mode Word Byte 3 555H AAH AAH 2AAH 555H 55H 555H AAAH 20H -- -- -- -- -- -- Fast Program * 2 Word Byte 2 XXXH A0H PA PD -- -- -- -- -- -- -- -- Reset from Fast Mode * 2 Word Byte 2 BA 90H XXXH F0H*6 -- -- -- -- -- -- -- -- Extended Sector Group Protection *3 Word Byte 4 XXXH 60H SPA 60H SPA 40H SPA SD -- -- -- -- Query * 4 Word Byte 1 55H AAH 98h -- -- -- -- -- -- -- -- -- -- Hidden-ROM Entry Word Byte 3 555H AAAH AAh 2AAH 555H 55H 555H AAAH 88H -- -- -- -- -- -- Hidden-ROM Program *5 Hidden-ROM Erase *5 Word Byte 4 555H AAAH AAH 2AAH 555H 55H 555H AAAH A0H PA PD -- -- -- -- Word Byte 6 555H AAAH AAH 2AAH 555H 55H 555H AAAH 80H 555H AAAH AAH 2AAH 555H 55H HRA 30H Hidden-Rom Exit *5 Word Byte 4 555H AAAH AAH 2AAH 555H 55H (HRBA) 555H (HRBA) AAAH 90H XXXH 00H -- -- -- -- Note: *1: Both Read/Reset commands are functionally equivalent, resetting the device to the read mode. *2: This command is valid during Fast Mode. *3: This command is valid while RESET=VID. *4: The valid Address is A0 to A6. *5: This command is valid during Hi-ROM mode. *6: The data "00h" is also acceptable. 18 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 Address bits A11 to A20 = X = "H" or "L" for all address commands except for Program Address (PA), Sector Address (SA),and Bank Address (BA). Bus operations are defined in "Device Bus Operations". RA = Address of the memory location to be read PA = Address of the memory location to be programmed Addresses are latched on the falling edge of the write pulse. SA = Address of the sector to be erased. The combination of A20 , A19, A18 , A17 , A16 , A15 , A14 , A13 , and A12 will uniquely select any sector. BA = Bank address (A15 to A20 ) SPA = Sector group address to be protected. Set sector group address (SGA) and (A6 , A1 , A0 ) = (0, 1, 0) for protect; or SGA and (A6, A1, A0) = (1, 1, 0) for unprotect. (R) Type D, Type E, Type F, (Bottom Boot Type) Word mode: 000000h to 007FFFh Byte mode: 000000h to 00FFFFh HRBA = Bank address of the Hidden-ROM area Type A, Type B, Type C, (Top Boot Type) : A15 = A16 = A17 = A18 = A19 = A20 = 1 Type D, Type E, Type F, (Bottom Boot Type) : A15 = A16 = A17 = A18 = A19 = A20 = 0 RD = Data read from location RA during read operation. PD = Data to be programmed at location PA. SD = Sector protection verify data. Output 01h at protected sector addresses and output 00h at unprotected sector addresses. The system should generate the following address patterns; Word mode : 555h or 2AAh to addresses A0 to A10 Byte mode : AAAh or 555h to addresses A-1 and A0 to A10 HRA= Address of the Hidden-ROM area Type A, Type B, Type C, (Top Boot Type) Word mode: 1F8000h to 1FFFFFh Byte mode: 3F0000h to 3FFFFFh MCP ABSOLUTE MAXIMUM RATINGS(1,2,3) Symbol Parameter TBIAS Temperature Under Bias TSTG Storage Temperature PD Power Dissipation IOUT Output Current (per I/O) VIN, VOUT Voltage Relative to GND for Data, Address and Control Pins VIN RESET(5) VIN WP/ACC(6) VCCf/VCCs Voltage on Vcc Supply Relative to GND (4) Value -40 to +85 -55 to +125 1.6 100 -0.3 to VCCf + 0.4 -0.3 to VCCs + 0.4 Unit C C W mA V V -0.5 TO +13.0 V -0.5 TO +10.5 V -0.3 to 4.0 V Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, precautions may be taken to avoid application of any voltage higher than maximum rated voltages to this high-impedance circuit. 3. This device contains circuitry that will ensure the output devices are in High-Z at power up. 4. Minimum DC voltage on input or I/O pins is -0.3 V. During voltage transitions, input or I/O pins may undershoot VSS to -2.0 V for periods of up to 20 ns. Maximum DC voltage on input or I/O pins is VCCf+0.3 V or VCCs+0.3 V. During voltage transitions, input or I/O pins may overshoot to VCCf+2.0 V or VCCs+2.0 V for periods of up to 20 ns. 5. Minimum DC input voltage on RESET pin is -0.5 V. During voltage transitions, RESET pin may undershoot VSS to -2.0 V for periods of up to 20 ns. Voltage difference between input and supply voltage (VIN-VCCf or VCCs) does not exceed 9.0 V. Maximum DC input voltage on RESET pin is +13.0 V which may overshoot to +14.0 V for periods of up to 20 ns. 6. Minimum DC input voltage on WP/ACC pin is -0.5 V. During voltage transitions, WP/ACC pin may undershoot Vss to -2.0 V for periods of up to 20 ns. Maximum DC input voltage on WP/ACC pin is +10.5 V which may overshoot to +12.0V for periods of up to 20 ns, when VCCf is applied. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 19 ISSI IS71VPCF32XS04 (R) MCP OPERATING RANGE Range Industrial Ambient Temperature -40C to +85C VCCF,VCCS 2.7-3.3V STANDARD VOLTAGE RANGE: VCC = 2.7-3.3 V Max Access Time CE Access OE Access FLASH MEMORY 70 85 70 85 30 35 SRAM 70 85 70 85 35 45 UNITS ns ns ns CAPACITANCE(1) Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 11 14 pF COUT Output Capacitance VOUT = 0V 12 16 pF CIN2 Control Pin Capacitance VIN = 0V 14 16 pF CIN3 WP/ACC Pin Capacitance VIN = 0V 21.5 26 pF Notes: 1. Test conditions: TA = 25C, f = 1 MHz 20 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) MCP DC CHARACTERISTICS Symbol Parameter Test Conditions Min. Max. Unit ILI ILO VIL Input Leakage Output Leakage Input Low Level VIN=VSS to VCCf, VCCs VOUT=VSS to VCCf, VCCs -1.0 -1.0 -0.2 1.0 1.0 0.5 A A V VIH Input High Level 2.4 VCC + 0.3(2) V VID Voltage for Sector Protection, and Temporary Sector Unprotection (RESET)(1) 11.5 12.5 V VACC Voltage for Program Acceleration ( WP/ACC)(1) 8.5 9.5 V VOL Output Low Level VCCf = VCCf min., VCCS=VCCS min. IOL = 1.0mA -- 0.4 V VOH Output High Level VCCf = VCCf min., VCCS=VCCS min. IOH = -0.5mA 2.4 -- V VLKO Flash Low Vccf 2.3 2.5 V Notes: 1. Applicable for only VCCf applying. 2. VCC indicates lower of VCCf or VCCs. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 21 ISSI IS71VPCF32XS04 (R) FLASH DC CHARACTERISTICS Symbol Parameter ILIT RESET Inputs Leakage Current ILIA ACC Inputs Leakage Current ICC1f FLASH Vcc (1) Active Current (Read) ICC2f ICC3f ICC4f ICC5f ISB1f FLASH Vcc Active(2) Current(Program/Erase) FLASH Vcc Active(4) Current (Read-While-Program) FLASH Vcc Active(4) Current (Read-While-Erase) FLASH Vcc Active Current (Erase-Suspend-Program) FLASH Vcc Standby Current Test Conditions Min. VCCf=VCCf max., VCCs=VCCs max. -- RESET = 12.5V VCCf=VCCf max., VCCs=VCCs max. -- WP/ACC = Vacc max. CEf=VIL tCycle = 5Mhz Byte -- OE=VIH tCycle = 5Mhz Word -- tCycle = 1Mhz Byte -- tCycle = 1Mhz Word -- CEf=VIL -- OE=VIH CEf=VIL Byte -- OE=VIH Word Max. 35 Unit A 20 A 16 18 7 7 35 mA 51 53 mA -- 51 53 mA CEf=VIL OE=VIH -- 35 mA VCCf = Vcc max, CEf= VCCf = + 0.3V RESET, CEf, WP/ACC = VCCf = + 0.3V -- 5 A CEf=VIL OE=VIH Byte Word mA ISB2f FLASH Vcc Standby Current (RESET) VCCf = Vcc max, RESET= VSS = + 0.3V -- WP/ACC = VCCf = + 0.3V 5 A ISB3f FLASH Vcc(3) Standby Current (Auto Sleep Mode) VCCf = Vcc max. CEf, = VSS = + 0.3V RESET, WP/ACC = VCCf = + 0.3V VIN = VCCf + 0.3V OR VSS + 0.3V 5 A -- Notes: 1. 2. 3. 4. 22 The ICC current listed includes both the DC operating current and the frequency dependent component. ICC active while Embedded Algorithm (program or erase) is in progress. Automatic sleep mode enables the low power mode when address remain stable for 150 ns.. Embedded Algorithm (program or erase) is in progress. (@5 MHz) Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) AC CHARACTERISTICS - CE TIMING Parameter CE Recover Time Symbol _ CE Hold Time _ tCCR Condition _ Min 0 Unit ns tCHOLD _ 3 ns Timing Diagram for Alternating SRAM to Flash CEf tCCR tCCR CE1s WE tCHOLD tCCR tCHOLD tCCR CE2s Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 23 ISSI IS71VPCF32XS04 (R) FLASH READ ONLY SWITCHING CHARACTERISTICS (Over Operating Range) Symbol Parameter Min. tRC Cycle Time 70 tACC Address to Output Delay -- tCE Chip Enable to Output Delay tOE Max. Min. Max. Unit 85 -- ns 70 -- 85 ns -- 70 -- 85 ns Output Enable to Output Delay -- 30 -- 35 ns tDF Chip Enable to Output High-Z -- 25 -- 30 ns tDF Output Enable to Output High-Z -- 25 -- 30 ns tOH Output Hold Time from Addresses, CEf or OE, Whichever Occurs First 0 -- 0 -- ns tREADY RESET Pin Low to Read Mode -- 20 -- 20 s FLASH AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 24 Unit 0V to 3.0V 5 ns 1.5V 1 TTL gate and 30pF Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH READ CYCLE tRC Address Address Stable tOEH CEf tDF tOE OE tOEH WE DQ tCE High-Z Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 tOH High-Z Output valid 25 ISSI IS71VPCF32XS04 (R) FLASH HARDWARE RESET / READ OPERATION TIMING DIAGRAM tRC Address Address Stable tACC CEf tRH tRP tRH tCE RESET tOH DQ 26 High-Z Output valid Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH ERASE/PROGRAM OPERATION CHARACTERISTICS (Over Operating Range) Symbol Parameter tWC tAS tASO Write Cycle Time Address Setup Time (WE to Addr.) Address Setup Time to CEf Low During Toggle Bit Polling Address Hold Time (WE to Addr.) Address Hold Time from CEf or OE High During Toggle Bit Polling Data Setup Time tAH tAHT tDS tDH tOES tOEH tOEH tCEPH tOEPH tGHEL tGHWL tWS tCS tWH tCH tWP tCP tWPH tCPH tWHWH1 tWHWH1 tWHWH2 tVCS Note: Data Hold Time Output Enable Setup Time Output Enable Hold Time Read Output Enable Hold Time Toggle and Data Polling CEf High During Toggle Bit Polling OE High During Toggle Bit Polling Read Recover Time Before Write (OE to CEf) Read Recover Time Before Write (OE to WE) WE Setup Time (CEf to WE) CEf Setup Time (WE to CEf) WE Hold Time (CEf to WE) CEf Hold Time (WE to CEf) Write Pulse Width CEf Pulse Width Write Pulse Width High CEf Pulse Width High Byte Programming Operation Word Programming Operation Sector Erase Operation (1) VCCf Setup Time -70 ns Min. Max. -85ns Min. Max. Unit 70 0 15 - 85 0 15 - ns ns ns 45 0 - 45 0 - ns ns 35 - 45 - ns 0 0 0 10 - 0 0 0 10 - ns ns ns ns 20 20 0 0 0 0 0 0 30 30 30 30 50 12 15 0.7 - 20 20 0 0 0 0 0 0 35 35 30 30 50 15 20 1 - ns ns ns ns ns ns ns ns ns ns ns ns s s s s 1. This value is typical, not maximum and does not include the preprogramming time. 2. This timing is for Sector Protection Operation. 3. The time between writes must be less than "tTOW " otherwise that command will not be accepted and erasure will start. A time-out or "tTOW " from the rising edge of last CEf or WE whichever happens first will initiate the execution of the Sector Erase command(s). 4. When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum of "tSPD " to suspend the erase operation. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 27 ISSI IS71VPCF32XS04 (R) FLASH ERASE/PROGRAM OPERATION CHARACTERISTICS (Continued) (Over Operating Range) Symbol tVLHT tVIDR tVACCA tRB tRP tEOE tRH tBUSY tTOW tSPD -70 ns Min. Max. Parameter (2) Voltage Transition Time Rise Time to VID(2) Rise Time to VACC Recovery Time from RY/BY RESET Pulse Width Delay Time from Embedded Output Enable RESET High Level Period Before Read Program/Erase Valid to RY/BY Delay Erase Time-out Time (3) Erase Suspend Transition Time (4) 4 500 500 0 500 200 50 - 70 90 20 -85ns Min. Max. Unit 4 500 500 0 500 200 50 - 85 90 20 s ns ns ns ns ns ns ns s s Note: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection Operation. 3. The time between writes must be less than "tTOW " otherwise that command will not be accepted and erasure will start. A time-out or "tTOW " from the rising edge of last CEf or WE whichever happens first will initiate the execution of the Sector Erase command(s). 4. When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum of "tSPD " to suspend the erase operation. 28 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH WRITE CYCLE (WE CONTROL) Data Polling 3rd Bus Cycle 555h ADDRESS PA PA tWC tAS tSH tRC CEf tCS OE tGHWL tCH tWP tWPH tDS tDH tCE tOE tWHWH1 WE DQ A0h tDF PD DQ7 Dout tOH Dout Notes: 1. PA is address of the memory location to be programmed. 2. PD is data to be programmed at byte address. 3. DQ7 is the output of the complement of the data written to the device. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the x16 mode (the addresses differ from x8 mode, i.e. AAAh). Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 29 ISSI IS71VPCF32XS04 (R) CE FLASH WRITE CYCLE (CE CEff CONTROL) Data Polling 3rd Bus Cycle 555h ADDRESS PA tWC tAS PA tAH CEf tWS tWH OE tGHEL tCP tCPH tDS tDH tWHWH1 WE DQ PD A0h DQ7 Dout Notes: 1. PA is address of the memory location to be programmed. 2. PD is data to be programmed at byte address. 3. DQ7 is the output of the complement of the data written to the device. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the x16 mode (the addresses differ from x8 mode, i.e. AAAh). 30 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS 555h ADDRESS 2AAh 555h 555h 2AAh SA* tWC tAS tAH CEf tCH tCS OE tWP tWPH tGHWL WE tDS tDH AAh DQ 30h for Sector Erase 55h 80h AAh 55h 10h/ 30h tVCS Vccf *SA is the sector address for Sector Erase. Address = 555h for Chip Erase. Note: These waveforms are for the x16 mode (the addresses differ from x8 mode: AAAh, 555h, AAAh, AAAh, 555h, SA*). Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 31 ISSI IS71VPCF32XS04 (R) FLASH AC WAVEFORMS FOR DATA POLING DURING EMBEDDED ALOGRITHM OPERATIONS CEf tCH tOE tDF OE tOEH WE tCEf DQ DQ7 Data In DQ7 = Valid Data High - Z tWHWH1 or 2 DQ0/DQ6 Data In DQ0 to DQ6 = Output Flag DQ0 to DQ6 Valid Data High - Z tEOE tBUSY RY/BY *DQ7 = Valid Data (the device has completed the Embedded operation.) 32 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH AC WAVEFORMS FOR TOGGLE BIT DURING EMBEDDED ALGORITHM OPERATIONS ADDRESS tAHT tASO CEf tAHT tAS tCEPH WE tOEH tOEH tOEPH OE tDH DQ6/DQ2 Data tOE Toggle Data tCEf* Toggle Data Toggle Data Toggle Data Output Valid tBUSY RY/BY * DQ6 stops toggling (the device has completed the Embedded operation). Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 33 ISSI IS71VPCF32XS04 (R) FLASH BACK-TO-BACK READ/WRITE TIMING DIAGRAM Read ADDRESS Command tRC tWC BA1 BA2 (555h) tAS Read tRC Command BA1 BA2 (PA) tWC Read tRC Read tRC BA1 BA2 (PA) tACC tAH tAS tCE tAHT CEf tCEPH tOE OE tGHWL tWP tDF tOEH WE tDS DQ Valid Output tDH Valid Input (A0h) tDF Valid Output Valid Input Valid Output Status (PD) Note: This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2. BA1: Address of Bank 1. BA2: Address of Bank 2. 34 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) BY TIMING DIAGRAM DURING WRITE/ERASE OPERATIONS FLASH RY/BY CEf The rising edge of the last write pulse WE Entire programming or erase operations RY/BY tBUSY BY TIMING DIAGRAM FLASH RESET, RY/BY WE RESET tRP tRB RY/BY tREADY Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 35 ISSI IS71VPCF32XS04 (R) FLASH TEMPORARY SECTOR GROUP UNPROTECTION tVIRD VCCf tVLHT tVCS VID VIH RESET CEf WE tVLHT Program or Erase Command Sequence tVLHT RY/BY Unprotection Period 36 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) FLASH EXTENDED SECTOR GROUP PROTECTION tVCS Vccf VLHT RESET tWC tWC VIDR SGAX SGAX ADDRESS SGAY A0 A1 A6 CEf OE tWP TIME-OUT WE tOE Data 60h 60h 40h 01h 60h SGAx: Sector Group Address to be protected. SGAy: Next Group Sector Address to be protected UNPROTECTION: Implement with A6 = 1, A1 = 1, A0 = 0. Time-out approximately 15 ms. TIME-OUT : Time-Out window = 250 s (Min.) Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 37 ISSI IS71VPCF32XS04 (R) FLASH ACCELERATED PROGRAM VCCf tVCS tVACCR tVLHT VACC VIH WP/ACC CEf WE tVLHT RY/BY Program Command Sequence tVLHT Acceleration Period 38 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) SRAM POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter ICC Vcc Dynamic Operating Supply Current ICC1 Operating Supply Current ISB2 CMOS Standby Current (CMOS Inputs) Test Conditions VCCS = Max., IOUT = 0 mA, f = fMAX VCCS = Max., IOUT = 0 mA, f = 0 VCCS = Max., CE1s VCCS - 0.2V, CE2s 0.2V, VIN VCCS - 0.2V, or VIN 0.2V, f = 0 Min. -- Max. 40 Unit mA -- 8 mA -- 7 A Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. SRAM READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) 70 ns Symbol Parameter Min. Max. 85ns Min. Max. Unit tRC Read Cycle Time 70 -- 85 -- ns tAA Address Access Time -- 70 -- 85 ns tOHA Output Hold Time 10 -- 10 -- ns tACE1 CE1s Access Time -- 70 -- 85 ns tDOE OE Access Time -- 35 -- 45 ns tHZOE(2) OE to High-Z Output -- 25 -- 35 ns tLZOE OE to Low-Z Output 5 -- 5 -- ns (2) CE1s to High-Z Output 0 25 0 35 ns (2) tLZCE1 CE1s to Low-Z Output 10 -- 10 -- ns tBA LBs, UBs Access Time -- 70 -- 85 ns tHZB LBs, UBs to High-Z Output 0 25 0 35 ns tLZB LBs, UBs to Low-Z Output 0 -- 0 -- ns (2) tHZCE1 Notes: 1. See SRAM AC Test Conditions 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 39 ISSI IS71VPCF32XS04 (R) SRAM AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load 40 Unit 0V to Vccs 5 ns VCCS/2 1TTL gate and 30pf Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) AC WAVEFORMS SRAM READ CYCLE NO. 1(1,2) (Address Controlled) (CE1S = OE = VIL, UBs or LBs = VIL) tRC ADDRESS tAA tOHA tOHA DOUT DATA VALID PREVIOUS DATA VALID AC WAVEFORMS SRAM READ CYCLE NO. 2(1,3) (CE1S, OE, AND UBs/ LBs Controlled) tRC ADDRESS tAA tOHA OE tDOE CE1s tHZOE tLZOE tACE1/tACE2 CE2s tLZCE1/ tLZCE2 tHZCE1 LBs, UBs tBA tHZB tLZB DOUT HIGH-Z DATA VALID Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE1, UBs, or LBs = VIL. 3. Address is valid prior to or coincident with CE1 LOW transition. Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 41 ISSI IS71VPCF32XS04 (R) WRITE CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) 70ns Symbol Parameter Min. Max. 85ns Min. Max. Unit tWC tSCE1 Write Cycle Time 70 -- 85 -- ns CE1s to Write End 60 -- 70 -- ns tAW tHA Address Setup Time to Write End 60 70 -- ns Address Hold from Write End 0 ---- 0 -- ns tSA tPWB Address Setup Time 0 -- 0 -- ns LBs,UBs Valid to End of Write 60 -- 70 -- ns tPWE tSD WE Pulse Width 50 ---- 60 -- ns Data Setup to Write End 30 -- 35 -- ns tHD tHZWE(2) Data Hold from Write End 0 -- 0 -- ns WE LOW to High-Z Output -- 25 -- 35 ns tLZWE(2) WE HIGH to Low-Z Output 0 -- 0 -- ns Notes: 1. See SRAM AC Test Conditions. 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 42 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) AC WAVEFORMS SRAM WRITE CYCLE NO. 1(1,2) (CE1S Controlled, OE = HIGH or LOW) tWC ADDRESS tHA tSCE1 CE1s tSCE2 CE2s tAW tPWE(4) WE LBs, UBs tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN tHD DATA-IN VALID Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE1s and WE inputs and at least one of the LBs and UBs inputs being in the LOW state. 2. WRITE = (CE1s) [ (LBs) = (UBs) ] (WE). Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 43 ISSI IS71VPCF32XS04 (R) SRAM WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle) tWC ADDRESS OE tHA tSCE1 CE1s tSCE2 CE2s tAW tPWE1, 2 WE LBs, UBs tSA DOUT tHZWE DATA UNDEFINED tLZWE HIGH-Z tSD DIN 44 tHD DATA-IN VALID Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) SRAM WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) tWC ADDRESS OE tHA tSCE1 CE1s tSCE2 CE2s tAW tPWE1, 2 WE LBs, UBs tSA DOUT DATA UNDEFINED tHZWE tLZWE HIGH-Z tSD DIN DATA-IN VALID Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 tHD 45 ISSI IS71VPCF32XS04 (R) WRITE CYCLE NO. 4 (UBs/LBs Controlled, CE1s is LOW, CE2s is HIGH) t WC ADDRESS t WC ADDRESS 1 ADDRESS 2 OE t SA t HA t SA WE UBs, LBs t HA t PBW t PBW WORD 1 WORD 2 t HZWE DOUT t LZWE HIGH-Z DATA UNDEFINED t HD t SD DIN DATAIN VALID t HD t SD DATAIN VALID UB_CSWR4.eps 46 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 ISSI IS71VPCF32XS04 (R) SRAM DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter Test Condition Min. Max. Unit VDR Vcc for Data Retention See Data Retention Waveform 1.5 3.3 V IDR Data Retention Current Vcc = 3.0V, CS1 Vcc - 0.2V -- 7 A tSDR tRDR Data Retention Setup Time See Data Retention Waveform 0 -- ns Recovery Time See Data Retention Waveform tRC -- ns SRAM DATA RETENTION WAVEFORM (CE1 Controlled) tSDR Data Retention Mode tRDR VCC 2.7V VIH VDR CE1s GND CE1s VCC - 0.2V Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02 47 ISSI IS71VPCF32XS04 (R) ORDERING INFORMATION Industrial Range: -40oC to +85oC Order Part No. IS71VPCF32AS04-7070BI IS71VPCF32BS04-7070BI IS71VPCF32CS04-7070BI SRAM Data Boot Bus Section 8/16 Top 8/16 Top 8/16 Top Flash Bank Organization 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb Flash SRAM Speed(ns) Speed(ns) 70 70 70 70 70 70 Package 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32DS04-7070BI IS71VPCF32ES04-7070BI IS71VPCF32FS04-7070BI 8/16 8/16 8/16 Bottom Bottom Bottom 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 70 70 70 70 70 70 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32AS04-7085BI IS71VPCF32BS04-7085BI IS71VPCF32CS04-7085BI 8/16 8/16 8/16 Top Top Top 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 70 70 70 85 85 85 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32DS04-7085BI IS71VPCF32ES04-7085BI IS71VPCF32FS04-7085BI 8/16 8/16 8/16 Bottom Bottom Bottom 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 70 70 70 85 85 85 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32AS04-8570BI IS71VPCF32BS04-8570BI IS71VPCF32CS04-8570BI 8/16 8/16 8/16 Top Top Top 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 85 85 85 70 70 70 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32DS04-8570BI IS71VPCF32ES04-8570BI IS71VPCF32FS04-8570BI 8/16 8/16 8/16 Bottom Bottom Bottom 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 85 85 85 70 70 70 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32AS04-8585BI IS71VPCF32BS04-8585BI IS71VPCF32CS04-8585BI 8/16 8/16 8/16 Top Top Top 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 85 85 85 85 85 85 73-ball BGA 73-ball BGA 73-ball BGA IS71VPCF32DS04-8585BI IS71VPCF32ES04-8585BI IS71VPCF32FS04-8585BI 8/16 8/16 8/16 Bottom Bottom Bottom 4Mb, 28Mb 8Mb, 24Mb 16Mb, 16Mb 85 85 85 85 85 85 73-ball BGA 73-ball BGA 73-ball BGA 48 Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774 PRELIMINARY INFORMATION Rev. 00B 08/01/02