2011 Microchip Technology Inc. DS80382J-page 1
PIC16(L)F72X
The PIC16(L)F72X family devices that you have
received conform functionally to the current Device Data
Sheet (DS41341E), except for the anomalies described
in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata describ ed in this document will be addressed
in future revisions of the PIC16(L)F72X silicon.
Data Sheet clarifications and corrections start on page 6,
following the discu ssion of silicon issues .
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1. Using the appropriate interface, connect the
device to the MPLAB ICD 2 programmer/
debugger or PICkit™ 3.
2. From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
3. Select the MPLAB hardware tool
(Debugger>Select Tool).
4. Perform a “Connect” operation to the device
(Debugger>Connect). Depending on the
development tool used, the part number and
Device Revision ID value appear in the Output
window.
The DEVREV values for the various PIC16(L)F72X
silicon revisions are shown in Table 1.
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (AK).
Note: If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
TABLE 1: SILICON DEVREV VALUES
Part Number Device ID(1) Revision ID for Silicon Revision(2)
A7 A9 AA AB AC AD AK
PIC16F722 01 1000 100x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16LF722 01 1001 100x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16F723 01 1000 011x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16LF723 01 1001 011x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16F724 01 1000 010x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16LF724 01 1001 010x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16F726 01 1000 001x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16LF726 01 1001 001x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16F727 01 1000 000x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
PIC16LF727 01 1001 000x xxxx 0x7 0x9 0xA 0xB 0xC 0xD 0x12
Note 1: The Device ID is located at 2006h. The 5 Least Significant bits comprise the revision ID.
2: Refer to the “PIC16F72X Memory Programming Specification” (DS41332) for detailed information on
Device and Revi sion IDs for your specific de vice.
PIC16(L)F72X Family
Silicon Errata and Data Sheet Clarification
PIC16(L)F72X
DS80382J-page 2 2011 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature Item
Number Issue Summary Aff ected Revisions(1)
A7 A9 AA AB AC AD AK
ADC (Analog-to-Digital
Converter) Power-down 1.1 ADC Power-down in Sleep. XXXX
ADC (Analog-to-Digital
Converter) Offset Error 1.2 Error on Infrequent
Conversions. XXXXX
ADC (Analog-to-Digital
Converter) Conversion
Results 1.3 Incorrect Conversion below
0°C. XXXXX
Timer1 Timer1
Oscillator 2.1 Operation above 90°C. XXXXXXX
Internal Os cillator Frequency 3.1 Frequency Shift on Reset. X
Internal Os cillator Frequency 3.2 Failure to wake from Sleep. X X
Internal Os cillator Frequency 3.3 Frequency Tolerance. XXXXXXX
External Oscillator External
Oscillator 4.1 Operation below 2.7V in HS
mode. XXXXXXX
CPU Sleep 5.1 Reset on Wake. X X
BOR Current 6.1 Current Draw in Sleep. XXXX
WDT CLRWDT
Instruction 7.1 CLRWDT Instruction after WDT
Time-out. XXXXX
Interrupts Stack Push 8. Interrupt logic incorrectly
pushes two addresses to the
stack.
XXXXXXX
2011 Microchip Technology Inc. DS80382J-page 3
PIC16(L)F72X
Silicon Errata Issues
1. Module: ADC (Analog-to-Digital
Converter)
1.1 ADC Power-down in Sleep
The ADC module incorrectly fails to power-down
after a con ve r si on if the dev ice is in Sleep an d the
ADC interrupt is disabled. The proper operation is
to power the ADC off after the conversion is
complete if the device is sleeping and the ADC
inter rupt is disab led .
Work around
Use the ADC conversion complete interrupt
(ADIF) to wake-up and explicitly shut down the
ADC by clearing the ADON bit.
Affected Silicon Revisions
1.2 Error on Infrequent Conversions
The offset error inco rrectly exc eeds the d ata she et
specifications if time between conversions is
longer than 10 ms. If the time between
conversions is greater than 10 ms, the offset error
is 1 LSb typical and 3.3 LSb maximum.
Work around
The time de pendent e rror i s i nsign ifi can t w he n th e
time between conversions is less than 10 ms.
When the time between conversions is greater
than 10 ms, take two back-to-back ADC
conversions and discard the results of the first
conversion.
Affected Silicon Revisions
1.3 Incorrect Conversion below 0°C
In some de vice s, the ADC m ay im properl y co nvert
if the tem perature is bel ow 0°C an d the ADC cloc k
source is set to FOSC/8, FOSC/16, FOSC/32, FOSC/
64.
Work around
Set the ADC clock source to FOSC/2, FOSC/4 or
RC.
Affected Silicon Revisions
2. Module: Timer1
2.1 Operation abov e 90°C
The Timer1 oscillator does not operate above
90C.
Work around
None.
Affected Silicon Revisions
3. Module: Internal Oscillator
3.1 Frequency Shift on Reset
The internal oscillator module on the PIC16F72X
family of devices may experience a ±1% frequency
shift after a Reset. The frequency shift is not
consistent and could cause the oscillator to
operate outside of the 2% specification.
Work around
To minimize the chances of experiencing the
frequency shift, the following steps should be
taken:
1. Operate the internal oscillator at 8 MHz or
2MHz.
2. Use an external pull-up on MCLR or use
internal MCLR mode.
3. Disable the Pow er Rese t Ti mer (PWRT).
4. The bypass capacitor and Voltage Regulator
Capac itor (VCAP) should be used ap propriatel y
to minimize noise in the device.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (as applicable).
A7 A9 AA AB AC AD AK
XXXX
A7 A9 AA AB AC AD AK
XXXXX
A7 A9 AA AB AC AD AK
XXXXX
A7 A9 AA AB AC AD AK
XXXXXXX
A7 A9 AA AB AC AD AK
X
PIC16(L)F72X
DS80382J-page 4 2011 Microchip Technology Inc.
3.2 Failure to Wake from Sleep
Due to internal race conditions upon entering
Sleep mode, the device will occasionally fail to
wake-up from Sleep. Only a device Power-on
Reset will force the device to exit Sleep mode.
Work around
None. Do not use Sleep command.
Affected Silicon Revisions
3.3 Fre quen cy Toler an ce
The freq uency to lerance of the i nternal os cillato r is
±2% from 0-60°C and ±3% from 60-85°C (see
Figure 1).
Work around
None.
Affected Silicon Revisions
FIGURE 1: HFINTOSC FREQUENCY ACCURACY OVER DEVICE VDD AND
TEMPERATURE(1)
A7 A9 AA AB AC AD AK
XX
A7 A9 AA AB AC AD AK
XXXXXXX
125
25
2.0
0
60
85
VDD (V)
4.0 5.04.5
Temperature (°C)
2.5 3.0 3.5 5.51.8
Note 1: This chart covers both regulator enabled and regulator disabled states.
2: Regulator Nominal voltage.
3.3(2)
-40
-20
+ 5%
± 2%
+ 5%
± 3%
2011 Microchip Technology Inc. DS80382J-page 5
PIC16(L)F72X
4. Module: External Oscillator
4.1 Minimum Operating Voltage for HS Mode
The minim um dev ice VDD when usi ng the ext ernal
crystal oscillator in HS mode is 2.7V.
Work around
Use the internal oscillator or an external clock
source if operation below 2.7V is required for the
frequency range supported by HS mode.
Affected Silicon Revisions
5. Module: CPU
5.1 Reset on Wake
If a wake from Sleep event occurs during the
execution of a Sleep command, the device may
reset. This Reset will be seen as a Power-on
Reset to the device.
Work around
1. Disable all asynchronous interrupt before
going to Sleep.
2. Make sure the timing of an asynchronous
interrupt will not happen during the execution
of the Sleep instruction.
Affected Silicon Revisions
6. Module: BOR
6.1 Current Draw in Sleep
With the BOR set to “Enabled during operation and
disabled during Sleep”, the device draws 2A
more during Sleep than when the BOR is set to
“Disabled”.
Work around
None.
Affected Silicon Revisions
7. Module: WDT
7.1 CLRWDT Instruction after WDT Time-out
After a WDT Reset, the TO bit of the STATUS
register remains clear until a SLEEP instruction or
CLRWDT instruction is issued, then, the TO bit will
be set. If t he CLRWDT instruction i s issued within 20
S of the Reset, the TO bit will remain clear.
Work around
W ait at least 20 S after a WDT Reset before using
the CLRWDT instruction.
Affected Silicon Revisions
8. Module: Interrupts
The interrupt logic incorrectly pushes two
addresses to the stack when vectoring to the
interrupt vector. Specifically, the interrupt vector
address 0x4 is in correctly p ushed to the stack af ter
the current PC, at the time the interrupt was
received, is pushed. This will cause the stack to
overflow if the user program is operating seven
calls deep when an interrupt arrives. Because the
stack is circular , the overflow causes the first stack
address to be overw ritt en.
Work around
Disable interrupts by clearing the GIE bit in the
INTCON register whenever the user program is
operating seven calls deep. This ensures that
interrupts will not cause the stack to overflow.
Affected Silicon Revisions
A7 A9 AA AB AC AD AK
XXXXXXX
A7 A9 AA AB AC AD AK
XX
A7 A9 AA AB AC AD AK
XXXX
A7 A9 AA AB AC AD AK
XXXXX
A7 A9 AA AB AC AD AK
XXXXXXX
PIC16(L)F72X
DS80382J-page 6 2011 Microchip Technology Inc.
Data Sheet Clarifications
None.
2011 Microchip Technology Inc. DS80382J-page 7
PIC16(L)F72X
APPENDIX A: DOCUMENT
REVISION HISTORY
Rev. A Document (07/2008)
First revision of this document.
Rev. B Document (08/2008)
Added Module 4: Internal Oscillator; Revised Modules
1 and 2.
Rev. C Document (11/2008)
Added Module 5: Internal Oscillator , Module 6: CPU and
Module 7: BOR.
Rev. D Document (07/2009)
Updated document with new format. Added items 1.3
and 3.3. Updated Tables 1 and 2. Other minor changes.
Rev. E Document (09/2009)
Added M odule 6: W DT; Revise d Tables 1 and 2; Adde d
Rev. ID AC.
Rev. F Document (01/2010)
Added Rev. AD Silicon.
Rev. G Document (03/2010)
Added new Module 4: External Oscillator; Revised
Table 2; Revised Module 3.3: Frequency Tolerance;
Other minor corrections.
Rev. H Document (04/2010)
Updated Tables 1 and 2, adding Rev. AK silicon;
Updated Module 3, clarified condition.
Rev. J Document (02/2011)
Updated errata to new format; Added Module 8,
Interrupts.
PIC16(L)F72X
DS80382J-page 8 2011 Microchip Technology Inc.
NOTES:
2011 Microchip Technology Inc. DS80382J-page 9
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Printed on recycled paper.
ISBN: 978-1-60932-912-9
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that it s family of products is one of the most secure families of it s kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and d sPIC® DSCs, KEELOQ® code hoppi ng
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS80382J-page 10 2011 Microchip Technology Inc.
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