TLE6208-3G - Infineon Technologies

PG-DSO-14-35

Enhanced Power

Data Sheet 1 2007-09-12

Triple Half Bridges TLE 6208-3 G

1Overview

1.1 Features

• Three Half-Bridges

• Optimized for DC motor management applications

• Delivers up to 0.6 A continuous, 1.2 A peak current

•RDS ON; typ. 0.8 Ω, @ 25 °C per switch

• Output: short circuit protected and diagnosis

• Overtemperature-Protection with hysteresis

and diagnosis

• Standard SPI-Interface/Daisy chain capable

• Very low current consumption in stand-by (Inhibit) mode (typ. 10 µA for power and

2µA for logic supply, @ 25 °C)

• Over- and Undervoltage-Lockout

• CMOS/TTL compatible inputs with hysteresis

• No crossover current

• Internal clamp diodes

• Enhanced power P-DSO-Package

• Programming compatibility to the TLE 5208-6

• Green Product (RoHS compliant)

• AEC Qualified

Functional Description

The TLE 6208-3 G is a fully protected Triple-Half-Bridge-Driver designed specifically for

automotive and industrial motion control applications. The part is based on the Siemens

power technology SPT® which allows bipolar and CMOS control circuitry in accordance

with DMOS power devices existing on the same monolithic circuitry.

In motion control up to 2 actuators (DC-Motors) can be connected to the 3 halfbridge-

outputs (cascade configuration). Operation modes forward (cw), reverse (ccw), brake

and high impedance are controlled from a standard SPI-Interface. The possibility to

control the outputs via software from a central logic, allows limiting the power dissipation.

So the standard P-DSO-14-package meets the application requirements and saves

PCB-Board-space and cost. Furthermore the build-in features like Over- and

Undervoltage-Lockout, Over-Temperature-Protection and the very low quiescent current

in stand-by mode opens a wide range of automotive- and industrial-applications.

Type Package

TLE 6208-3 G PG-DSO-14-35

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 2 2007-09-12

1.2 Pin Configuration (top view)

Figure 1

Leadframe

Chip

GND

INH

OUT 2

OUT 1

GND

CLK

OUT 3

P-DSO-14-9

AEP02438

GND

CSN

PG-DSO-14-35

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 3 2007-09-12

1.3 Pin Definitions and Functions

Pin No. Symbol Function

1GNDGround; Reference potential; internal connection to pin 7, 8 and 14;

cooling tab; to reduce thermal resistance place cooling areas on PCB

close to these pins.

2OUT3Halfbridge-Output 3;

Internally contected to Highside-Switch 3 and Lowside-Switch 3. The

HS-Switch is a Power-MOS open drain with internal reverse diode;

The LS-Switch is a Power-MOS open source with internal reverse

diode; no internal clamp diode or active zenering;

short circuit protected and open load controlled.

3VSPower Supply;

needs a blocking capacitor as close as possible to GND Value: 22 µF

electrolytic in parallel to 220 nF ceramic.

5DISerial Data Input; receives serial data from the control device; serial

data transmitted to DI is an 16bit control word with the Least

Significant Bit (LSB) being transferred first: the input has an active

pull down and requires CMOS logic level inputs;

DI will accept data on the falling edge of CLK-signal;

see Table Input Data Protocol.

4CSNChip-Select-Not Input; CSN is an active low input; serial

communication is enabled by pulling the CSN terminal low; CSN

input should only be transitioned when CLK is low; CSN has an

internal active pull up and requires CMOS logic level inputs.

6CLKSerial Clock Input; clocks the shiftregister; CLK has an internal

active pull down and requires CMOS logic level inputs.

7, 8, 14 GND Ground; see pin 1.

9DOSerial-Data-Output; this 3-state output transfers diagnosis data to

the control device; the output will remain 3-stated unless the device

is selected by a low on Chip-Select-Not (CSN);

see Table Diagnosis Data Protocol.

10 INH Inhibit Input; has an internal pull down;

device is switched in standby condition by pulling the INH terminal

low.

11 VCC Logic Supply Voltage;

needs a blocking capacitor as close as possible to GND;

Value: 10 µF electrolytic in parallel to 220 nF ceramic.

12 OUT2 Halfbridge-Output 2; see pin 2.

13 OUT1 Halfbridge-Output 1; see pin 2.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 4 2007-09-12

1.4 Functional Block Diagram

Figure 2 Block Diagram

Bias

Inhibit

Charge

Pump

Detect

Fault-

SPI

16 Bit

Logic

and

Latch

TSD

11 3

1,7,8,14

GND

OUT 2

OUT 1

OUT 3

CLK

CSN

INH

VCC S

AEB02439

DRV1

DRV2

DRV3

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 5 2007-09-12

1.5 Circuit Description

Figure 2 shows a block schematic diagram of the module. There are 3 halfbridge drivers

on the right-hand side. An HS driver and an LS driver are combined to form a halfbridge

driver in each case. The drivers communicate via the internal data bus with the logic and

the other control and monitoring functions: undervoltage (UV), overvoltage (OV),

overtemperature (TSD), charge pump and fault detect.

Two connection interfaces are provided for supply to the module: All power drivers are

connected to the supply voltage VS. These are monitored by overvoltage and

undervoltage comparators with hysteresis, so that the correct function can be checked

in the application at any time.

The logic is supplied by the VCC voltage, typ. with 5 V. The VCC voltage uses an internally

generated Power-On Reset (POR) to initialize the module at power-on. The advantage

of this system is that information stored in the logic remains intact in the event of short-

term failures in the supply voltage VS. The system can therefore continue to operate

following VS undervoltage, without having to be reprogrammed. The “undervoltage”

information is stored, and can be read out via the interface. The same logically applies

for overvoltage. “Interference spikes” on VS are therefore effectively suppressed.

The situation is different in the case of undervoltage on the VCC connection pin. If this

occurs, then the internally stored data is deleted, and the output levels are switched to

high-impedance status (tristate). The module is initialized by VCC following restart

(Power-On Reset = POR).

The 16-bit wide programming word or control word (see Table Input Data Protocol) is

read in via the DI data input, and this is synchronized with the clock input CLK. The status

word appears synchronously at the DO data output (see Table Diagnosis Data

Protocol). It is also possible to connect two TLE 6208-3 G in a daisy chain configuration.

The DO data output of one device is connected with the DI data input of the second

device. In this configuration these two devices are controlled with a single CSN chip

select and using a 32-bit wide control word.

The transmission cycle begins when the chip is selected with the CSN input (H to L). If

the CSN input changes from L to H then the word which has been read in becomes the

control word. The DO output switches to tristate status at this point, thereby releasing the

DO bus circuit for other uses.

The INH inhibit input can be used to cut off the complete module. This reduces the

current consumption to just a few µA, and results in the loss of any data stored. The

output levels are switched to tristate status. The module is reinitialized with the internally

generated POR (Power-On Reset) at restart.

This feature allows the use of this module in battery-operated applications (vehicle body

control applications).

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 6 2007-09-12

Every driver block from DRV 1 to 3 contains a low-side driver and a high-side driver. Both

drivers are connected internally to form a half-bridge at the output. This reduction of

output pins was necessary to meet the small P-DSO-14 package.

When commutating inductive loads, the dissipated power peak can be significantly

reduced by activating the transistor located parallel to the internal freewheeling diode. A

special, integrated “timer” for power ON/OFF times ensures that there is no crossover

current.

Input Data Protocol Diagnosis Data Protocol

BIT BIT

15 OVLO on/off 15 Power supply fail

14 not used 14 Underload

13 Overcurrent SD on/off 13 Overload

12 not used 12 not used

11 not used 11 not used

10 not used 10 not used

9 not used 9 not used

8 not used 8 not used

7 not used 7 not used

6 HS-Switch 3 6 Status HS-Switch 3

5 LS-Switch 3 5 Status LS-Switch 3

4 HS-Switch 2 4 Status HS-Switch 2

3 LS-Switch 2 3 Status LS-Switch 2

2 HS-Switch 1 2 Status HS-Switch 1

1 LS-Switch 1 1 Status LS-Switch 1

0 Status Register Reset 0 Temp. Prewarning

H=ON

L=OFF

H=ON

L=OFF

Fault Result Table

Fault Diag.-Bit Result

Overcurrent (load) 13 Only the failed output is switched OFF. Function

can be deactivated by bit No. 13.

Short circuit to GND

(high-side-switch)

13 Only the failed output is switched OFF. Function

can be deactivated by bit No. 13.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 7 2007-09-12

Short circuit to VS

(low-side-switch)

13 Only the failed output is switched OFF. Function

can be deactivated by bit No. 13.

Temperature warning 0 Reaction of control device needed.

Temperature shut

down (SD)

– All outputs OFF.

Temperature warning is set before.

Underload/Openload 14 Reaction of control device needed.

Undervoltage lockout

(UVLO)

15 All outputs OFF.

Overvoltage lockout

(OVLO)

15 All outputs OFF.

Function can be deactivated by bit No. 15.

H = failure;

L = no failure.

2 Electrical Characteristics

2.1 Absolute Maximum Ratings

Parameter Symbol Limit Values Unit Remarks

min. max.

Supply voltage VS– 0.3 40 V –

Supply voltage VS– 1 – V t < 0.5 s; IS > – 2 A

Logic supply voltage VCC – 0.3 5.5 V 0 V < VS < 40 V

Logic input voltages

(DI, CLK, CSN, INH)

VI– 0.3 5.5 V 0 V < VS < 40 V

0 V < VCC < 5.5 V

Logic output voltage

(DO)

VDO – 0.3 5.5 V 0 V < VS < 40 V

0 V < VCC < 5.5 V

Output voltage

(OUT 1-3)

VOUT – 0.3 40 V 0 V < VS < 40 V

Output current (cont.) IOUT1-3 – – A internal limited

Output current (peak) IOUT1-3 – – A internal limited

Note: Current limits are mentioned in the overcurrent section of electrical charateristics

Junction temperature Tj– 40 150 °C–

Storage temperature Tstg – 50 150 °C–

Fault Result Table

Fault Diag.-Bit Result

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 8 2007-09-12

Note: Stresses above those listed here may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

ESD voltage, human body

model, according to:

• MIL STD 883D,

• ANSI EOS\ESD S5.1

• JEDEC JESD22-A114

VESD-HBM – – 4kV all pins

VESD-HBM-

OUT

– – 8kV only pins 2, 12 and

13 (outputs)

ESD voltage, mashine model,

according to:

• ANSI EOS\ESD S5.2

• JEDEC JESD22-A115

VESD-MM – – 300V all pins

2.2 Operating Range

Parameter Symbol Limit Values Unit Remarks

min. max.

Supply voltage VSVUV OFF 40 V After VS rising

above VUV ON

Supply voltage slew rate dVS /dt–10V/µs–

Logic supply voltage VCC 4.75 5.50 V –

Supply voltage increasing VS– 0.3 VUV ON V Outputs in tristate

Supply voltage decreasing VS– 0.3 VUV OFF V Outputs in tristate

Logic input voltage (DI, CLK,

CSN, INH)

VI– 0.3 VCC V–

SPI clock frequency fCLK –1MHz–

Junction temperature Tj– 40 150 °C–

Thermal Resistances

2 Electrical Characteristics

2.1 Absolute Maximum Ratings (cont’d)

Parameter Symbol Limit Values Unit Remarks

min. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 9 2007-09-12

Note: In the operating range, the functions given in the circuit description are fulfilled.

Junction pin Rthj-pin – 30 K/W measured to

pin 1, 7, 8, 14

Junction ambient RthjA –65K/W–

2.3 Electrical Characteristics

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Current Consumption

Quiescent current IS–820µA INH = Low;

VS = 13.2 V

Tj = 25 °C

Quiescent current IS––30µA INH = Low;

VS = 13.2 V;

Logic-Supply current ICC –210µA INH = Low

Logic-Supply current ICC –12mASPI not active

Supply current IS–25mA–

Over- and Under-Voltage Lockout

UV-Switch-ON voltage VUV ON –6.57VVS increasing

UV-Switch-OFF voltage VUV OFF 5.6 6.1 6.6 V VS decreasing

UV-ON/OFF-Hysteresis VUV HY –0.4–VVUV ON – VUV OFF

OV-Switch-OFF voltage VOV OFF 34 37 40 V VS increasing

OV-Switch-ON voltage VOV ON 30 33 36 V VS decreasing

OV-ON/OFF-Hysteresis VOV HY –4–VVOV OFF – VOV ON

2.2 Operating Range (cont’d)

Parameter Symbol Limit Values Unit Remarks

min. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 10 2007-09-12

Outputs OUT1-3

Static Drain-Source-On Resistance

Source (High-Side)

IOUT = – 0.5 A

RDS ON H – 0.8 0.95 Ω8V < VS < 40 V

Tj = 25 °C

–1.6Ω8V < VS < 40 V

1–ΩVSOFF

< VS ≤ 8V

Tj = 25 °C

–2ΩVSOFF

< VS ≤ 8V

Sink (Low-Side)

IOUT = 0.5 A

RDS ON L – 0.75 0.9 Ω8V < VS < 40 V

Tj = 25 °C

–1.5Ω8V < VS < 40 V

1–ΩVSOFF

< VS ≤ 8V

Tj = 25 °C

–2ΩVSOFF

< VS ≤ 8V

Leakage Current

Source-Output-Stage 1 to 3 IQLH –5 –1 – µAVOUT1-3 = 0 V

Sink-Output-Stage 1 to 3 IQLL –150300µAVOUT1-3 = VS

Overcurrent

Source shutdown threshold ISDU –2 –1.3 –1 A –

Sink shutdown threshold ISDL 11.22A–

Current limit IOCL – 2.4 4 A sink and source

Shutdown delay time tdSD 10 28 40 µs sink and source

Open Circuit/Underload Detection

Detection current IOCD 15 30 45 mA –

2.3 Electrical Characteristics (cont’d)

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 11 2007-09-12

Delay time tdOC 200 370 600 µs–

Output Delay Times; VS = 13.2 V; RLoad = 25 Ω (device not in stand-by for t > 1 ms)

Source ON tdONH –820µs–

Source OFF tdOFFH –420µs–

Sink ON tdONL –720µs–

Sink OFF tdOFFL –320µs–

Dead time tDHL 13–µs tdONL –tdOFFH

Dead time tDLH 15–µs tdONH –tdOFFL

Output Switching Times; VS = 13.2 V; RLoad = 25 Ω (device not in stand-by for t > 1 ms)

Source ON tON H –520µs–

Source OFF tOFF H –25µs–

Sink ON tON L –2.010µs–

Sink OFF tOFF L –1.55µs–

Clamp Diodes Forward Voltage

Upper VFU –0.91.3VIF = 0.5 A

Lower VFL –0.91.3VIF = 0.5 A

Inhibit Input

H-input voltage threshold VIH –0.520.7VCC –

L-input voltage threshold VIL 0.2 0.48 – VCC –

Hysteresis of input voltage VIHY 50 200 500 mV –

Pull down current II525100µAVI = 0.2 × VCC

Input capacitance CI–1015pF0V < VCC <

5.25 V

2.3 Electrical Characteristics (cont’d)

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 12 2007-09-12

Note: Capacitances are guaranteed by design.

SPI-Interface

Delay Time from Stand-by to Data In/Power on Reset

Setup time tset ––100µs–

Logic Inputs DI, CLK and CSN

H-input voltage threshold VIH – 0.52 0.7 VCC –

L-input voltage threshold VIL 0.2 0.48 – VCC –

Hysteresis of input voltage VIHY 50 200 500 mV –

Pull up current at pin CSN IICSN –50 –25 –10 µAVCSN = 0.7 × VCC

Pull down current at pin DI IIDI 10 25 50 µAVDI = 0.2 × VCC

Pull down current at pin CLK IICLK 10 25 50 µAVCLK = 0.2 × VCC

Input capacitance

at pin CSN, DI or CLK

CI– 1015pF0V < VCC <

5.25 V

Note: Capacitances are guaranteed by design.

Logic Output DO

H-output voltage level VDOH VCC

– 1.0

VCC

– 0.7

–VIDOH =1 mA

L-output voltage level VDOL –0.20.4VIDOL = – 1.6 mA

Tri-state leakage current IDOLK – 10 0 10 µAVCSN = VCC

0V < VDO < VCC

Tri-state input capacitance CDO – 1015pFVCSN =VCC

0V < VCC <

5.25 V

Note: Capacitances are guaranteed by design.

2.3 Electrical Characteristics (cont’d)

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 13 2007-09-12

Data Input Timing

Clock period tpCLK 1000 – –ns–

Clock high time tCLKH 500 – –ns–

Clock low time tCLKL 500 – –ns–

Clock low before CSN low tbef 500 – –ns–

CSN setup time tlead 500 – –ns–

CLK setup time tlag 500 – –ns–

Clock low after CSN high tbeh 500 – –ns–

DI setup time tDISU 250 – –ns–

DI hold time tDIHO 250 – –ns–

Input signal rise time

at pin DI, CLK and CSN

trIN – –200ns–

Input signal fall time

at pin DI, CLK and CSN

tfIN – –200ns–

Data Output Timing

DO rise time trDO –50100nsCL = 100 pF

DO fall time tfDO –50100nsCL = 100 pF

DO enable time tENDO – – 250 ns low impedance

DO disable time tDISDO – – 250 ns high impedance

DO valid time tVADO – 100 250 ns VDO < 0.2 VCC;

VDO > 0.7 VCC;

CL = 100 pF

Thermal Prewarning and Shutdown

Thermal prewarning junction

temperature

TjPW 120 145 170 °C–

2.3 Electrical Characteristics (cont’d)

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 14 2007-09-12

Temperature prewarning

hysteresis

∆T –30– K–

Thermal shutdown junction

temperature

TjSD 150 175 200 °C–

Thermal switch-on junction

temperature

TjSO 120 – 170 °C–

Temperature shutdown

hysteresis

∆T–30–K–

Ratio of SD to PW

temperature

TjSD/TjPW 1.05 1.20 – – –

Note: Temperatures are guaranteed by design.

The listed characteristics are ensured over the operating range of the integrated

circuit. Typical characteristics specify mean values expected over the production

spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and

the given supply voltage.

2.3 Electrical Characteristics (cont’d)

8V<VS< 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; – 40 °C<Tj< 150 °C;

unless otherwise specified

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 15 2007-09-12

3 Timing Diagrams

Figure 3 Data Transfer Timing

AET02177

012345678910

11 12 13 14 15 01

CSN

CLK

HS1

e.g. Old Data Actual Data

time

New Data

Actual Status

CSN High to Low & rising edge of CLK: DO is enabled. Status information is transferred to Output Shift Register

CSN Low to High: Data from Shift-Register is transferred to Output Power Switches

Actual Data

Previous Status

DI: Data will be accepted on the falling edge of CLK-Signal

DO: State will change on the rising edge of CLK-Signal

time

1211

1098

0---------------- 01

012356789

10 11 13 14 15

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 16 2007-09-12

Figure 4 Timing for Temperature Prewarning only

Figure 5 SPI-Input Timing

AET02620

CSN

CLK

time

CSN High to Low & CLK Stays Low: Status information of Data Bit 0 (temperature prewarning) is transfered to DO

DI: Data is not accepted

DO: Status information of Data Bit 0 (temperature prewarning) will stay as long as CSN is low

time

AET02178

DI Valid Don’t

Care

ValidDon’t Care Don’t Care

V0.7

0.2 V

bef

lead

CLKH

CLKL

beh

lag

DIHO

DISU

CLK

CSN

V0.2

0.7 V

V0.2

0.7 V

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 17 2007-09-12

Figure 6 Turn OFF/ON Time

Figure 7 DO Valid Data Delay Time and Valid Time

AET02179

CSN

dON

20%

70%

rIN fIN

OFF

dOFF

OFF State

ON State OFF State

ON State

Case 1

Case 2

OUT

50%

70%

20%

70%

50%

AET02180

CLK

rIN fIN

(low to high)

rDO

DO (high to low)

fDO

VADO

10 ns

50%

V0.7

0.2 V

V0.7

0.2

V0.7

0.2

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 18 2007-09-12

Figure 8 DO Enable and Disable Time

AET02181

CSN

fIN rIN

10 ns

ENDO

DISDO

Pullup

Pulldown

to GND

10 k Ω

50%

0.7 V

V0.2

10 k Ω

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 19 2007-09-12

Figure 9 Application Circuit

Bias

Inhibit

Charge

Pump

Detect

Fault-

SPI

16 Bit

Logic

and

Latch

TSD

11 3

1,7,8,14

GND

OUT 2

OUT 1

OUT 3

CLK

CSN

CC S

AEB02441

DRV1

DRV2

DRV3

INH

GND

RWD

Reset

Watchdog

TLE 4278G Ι

D01

1N4001

D02

Z39

10 F

47 nF

22 F

= 12V

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 20 2007-09-12

4 Package Outlines

Figure 10 PG-DSO-14-35 (Plastic Dual Small Outline)

Green Product (RoHS compliant)

To meet the world-wide customer requirements for environmentally friendly products

and to be compliant with government regulations the device is available as a green

product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable

for Pb-free soldering according to IPC/JEDEC J-STD-020).

GPS09222

You can find all of our packages, sorts of packing and others in our

Infineon Internet Page “Products”: http://www.infineon.com/products.

Dimensions in mm

SMD = Surface Mounted Device

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 21 2007-09-12

Revision History

Version Date Changes

Rev. 1.1 2007-09-12 RoHS-compliant version of the TLE 6208-3 G

• All pages: Infineon logo updated

• Page 1:

“added AEC qualified” and “RoHS” logo, “Green Product

(RoHS compliant)” and “AEC qualified” statement added to

feature list, package name changed to RoHS compliant

versions, package picture updated, ordering code

removed

• Page 20:

Package name changed to RoHS compliant versions,

“Green Product” description added

• Page 21-22:

added Revision History and Legal Disclaimer

http://store.iiic.cc/

TLE 6208-3 G

Data Sheet 22 2007-09-12

Edition 2007-08-20

Published by

Infineon Technologies AG

81726 Munich, Germany

9/14/07 Infineon Technologies AG

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in

question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written

approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure

of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

http://store.iiic.cc/