BSZ096N10LS5 MOSFET OptiMOSTM5Power-Transistor,100V TSDSON-8FL (enlarged source interconnection) Features *Idealforhighfrequencyswitching *OptimizedtechnologyforDC/DCconverters *ExcellentgatechargexRDS(on)product(FOM) *N-channel,Logiclevel *100%avalanchetested *Pb-freeplating;RoHScompliant *QualifiedaccordingtoJEDEC1)fortargetapplications *Halogen-freeaccordingtoIEC61249-2-21 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 9.6 m ID 40 A QOSS 30 nC QG(0VB4.5V) 12 nC S1 8D S2 7D S3 6D G4 5D Type/OrderingCode Package Marking RelatedLinks BSZ096N10LS5 PG-TSDSON-8 FL 096N10L - 1) J-STD20 and JESD22 Final Data Sheet 1 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 1Maximumratings atTA=25C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 40 39 11 A VGS=10V,TC=25C VGS=10V,TC=100C VGS=10V,TA=25C,RthJA=60K/W1) - 160 A TC=25C - - 82 mJ ID=20A,RGS=25 VGS -20 - 20 V - Power dissipation Ptot - - 69 2.1 W TC=25C TA=25C,RthJA=60K/W1) Operating and storage temperature Tj,Tstg -55 - 150 C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse3) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 1.1 1.8 K/W - Device on PCB, minimal footprint RthJA - - 62 K/W - Device on PCB, 6 cm2 cooling area1) RthJA - - 60 K/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.7 2.3 V VDS=VGS,ID=36A - 0.1 10 1 100 A VDS=100V,VGS=0V,Tj=25C VDS=100V,VGS=0V,Tj=125C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 10.5 8.2 13.5 9.6 m VGS=4.5V,ID=10A VGS=10V,ID=20A Gate resistance1) RG - 1.2 1.8 - Transconductance gfs 22 44 - S |VDS|>2|ID|RDS(on)max,ID=20A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 1.1 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Values Min. Typ. Max. Ciss - 1600 2100 pF VGS=0V,VDS=50V,f=1MHz Coss - 250 320 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 12 21 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 5.7 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3 Rise time tr - 4.6 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3 Turn-off delay time td(off) - 21 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3 Fall time tf - 5.3 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3 Unit Note/TestCondition Input capacitance1) 1) Output capacitance 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 4.7 - nC VDD=50V,ID=20A,VGS=0to4.5V Qg(th) - 2.5 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate to drain charge Qgd - 4.1 6.1 nC VDD=50V,ID=20A,VGS=0to4.5V Switching charge Qsw - 6.3 - nC VDD=50V,ID=20A,VGS=0to4.5V Gate charge total Qg - 12 15 nC VDD=50V,ID=20A,VGS=0to4.5V Gate plateau voltage Vplateau - 3.0 - V VDD=50V,ID=20A,VGS=0to4.5V Gate charge total Qg - 22 - nC VDD=50V,ID=20A,VGS=0to10V Qoss - 30 40 nC VDD=50V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test See Gate charge waveforms for parameter definition Final Data Sheet 4 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 40 A TC=25C - 160 A TC=25C - 0.85 1.2 V VGS=0V,IF=20A,Tj=25C trr - 34 68 ns VR=50V,IF=20A,diF/dt=100A/s Qrr - 29 58 nC VR=50V,IF=20A,diF/dt=100A/s Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test Final Data Sheet 5 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 80 50 45 70 40 60 35 30 ID[A] Ptot[W] 50 40 25 20 30 15 20 10 10 0 5 0 25 50 75 100 125 150 0 175 0 25 50 TC[C] 75 100 125 150 175 TC[C] Ptot=f(TC) ID=f(TC);VGS10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 s 102 DC 101 100 ZthJC[K/W] ID[A] 10 s 100 s 0.2 0.1 10-1 1 ms 0.5 0.05 0.02 100 10 ms 0.01 single pulse 10-1 10-1 100 101 102 103 10-2 10-6 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 160 20 10 V 5V 140 6V 16 4.5 V 120 4V 4.5 V 80 RDS(on)[m] ID[A] 100 4V 60 40 12 5V 5.5 V 6V 8 7V 10 V 3.5 V 4 20 3V 0 0 1 2 3 4 0 5 0 20 40 VDS[V] 60 80 100 ID[A] ID=f(VDS);Tj=25C;parameter:VGS RDS(on)=f(ID);Tj=25C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 100 80 70 80 60 50 ID[A] gfs[S] 60 40 40 30 20 20 10 150 C 25 C 0 0 1 2 3 4 5 6 7 0 0 10 VGS[V] 30 40 50 60 70 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 20 gfs=f(ID);Tj=25C 7 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 20 2.5 2.0 15 36 A 1.5 max VGS(th)[V] RDS(on)[m] 360 A 10 Typ 1.0 5 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[C] 60 100 140 180 Tj[C] RDS(on)=f(Tj);ID=20A;VGS=10V VGS(th)=f(Tj);VGS=VDS Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 C 150 C 25 C max 150 C max Ciss 103 102 IF[A] C[pF] Coss 102 101 Crss 101 100 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 9 8 50 V 7 101 25 C 100 C 125 C VGS[V] IAV[A] 6 80 V 20 V 5 4 3 2 1 100 10-1 100 101 102 103 0 0 5 tAV[s] 10 15 20 25 Qgate[nC] IAS=f(tAV);RGS=25;parameter:Tj(start) VGS=f(Qgate);ID=20Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 90 -60 -20 20 60 100 140 180 Tj[C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 5PackageOutlines Figure1OutlinePG-TSDSON-8FL,dimensionsinmm/inches Final Data Sheet 10 Rev.2.1,2016-04-21 OptiMOSTM5Power-Transistor,100V BSZ096N10LS5 RevisionHistory BSZ096N10LS5 Revision:2016-04-21,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2016-03-07 Release of final version 2.1 2016-04-21 Update Gate threshold voltage TrademarksofInfineonTechnologiesAG AURIXTM,C166TM,CanPAKTM,CIPOSTM,CoolGaNTM,CoolMOSTM,CoolSETTM,CoolSiCTM,CORECONTROLTM,CROSSAVETM,DAVETM,DI-POLTM,DrBladeTM, EasyPIMTM,EconoBRIDGETM,EconoDUALTM,EconoPACKTM,EconoPIMTM,EiceDRIVERTM,eupecTM,FCOSTM,HITFETTM,HybridPACKTM,InfineonTM, ISOFACETM,IsoPACKTM,i-WaferTM,MIPAQTM,ModSTACKTM,my-dTM,NovalithICTM,OmniTuneTM,OPTIGATM,OptiMOSTM,ORIGATM,POWERCODETM, PRIMARIONTM,PrimePACKTM,PrimeSTACKTM,PROFETTM,PRO-SILTM,RASICTM,REAL3TM,ReverSaveTM,SatRICTM,SIEGETTM,SIPMOSTM,SmartLEWISTM, SOLIDFLASHTM,SPOCTM,TEMPFETTM,thinQTM,TRENCHSTOPTM,TriCoreTM. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726Munchen,Germany (c)2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.1,2016-04-21