SEIKO EPSON CORPORATION 1
PF535-07
E0C6282
4-bit Single Chip Microcomputer
Wide Voltage
Operation
Products
● Core CPU Architecture
● SVD Circuit/Comparator
● Melody Circuit
● 288 Segments for LCD
■DESCRIPTION
The E0C6282 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200A CMOS 4-bit
core CPU. It also contains the ROM, RAM, LCD driver circuit, time base counter, stopwatch counter and melody
generation circuit.
The E0C6282 provides an excellent solution for low-power consumption systems with clock functions.
■FEATURES
● CMOS LSI.............................................4-bit parallel processing
● Clock .....................................................32.768kHz/1MHz
● Instruction set........................................100 instructions
● Instruction cycle time ............................153µsec, 214µsec or 366µsec at 32kHz (depending on instruction)
5µsec, 7µsec or 12µsec at 1MHz (depending on instruction)
● ROM capacity .......................................2,048 × 12 bits
● RAM capacity........................................224 × 4 bits (include segment memory)
● Input port...............................................5 bits (pull-down resistors are available by mask option)
● Output port ............................................5 bits (general purpose port)
2 bits (for melody output): MO, MO (also used as the external CR
connecting terminal for envelope)
1 bit (for clock output: frequency can be selected from 256Hz
through 32kHz by mask option)
● Built-in stopwatch timer
● Built-in analog comparator
● I/O port ..................................................4 bits
● LCD driver.............................................42 segments × 4 commons/38 segments × 8 commons
(1/4 or 1/8 duty is selectable by mask option)
● Built-in supply voltage detection (SVD) circuit
● Built-in melody generation circuit..........Melody memory capacity : 128 words
Interval memory capacity : 32 words (including one pause note)
● Interrupts...............................................External : Input interrupt 2 lines
Internal : Timer interrupt 2 lines
Melody completion interrupt 1 line
● Current consumption ............................E0C6282/62L82
HALT mode (32.768kHz) : 1.5µA (Typ.)
OPERATING mode (32.768kHz) : 4.0µA (Typ.)
E0C62A82
OPERATING mode (1MHz) : 150µA (Typ.)
● Package ................................................QFP5-80pin (plastic), QFP14-80pin (plastic)
Die form
■LINE UP
Model Supply voltage
1.5V (1.1V to 3.5V)
3.0V (2.2V to 5.5V)
3.0V (2.2V to 5.5V)
E0C62L82
E0C6282
E0C62A82
Clock
32kHz (Crystal or CR oscillation)
32kHz (Crystal or CR oscillation)
32kHz (Crystal or CR oscillation) & 1MHz (Ceramic or CR oscillation)
2
E0C6282
■PIN CONFIGURATION
QFP5-80pin
■BLOCK DIAGRAM
SEG0
V
K00~03, K10
P00~03
R00~03, R10, R11
DD
OSC1
OSC2
RESET
TEST
V
L1~4
CA~CD
V
S1
V
SS
Power
Controller
LCD Driver
RAM
224 words x 4 bits
ROM
2,048 words x 12 bits
OSC
System Reset
Control
Interrupt
Generator
Input Port
Test Port
I/O Port
Output Port
Timer
Melody
Core CPU E0C6200A
Comparator
& SVD
CMPP
CMPM
OSC3
OSC4
COM7 / SEG38
COM6 / SEG39
COM5 / SEG40
COM4 / SEG41
COM0
Stop Watch
MO
R12
4160
21
40
INDEX
201
80
61
E0C6282
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SEG16
SEG17
SEG18
SEG19
R03
R02
R01
R00
MO
R12
R11
R10
K10
K03
K02
K01
No. Pin name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
No. Pin name 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
K00
RESET
CMPP
CMPM
COM3
COM2
COM1
COM0
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
No. Pin name 49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38/COM7
SEG39/COM6
SEG40/COM5
SEG41/COM4
P03
P02
P01
P00
No. Pin name 65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
CD
CC
CB
CA
VL4
VL3
VL2
VL1
VSS
OSC4
OSC3
VS1
OSC2
OSC1
VDD
TEST
No. Pin name
4164
25
40
INDEX
241
80
65
E0C6282
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
R03
R02
R01
R00
MO
R12
R11
R10
K10
K03
No. Pin name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VDD
TEST
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
No. Pin name 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
K02
K01
K00
RESET
CMPP
CMPM
COM3
COM2
COM1
COM0
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
No. Pin name 49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38/COM7
SEG39/COM6
SEG40/COM5
SEG41/COM4
P03
P02
No. Pin name 65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
P01
P00
CD
CC
CB
CA
VL4
VL3
VL2
VL1
VSS
OSC4
OSC3
VS1
OSC2
OSC1
No. Pin name
QFP14-80pin
3
E0C6282
■PIN DESCRIPTION
V
DD
V
SS
V
S1
V
L1
–V
L4
CA–CD
OSC1
OSC2
OSC3
OSC4
K00–K00, K10
P00–P03
R00–R03
R10
R11
R12
MO
CMPP
CMPM
SEG0–37
COM0–3
SEG38–41
COM4–7
RESET
TEST
Pin name
I
I
–
–
–
I
O
I
O
I
I/O
O
O
O
O
O
I
I
O
O
O
I
I
In/Out
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage output terminal
LCD system power source terminal
LCD system booster capacitor connecting terminal
Crystal or CR oscillation input terminal
Crystal or CR oscillation output terminal
Ceramic or CR oscillation input terminal (62A82 only)
Ceramic or CR oscillation output terminal (62A82 only)
Input terminal
I/O terminal
Output terminal
Output terminal (FOUT output available by mask option)
Output terminal
Output terminal
(Melody inverted output and envelope function available by mask option)
Melody signal output terminal
Analog comparator non-inverted input terminal
Analog comparator inverted input terminal
LCD segment output terminal (Convertible to DC output by mask option)
SEG20 and 21 may be used only when the chip has been supplied
LCD common output terminal
LCD segment output terminal when 1/4 duty is selected
LCD common output terminal when 1/8 duty is selected
Initial reset input terminal
Test input terminal
QFP5-80pin
1
75
78
71–74
67–70
80
79
77
76
32–35, 31
63–66
23–26
30
29
28
27
37
38
3–22,
43–58
39–42
59–62
36
2
QFP14-80pin
79
73
76
69–72
65–68
78
77
75
74
30–33, 29
61–64
21–24
28
27
26
25
35
36
1–20,
41–56
37–40
57–60
34
80
Pin No. Function
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current *1
Operating temperature
Storage temperature
Soldering temperature / Time
Permissible dissipation *2
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package (QFP5-80pin, QFP14-80pin).
Symbol
VSS
VI
VIOSC
ΣIVSS
Topr
Tstg
Tsol
PD
Value
-6.0 to 0.5
VSS - 0.3 to 0.5
VS1 - 0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
(VDD=0V)
●Recommended Operating Conditions
E0C6282
Condition
Supply voltage
Oscillation frequency
Symbol
V
SS
f
OSC1
Remark
V
DD
=0V Unit
V
kHz
(Ta=-20 to 70°C)
Max.
-2.2
–
Typ.
-3.0
32.768
Min.
-5.5
–
E0C62L82
Condition
Supply voltage
Oscillation frequency
∗1:
∗2: When switching to heavy load protection mode. The SVD circuit and analog voltage comparator are turned OFF.
The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Symbol
VSS
fOSC1
Remark
VDD=0V
VDD=0V, With software control *1
VDD=0V, When the analog comparator is used
Unit
V
V
V
kHz
(Ta=-20 to 70°C)
Max.
-1.1
-0.9 *2
-1.3
–
Typ.
-1.5
-1.5
-1.5
32.768
Min.
-3.5
-3.5
-3.5
–
E0C62A82
Condition
Supply voltage
Oscillation frequency (1)
Oscillation frequency (2)
Symbol
VSS
fOSC1
fOSC3
Remark
VDD=0V
duty 50±5%
Unit
V
kHz
kHz
(Ta=-20 to 70°C)
Max.
-2.2
–
–
Typ.
-3.0
32.768
1,000
Min.
-5.5
–
–
4
E0C6282
●DC Characteristics
E0C6282/62A82
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL4
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.90•VSS
0.5
16
100
0
-1.0
-1.0
-2.0
-3
-3
-300
-3
-3
-300
Typ.Min.
0.2•VSS
0.10•VSS
VSS
VSS
0
5
30
-0.5
3.0
3.0
4.5
3
3
300
3
3
300
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Common output current
1/4 duty
Segment output current
(during LCD output)1/4 duty
Segment output current
(during DC output) 1/4 duty
Common output current
1/8 duty
Segment output current
(during LCD output)1/8 duty
Segment output current
(during DC output) 1/8 duty
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOH3
IOL1
IOL2
IOL3
IOH4
IOL4
IOH5
IOL5
IOH6
IOL6
IOH7
IOL7
IOH8
IOL8
IOH9
IOL9
VIH1=0V
No pull down resistor
VIH2=0V
With pull down resistor
VIH3=0V
With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
VOH3=0.1•VSS
VOL1=0.9•VSS
VOL2=0.9•VSS
VOL3=0.9•VSS
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=-0.05V
VOL5=VL3+0.05V
VOH6=0.1•VSS
VOL6=0.9•VSS
VOH7=-0.05V
VOL7=VL4+0.05V
VOH8=-0.05V
VOL8=VL4+0.05V
VOH9=0.1•VSS
VOL9=0.9•VSS
Condition
K00–K03, K10, P00–P03
RESET, TEST
K00–K03, K10, P00–P03
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
K00–K03, K10
P00–P03
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
RESET, TEST
R11
R00–R03, R10, P00–P03
MO, R12
R11
R00–R03, R10, P00–P03
MO, R12
COM0–COM3
SEG0–SEG41
SEG0–SEG41
COM0–COM7
SEG0–SEG37
SEG0–SEG37
E0C62L82
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
mA
µA
µA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL4
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.90•VSS
0.5
10
60
0
-450
-200
-0.8
-0.4
-3
-3
-100
-3
-3
-100
Typ.Min.
0.2•VSS
0.10•VSS
VSS
VSS
0
2.0
9.0
-0.5
1,300
700
1.5
750
3
3
130
3
3
130
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
High level output current (4)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Low level output current (4)
Common output current
1/4 duty
Segment output current
(during LCD output)1/4 duty
Segment output current
(during DC output) 1/4 duty
Common output current
1/8 duty
Segment output current
(during LCD output)1/8 duty
Segment output current
(during DC output) 1/8 duty
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOH3
IOH4
IOL1
IOL2
IOL3
IOL4
IOH5
IOL5
IOH6
IOL6
IOH7
IOL7
IOH8
IOL8
IOH9
IOL9
IOH10
IOL10
VIH1=0V
No pull down resistor
VIH2=0V
With pull down resistor
VIH3=0V
With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
VOH3=0.1•VSS
VOH4=0.1•VSS
When envelope is used
VOL1=0.9•VSS
VOL2=0.9•VSS
VOL3=0.9•VSS
VOL4=0.9•VSS
When envelope is used
VOH5=-0.05V
VOL5=VL3+0.05V
VOH6=-0.05V
VOL6=VL3+0.05V
VOH7=0.1•VSS
VOL7=0.9•VSS
VOH8=-0.05V
VOL8=VL4+0.05V
VOH9=-0.05V
VOL9=VL4+0.05V
VOH10=0.1•VSS
VOL10=0.9•VSS
Condition
K00–K03, K10, P00–P03
RESET, TEST
K00–K03, K10, P00–P03
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
K00–K03, K10
P00–P03
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
RESET, TEST
R11
R00–R03, R10, P00–P03
MO, R12
MO
(R12=Normal H level)
R11
R00–R03, R10, P00–P03
MO, R12
MO
(R12=Normal L level)
COM0–COM3
SEG0–SEG41
SEG0–SEG41
COM0–COM7
SEG0–SEG37
SEG0–SEG37
5
E0C6282
●Analog Circuit Characteristics and Current Consumption
E0C6282 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL4
are internal voltage
, C1–C6=0.1µF)
Max.
0.5•VL2
+0.1
-1.95
3•VL1
×0.9
4•VL1
×0.9
-2.25
100
VDD-0.9
10
1
3.0
7.0
10.5
14.0
Typ.
-2.10
-2.40
1.5
4.0
6.0
8.7
Min.
0.5•VL2
-0.1
-2.25
3•VL1
-0.1
4•VL1
-0.1
-2.55
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VL4
VSVD
tSVD
VIP
VIM
VOF
tCMP
IOP1
IOP2
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
Connect 1MΩ load resistor between VDD and VL4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
VIP=-1.5V, VIM=VIP±15mV
During HALT *1
During operation *1
During HALT *1
During operation *1
Without panel load
OSC1 is crystal oscillation
Without panel load
OSC1 is CR oscillation
E0C6282 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL4
are internal voltage
, C1–C6=0.1µF)
Max.
0.5•VL2
+0.1
-1.95
3•VL1
×0.9
4•VL1
×0.9
-2.25
100
VDD-0.9
10
1
33.0
37.0
40.5
44.0
Typ.
-2.10
-2.40
11.5
14.0
16.0
18.7
Min.
0.5•VL2
-0.1
-2.25
3•VL1
-0.1
4•VL1
-0.1
-2.55
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VL4
VSVD
tSVD
VIP
VIM
VOF
tCMP
IOP1
IOP2
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
Connect 1MΩ load resistor between VDD and VL4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
VIP=-1.5V, VIM=VIP±15mV
During HALT *1
During operation *1
During HALT *1
During operation *1
Without panel load
OSC1 is crystal oscillation
Without panel load
OSC1 is CR oscillation
E0C62L82 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL4
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•VL1
×0.9
3•VL1
×0.9
4•VL1
×0.9
-1.10
100
VDD-0.9
20
1
3.0
7.0
10.5
14.0
Typ.
-1.05
-1.20
1.5
4.0
6.0
8.7
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
4•VL1
-0.1
-1.30
VSS+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
VL1
VL2
VL3
VL4
VSVD
tSVD
VIP
VIM
VOF
tCMP
IOP1
IOP2
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
Connect 1MΩ load resistor between VDD and VL4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
VIP=-1.1V, VIM=VIP±30mV
During HALT *1
During operation *1
During HALT *1
During operation *1
Without panel load
OSC1 is crystal oscillation
Without panel load
OSC1 is CR oscillation
6
E0C6282
E0C62L82 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
4•V
L1
×0.85
-1.10
100
V
DD
-0.9
20
1
6.0
12.0
20.5
27.0
Typ.
-1.05
-1.20
2.5
7.0
11.5
16.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
4•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
L4
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP1
I
OP2
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT *
1
During operation *
1
During HALT *
1
During operation *
1
Without panel load
OSC1 is crystal oscillation
Without panel load
OSC1 is CR oscillation
E0C62A82 (Normal Operating Mode)
∗1:
∗2: The OSC3 circuit, SVD circuit and analog voltage comparator are turned OFF.
The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage
, C1–C6=0.1µF)
Max.
0.5•V
L2
+0.1
-1.95
3•V
L1
×0.9
4•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
1
3.0
7.0
300.0
60
60
300
Typ.
-2.10
-2.40
1.70
4.0
150.0
30
30
160
Min.
0.5•V
L2
-0.1
-2.25
3•V
L1
-0.1
4•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
L4
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP1
I
OP2
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT *
1
During operation at 32kHz *
1
During operation at 1MHz *
2
During HALT *
1
During operation at 32kHz *
1
During operation at 1MHz *
2
Without panel load
OSC1 is crystal
oscillation
Without panel load
OSC1 is CR oscillation
E0C62A82 (Heavy Load Protection Mode)
∗1:
∗2: The OSC3 circuit, SVD circuit and analog voltage comparator are turned OFF.
The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
V
µS
V
mV
mS
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage
, C1–C6=0.1µF)
Max.
0.5•V
L2
+0.1
-1.95
3•V
L1
×0.9
4•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
1
33.0
37.0
330.0
90
90
420
Typ.
-2.10
-2.40
11.7
14.0
160.0
40
40
200
Min.
0.5•V
L2
-0.1
-2.25
3•V
L1
-0.1
4•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
L4
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP1
I
OP2
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L4
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT *
1
During operation at 32kHz *
1
During operation at 1MHz *
2
During HALT *
1
During operation at 32kHz *
1
During operation at 1MHz *
2
Without panel load
OSC1 is crystal
oscillation
Without panel load
OSC1 is CR oscillation
7
E0C6282
●Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-
ing characteristics as reference values.
E0C6282/62A82 (OSC1 Crystal oscillation)
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-5.5
Typ.
20
Min.
-2.2
-2.2
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤3sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-2.2 to -5.5V
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62L82 (OSC1 Crystal oscillation)
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
20
Min.
-1.1
-1.1(-0.9)*
1
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤3sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.1 to -3.5V (-0.9) *
1
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C6282/62A82 (OSC1 CR oscillation)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=850kΩ, Ta=25°C)
Max.
20
Typ.
32.768kHz
3
Min.
-20
-2.2
-2.2
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC1
Vsta
t
sta
Vstp
Condition
V
SS
=-2.2 to -5.5V (V
SS
)
(V
SS
)
E0C62L82 (OSC1 CR oscillation)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, R
CR
=850kΩ, Ta=25°C)
Max.
20
Typ.
32.768kHz
3
Min.
-20
-0.9
-0.9
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC1
Vsta
t
sta
Vstp
Condition
V
SS
=0.9 to -3.5V (V
SS
)
(V
SS
)
E0C62A82 (OSC3 CR oscillation)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=35kΩ, Ta=25°C)
Max.
30
3
Typ.
1MHz
Min.
-30
-2.2
-2.2
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC3
Vsta
t
sta
Vstp
Condition
V
SS
=-2.2 to -5.5V (V
SS
)
(V
SS
)
E0C62A82 (OSC1 Ceramic oscillation)
Unit
V
mS
V
(Unless otherwise specified: VDD=0V, VSS=-3.0V, ceramic oscillation: 1MHz, CGC=CDC=100pF, Ta=25°C)
Max.
5
Typ.Min.
-2.2
-2.2
Characteristic
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
Vsta
tsta
Vstp
Condition
VSS=-2.2 to -5.5V (VSS)
(VSS)
8
E0C6282
CA
CB
CC
CD
V
V
V
V
V
OSC1
OSC2
OSC3
OSC4
V
RESET
TEST
Vss
C1
C2
C3
C4
C5
C6
C7
C
X'tal
L1
L2
L3
L4
DD
S1 1.5V
or
3.0V
Piezo Buzzer
R12
MO
K00
K03
K10
P00
P03
CMPP
CMPM
R00
R03
R10
R11
I
I/O
O
SEG0
COM7/SEG38
COM6/SEG39
COM5/SEG40
COM4/SEG41
COM3
COM0
LCD PANEL
E0C6282
E0C62L82
E0C62A82
Coil
GX
Cp
Ceramic
C
GC
C
DC
C8
∗1
C9 R3
∗2
∗2
R
CR1
R
CR3
■BASIC EXTERNAL CONNECTION DIAGRAM
∗1 OSC3 oscillation circuit can be used only for
E0C62A82. For the E0C6282 and 62L82, do not
connect anything to terminals OSC3 and OSC4.
∗2 In case 1/4 duty was selected with the mask op-
tion, set CD and VL4 to N.C. (not connected). The
C3 and C7 capacitor are not required.
Note: The above table is simply an example, and is
not guaranteed to work.
■PACKAGE DIMENSIONS
Plastic QFP5-80pin Plastic QFP14-80pin
Unit: mm
20
±0.1
25.6
±0.4
4164
14
±0.1
19.6
±0.4
25
40
INDEX
0.35
±0.1
241
80
65
2.7
±0.1
0.26
3.4
max
2.8
1.5
0°
12°
0.15
±0.05
0.8
X'tal
RCR1
CGX
Ceramic
RCR3
CGC, CDC
C1–C8
C9
Cp
R3
Crystal oscillator
Resistor
for CR oscillation
Trimmer capacitor
Ceramic oscillator
Resistor
for CR oscillation
Capacitor
Capacitor
Capacitor
Capacitor
Resistor
32.768kHz
CI(Max.)=35kΩ
850kΩ
5–25pF
1MHz(Typ.)
35kΩ
100pF
0.1µF
1µF–10µF
3.3µF
1kΩ
12
±0.1
14
±0.4
4160
12
±0.1
14
±0.4
21
40
INDEX
0.18
201
80
61
1.4
±0.1
0.1
1.7
max
1
0.5
±0.2
0°
10°
0.125
0.5
+0.1
–0.05
+0.05
–0.025
E0C6282
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
