HCPL-M452/HCPL-M453
Small Outline, 5 Lead, High Speed Optocouplers
Data Sheet
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's
suscep ti bility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in
handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Features
x Surface mountable
x Very small, low profile JEDEC registered package outline
x Compatible with infrared vapor phase reflow and wave
soldering processes
x Very high common mode transient immunity:
15000 V/Ps at VCM = 1500 V guaranteed (HCPL-M453)
x High speed: 1 Mb/s
x TTL compatible
x Open collector output
x Worldwide Safety Approval:
– UL1577 recognized, 3750Vrms/1min
– CSA Approved
x Lead free option
Applications
x Line receivers: High common mode transient immunity
(>1000 V/μs) and low input-output capaci tance (0.6 pF).
x High speed logic ground isolation: TTL/TTL, TTL/LTTL,
TTL/CMOS, TTL/LSTTL
x Replace slow phototran sistor optocouplers
x Replace pulse transformers: save board space and
weight
x Analog signal ground isolation: Integrated photon
detector provides improved linearity over photo-
transistor type
Description
These small outline high CMR, high speed, diode-transis-
tor optocouplers are single channel devices in a five lead
miniature footprint. They are electrically equivalent to the
following Avago optocouplers:
The SO-5 JEDEC registered (MO-155) package outline
does not require “through holes” in a PCB. This package
occupies approximately one-fourth the footprint area of
the standard dual-in-line package. The lead profile is de-
signed to be com-patible with standard surface mount
processes.
These diode-transistor optocouplers use an insulating lay-
er between the light emitting diode and an integrated
photon detector to provide electrical insulation between
input and output. Separate connections for the photo-
diode bias and output transistor collector increase the
speed up to a hundred times over that of a conventional
photo-transistor coupler by reducing the base-collector
capacitance.
The HCPL-M452 is designed for high speed TTL/TTL
applications. A standard 16 mA TTL sink current through
the input LED will provide enough output current for 1
TTL load and a 5.6 ký pull-up resistor. CTR of the HCPL-
M452 is 19% minimum at IF = 16 mA.
The HCPL-M453 is an HCPL-M452 with increased common
mode transient immunity of 15,000 V/Ps minimum at
VCM =1500 V guaranteed.
Ordering Options
SO-5 Package Standard DIP SO-8 Package
HCPL-M452 HCPL-4502 HCPL-0452
HCPL-M453 HCPL-4503 HCPL-0453
Note: These devices equivalent to 6N135/6N136 devices but without
the base lead.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
2
Ordering Information
HCPL-M452 and HCPL-M453 are UL Recognized with 3750 Vrms for 1 minute per UL1577.
Part
Number
Option
Package Surface Mount Tape & Reel
Quantity
RoHS
Compliant
non RoHS
Compliant
HCPL-M452
HCPL-M453
-000E no option SO-5 X 100 per tube
-500E #500 X X 1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-M452-500E to order product of SO-5 Surface Mount package in Tape and Reel packaging and RoHS compliant.
Example 2:
HCPL-M452 to order product of SO-5 Surface Mount package in Tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS
compliant will use ‘–XXXE.’
Outline Drawing (JEDEC MO-155)
MXXX
XXX
6
5
43
1
7.0 ± 0.2
(0.276 ± 0.008)
2.5 ± 0.1
(0.098 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
VCC
VOUT
GNDCATHODE
ANODE
4.4 ± 0.1
(0.173 ± 0.004)
1.27
(0.050)BSC
0.15 ± 0.025
(0.006 ± 0.001)
0.71
(0.028) MIN.
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
Dimensions in millimeters (inches)
* Maximum mold flash on each side is 0.15 mm (0.006)
Note: Foating lead protrusion is 0.15 mm (6 mils) max.
7° MAX.
MAX. LEAD COPLANARITY
= 0.102 (0.004)
3
Land Pattern Recommendation
Dimensions in millimeters and (inches)
Schematic
IF
SHIELD
6
5
4GND
VCC
1
3
VO
ICC
VFIO
ANODE
CATHODE
+
–
8.27
(0.325)
2.0
(0.080)
2.5
(0.10)
1.3
(0.05)
0.64
(0.025)
4.4
(0.17)
Solder Reflow Thermal Profile
Note: Non-halide flux should be used.
0
TIME (SECONDS)
TEMPERATURE (°C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160°C
140°C
150°C
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C PEAK
TEMP.
230°C
SOLDERING
TIME
200°C
PREHEATING TIME
150°C, 90 + 30 SEC.
2.5°C ± 0.5°C/SEC.
3°C + 1°C/–0.5°C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
Recommended Pb-Free IR Profile
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision).
Non-Halide Flux should be used.
4
Regulatory Information
The HCPL-M452/M453 are approved by the following organizations:
Insulation Related Specifications
Parameter Symbol Value Units Conditions
Min External Air Gap (Clearance) L(IO1) ≥ 5 mm Measured from input terminals to output
terminals
Min. External Tracking Path (Creepage) L(IO2) ≥ 5 mm Measured from input terminals to output
terminals
Min. Internal Plastic Gap (Clearance) 0.08 mm Through insulation distance conductor to
conductor
Tracking Resistance CTI 175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group (per DIN VDE 0109) IIIa Material Group DIN VDE 0109
UL
Approved under UL 1577, component recognition
program up to VISO = 3750 VRMS expected prior to product
release.
CSA
Approved under CSA Component Acceptance Notice #5.
Absolute Maximum Ratings
(No Derating Required up to 85°C)
Storage Temperature .............................................................................-55°C to +125°C
Operating Temperature ........................................................................-55°C to +100°C
Average Input Current - IF ................................................................................25 mA[1]
Peak Input Current - IF ........................................................................................ 50 mA[2]
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current - IF ............................................................................ 1.0 A
( 1 μs pulse width, 300 pps)
Reverse Input Voltage - VR (Pin3-1) ............................................................................ 5 V
Input Power Dissipation .....................................................................................45 mW[3]
Average Output Current - IO (Pin 5) .......................................................................8 mA
Peak Output Current ................................................................................................ 16 mA
Output Voltage - VO (Pin 5-4) ................................................................... -0.5 V to 20 V
Supply Voltage - VCC (Pin 6-4) .................................................................. -0.5 V to 30 V
Output Power Dissipation .............................................................................. 100 mW[4]
Infrared and Vapor Phase Reflow Temperature .......................................see below
5
Electrical Specifications
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified. (See note 11.)
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Current Transfer
Ratio
CTR 20 24 50 % TA = 25°C VO = 0.4 V VCC = 4.5 V
IF = 16 mA
1, 2, 4 5
15 25 VO = 0.5 V
Logic Low Output
Voltage
VOL 0.1 0.4 V TA = 25°C IO = 3.0 mA
0.5 IO = 2.4 mA
Logic High Output
Current
IOH 0.003 0.5
PA TA = 25°C VO = VCC =
5.5 V
IF = 0 mA 7
0.01 1 TA = 25°C VO = VCC =
15.0 V
50
Logic Low Supply
Current
ICCL 50 200 IF = 16 mA, VO = Open, VCC = 15 V 11
Logic High Supply
Current
ICCH 0.02 1 TA = 25°C IF = 0 mA, VO = Open,
VCC = 15.0 V
11
2
Input Forward
Voltage
VF 1.5 1.7 V TA = 25°C IF = 16 mA 3
1.8
Input Reverse
Breakdown Voltage
BVR 5 IR = 10 PA
Temperature
Coefficient of
Forward Voltage
'VF/
'TA
-1.6 mV/°C IF = 16 mA
Input Capacitance CIN 60 pF f = 1 MHz, VF = 0
Input-Output
Insulation
VISO 3750 VRMS RH ≤ 50%, t = 1 min., TA = 25°C 6, 7
Resistance
(Input-Output)
RI-O 1012 : VI-O = 500 VDC 6
Capacitance
(Input-Output)
CI-O 0.6 pF f = 1 MHz 6
* All typicals at TA = 25°C.
6
Switching Specifications
Over recommended temperature (TA = 0°C to 70°C) VCC = 5 V, IF = 16 mA unless otherwise specified.
Parameter Symbol Device Min. Typ.* Max. Units Test Conditions Fig. Note
Propagation Delay
Time to Logic Low
at Output
tPHL 0.2 0.8
Ps TA = 25°C RL = 1.9 k: 5, 6, 10 9
1.0
Propagation Delay
Time to Logic High
at Output
tPLH 0.6 0.8 TA = 25°C RL = 1.9 k: 5, 6, 10 9
1.0
Common Mode
Transient Immunity
at Logic High Level
Output
|CMH|
HCPL-
M452
1 kV/PsVCM = 10 Vp-p I
F = 0 mA
TA = 25°C
RL = 1.9 k:
11 8, 9
HCPL-
M453
15 30 VCM = 1500
Vp-p
Common Mode
Transient Immunity
at Logic Low Level
Output
|CML| HCPL-
M452
1 VCM = 10 Vp-p I
F = 16 mA
TA = 25°C
RL = 1.9 k:
11 8, 9
HCPL-
M453
15 30 VCM = 1500
Vp-p
Bandwidth BW 3 MHz
RL = 100 :, See Test Circuit 8, 9 10
All typicals at TA = 25°C.
Notes:
1. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C.
2. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C.
3. Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C.
4. Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C.
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
6. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second (leakage detection
current limit, II-O ≤ 5 PA).
8. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM,
to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum
tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state
(i.e., VO < 0.8 V).
9. The 1.9 k: load represents 1 TTL unit load of 1.6 mA and the 5.6 k: pull-up resistor.
10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
11. Use of a 0.1 PF bypass capacitor con nected between pins 4 and 6 is recommended.
7
Figure 4. Current Transfer Ratio vs. Temperature.
Figure 1. dc and Pulsed Transfer Characteristics. Figure 2. Current Transfer Ratio vs. Input Current.
Figure 3. Input Current vs. Forward Voltage.
10
5
001020
VO – OUTPUT VOLTAGE – V
40 mA
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
IF = 5 mA
TA = 25°C
VCC = 5.0 V
IO – OUTPUT CURRENT – mA
NORMALIZED
IF = 16 mA
VO = 0.4 V
VCC = 5 V
TA = 25°C
1.5
1.0
0.5
0.1 0 1 10 100
NORMALIZED CURRENT TRANSFER RATIO
IF – INPUT CURRENT – mA
VF – FORWARD VOLTAGE – VOLTS
100
10
0.1
0.01
1.10 1.20 1.30 1.40
IF – FORWARD CURRENT – mA
1.601.50
1.0
0.001
1000
TA = 25°C
IF
VF
+
–
1.1
1.0
0.9
0.8
0.7
0.6-60 -20
NORMALIZED CURRENT TRANSFER RATIO
TA – TEMPERATURE – °C
20 60 140100
NORMALIZED
IF = 16 mA
VO = 0.4 V
VCC = 5 V
TA = 25°C
2000
1500
1000
500
0-60 -20 20 60 100
TA – TEMPERATURE – °C
tP – PROPAGATION DELAY – ns
tPHL
tPLH
IF = 16 mA, VCC = 5.0 V
RL = 1.9 kW
3.0
2.0
1.0
0.1
4
0.6
0.4
321
0.2
8765910
0.8
RL – LOAD RESISTANCE – k:
tPLH
tPHL
VCC = 5.0 V
TA = 25°C
tP – PROPAGATION DELAY – Ps
IF = 10 mA
IF = 16 mA
Figure 5. Propagation Delay vs. Temperature. Figure 6. Propagation Delay Time vs. Load Resistance.
8
Figure 7. Logic High Output Current vs. Temperature. Figure 8. Small-Signal Current Transfer Ratio vs. Quiescent Input Current.
TA – TEMPERATURE – °C
IF = 0
VO = VCC = 5.0 V
-50 -25 0 +25 +50 +75 +100
10+4
10-2
10-1
100
10+1
10+2
10+3
IOH – LOGIC HIGH OUTPUT CURRENT – nA
'IF
'IO– SMALL SIGNAL CURRENT TRANSFER RATIO
0
0.10
0.20
0.30
0
IF – QUIESCENT INPUT CURRENT – mA
25
164812
TA = 25°C, RL = 100 :, VCC = 5 V
Figure 9. Frequency Response.
1
3
6
5
4
20 k:
SET IF
+5 V
AC INPUT
0.1 PF
500 :
100 :
2N3063
1.5 Vdc
0.25 Vp-pac
0.1 PF
+5 V
VO
RL
f – FREQUENCY – MHz
0
-20
0.01 0.1
NORMALIZED RESPONSE –dB
1.0
-25
10
-30
TA = 25°C
IF = 16 mA
-15
-10
-5
RL = 100 :
RL = 220 :
RL = 470 :
RL = 1 k:
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes AV01-0554EN
AV02-1968EN - February 8, 2010
Figure 11. Test Circuit for Transient Immunity and Typical Waveforms.
VO
0.1PF
RL
A
B
PULSE GEN.
VCM
+
VFF
+5 V
–
1
3
6
5
4
VO
VOL
VO
0 V 10% 90% 90% 10%
SWITCH AT A: IF = 0 mA
SWITCH AT B: IF = 1.6 mA
VCM
trtf
10 V
IF
tr, tf = 16 ns RCC (SEE NOTE 5)
220 :
5 V
Figure 10. Switching Test Circuit.
VO
PULSE
GEN.
ZO = 50 :
tr = 5 ns
IF MONITOR
IF
0.1PF
RL
CL = 15 pF
100 :
0
tPHL tPLH
VO
IF
VOL
1.5 V 1.5 V
+5 V
5 V 10% DUTY CYCLE
1/f < 500 Ps
1
3
6
5
4
